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Searched full:rwp (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/media/pci/cx88/
H A Dcx88-reg.h153 #define MO_VIDY_DMA 0x310000 // {64}RWp Video Y
154 #define MO_VIDU_DMA 0x310008 // {64}RWp Video U
155 #define MO_VIDV_DMA 0x310010 // {64}RWp Video V
156 #define MO_VBI_DMA 0x310018 // {64}RWp VBI (Vertical blanking interval)
213 #define MO_AUDD_DMA 0x320000 // {64}RWp Audio downstream
214 #define MO_AUDU_DMA 0x320008 // {64}RWp Audio upstream
215 #define MO_AUDR_DMA 0x320010 // {64}RWp Audio RDS (downstream)
433 #define MO_TS_DMA 0x330000 // {64}RWp Transport stream downstream
451 #define MO_VIPD_DMA 0x340000 // {64}RWp VIP downstream
452 #define MO_VIPU_DMA 0x340008 // {64}RWp VIP upstream
[all …]
/linux/lib/crypto/powerpc/
H A Dmd5-asm.S12 #define rWP r4 macro
49 lwbrx reg,0,rWP; /* load data */
51 addi rWP,rWP,4; /* increment per word */
55 lwz reg,off(rWP); /* load data */
58 addi rWP,rWP,64; /* increment per block */
H A Dsha1-spe-asm.S17 #define rWP r4 /* pointer to input */ macro
96 lwz reg,off(rWP); /* load data */
98 addi rWP,rWP,64; /* increment per block */
101 lwbrx reg,0,rWP; /* load data */ \
102 addi rWP,rWP,4; /* increment per word */
H A Dsha256-spe-asm.S18 #define rWP r4 /* pointer to input data */ macro
91 lwz reg,off(rWP); /* load data */
93 addi rWP,rWP,64; /* increment per block */
96 lwbrx reg,0,rWP; /* load data */ \
97 addi rWP,rWP,4; /* increment per word */
/linux/arch/sparc/kernel/
H A Dsignal_32.c267 __siginfo_rwin_t __user *rwp = tail; in setup_frame() local
268 tail += sizeof(*rwp); in setup_frame()
269 err |= save_rwin_state(wsaved, rwp); in setup_frame()
270 err |= __put_user(rwp, &sf->rwin_save); in setup_frame()
363 __siginfo_rwin_t __user *rwp = tail; in setup_rt_frame() local
364 tail += sizeof(*rwp); in setup_rt_frame()
365 err |= save_rwin_state(wsaved, rwp); in setup_rt_frame()
366 err |= __put_user(rwp, &sf->rwin_save); in setup_rt_frame()
H A Dsignal32.c419 __siginfo_rwin_t __user *rwp = tail; in setup_frame32() local
420 tail += sizeof(*rwp); in setup_frame32()
421 err |= save_rwin_state(wsaved, rwp); in setup_frame32()
422 err |= __put_user((u64)rwp, &sf->rwin_save); in setup_frame32()
553 __siginfo_rwin_t __user *rwp = tail; in setup_rt_frame32() local
554 tail += sizeof(*rwp); in setup_rt_frame32()
555 err |= save_rwin_state(wsaved, rwp); in setup_rt_frame32()
556 err |= __put_user((u64)rwp, &sf->rwin_save); in setup_rt_frame32()
/linux/Documentation/trace/coresight/
H A Dcoresight-tpda.rst44 If rwp register of the sink is keeping updating when do
45 integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
/linux/drivers/hwtracing/coresight/
H A Dcoresight-tmc-etr.c650 static void tmc_etr_sync_flat_buf(struct etr_buf *etr_buf, u64 rrp, u64 rwp) in tmc_etr_sync_flat_buf() argument
663 etr_buf->len = rwp - rrp; in tmc_etr_sync_flat_buf()
748 static void tmc_etr_sync_resrv_buf(struct etr_buf *etr_buf, u64 rrp, u64 rwp) in tmc_etr_sync_resrv_buf() argument
758 etr_buf->len = rwp - rrp; in tmc_etr_sync_resrv_buf()
807 static void tmc_etr_sync_sg_buf(struct etr_buf *etr_buf, u64 rrp, u64 rwp) in tmc_etr_sync_sg_buf() argument
822 w_offset = tmc_sg_get_data_page_offset(table, rwp); in tmc_etr_sync_sg_buf()
825 "Unable to map RWP %llx to offset\n", rwp); in tmc_etr_sync_sg_buf()
1033 u64 rrp, rwp; in tmc_sync_etr_buf() local
1037 rwp = tmc_read_rwp(drvdata); in tmc_sync_etr_buf()
1056 etr_buf->ops->sync(etr_buf, rrp, rwp); in tmc_sync_etr_buf()
[all …]
/linux/drivers/accel/habanalabs/goya/
H A Dgoya_coresight.c468 u32 rwp, rwphi; in goya_config_etr() local
472 * the buffer is set in the RWP register (lower 32 in goya_config_etr()
475 rwp = RREG32(mmPSOC_ETR_RWP); in goya_config_etr()
477 *(u64 *) params->output = ((u64) rwphi << 32) | rwp; in goya_config_etr()
/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi_coresight.c677 u32 rwp, rwphi; in gaudi_config_etr() local
681 * the buffer is set in the RWP register (lower 32 in gaudi_config_etr()
686 rwp = RREG32(mmPSOC_ETR_RWP); in gaudi_config_etr()
691 ((u64) rwphi << 32) | rwp; in gaudi_config_etr()
/linux/drivers/net/ethernet/natsemi/
H A Dsonic.c521 /* Place a new receive resource in the Receive Resource Area and update RWP. */
529 /* The resources in the range [RRP, RWP) belong to the SONIC. This loop in sonic_update_rra()
530 * scans the other resources in the RRA, those in the range [RWP, RRP). in sonic_update_rra()
603 /* If RBE is already asserted when RWP advances then in sonic_rx()
/linux/include/kvm/
H A Darm_vgic.h248 #define KVM_VGIC_IMP_REV_3 3 /* GICv3 GICR_CTLR.{IW,CES,RWP} */
369 /* GICR_CTLR.{ENABLE_LPIS,RWP} */
/linux/drivers/ata/
H A Dpata_sis.c185 * sis_set_fifo - Set RWP fifo bits for this device
/linux/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c297 * Don't disable if RWP is set, as there already an in vgic_mmio_write_v3r_ctlr()
/linux/drivers/irqchip/
H A Dirq-gic-v3.c352 pr_err_ratelimited("RWP timeout, gone fishing\n"); in gic_do_wait_for_rwp()
H A Dirq-gic-v3-its.c5389 * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs in redist_disable_lpis()
5391 * Error out if we time out waiting for RWP to clear. in redist_disable_lpis()