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/linux/drivers/mmc/host/
H A Dsdhci_f_sdh30.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
20 #include "sdhci-pltfm.h"
26 struct reset_control *rst; member
42 u32 ctrl = 0; in sdhci_f_sdh30_soft_voltage_switch() local
45 ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
46 ctrl |= F_SDH30_CRES_O_DN; in sdhci_f_sdh30_soft_voltage_switch()
47 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
48 ctrl |= F_SDH30_MSEL_O_1_8; in sdhci_f_sdh30_soft_voltage_switch()
49 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
[all …]
H A Dsdhci-of-ma35d1.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Author: Shan-Chun Hung <shanchun1218@gmail.com>
16 #include <linux/dma-mapping.h>
32 #include "sdhci-pltfm.h"
45 struct reset_control *rst; member
77 if (likely(!len || (ALIGN(addr, SZ_128M) == ALIGN(addr + len - 1, SZ_128M)))) { in ma35_adma_write_desc()
82 offset = addr & (SZ_128M - 1); in ma35_adma_write_desc()
83 tmplen = SZ_128M - offset; in ma35_adma_write_desc()
87 len -= tmplen; in ma35_adma_write_desc()
115 switch (ios->signal_voltage) { in ma35_start_signal_voltage_switch()
[all …]
/linux/drivers/pwm/
H A Dpwm-sun4i.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 * - When outputing the source clock directly, the PWM logic will be bypassed
46 #define PWM_PRD(prd) (((prd) - 1) << 16)
85 struct reset_control *rst; member
98 return readl(sun4ichip->base + offset); in sun4i_pwm_readl()
104 writel(val, sun4ichip->base + offset); in sun4i_pwm_writel()
116 clk_rate = clk_get_rate(sun4ichip->clk); in sun4i_pwm_get_state()
118 return -EINVAL; in sun4i_pwm_get_state()
127 if ((val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) && in sun4i_pwm_get_state()
[all …]
/linux/drivers/iio/adc/
H A Dsun20i-gpadc-iio.c1 // SPDX-License-Identifier: GPL-2.0
3 * GPADC driver for sunxi platforms (D1, T113-S3 and R329)
18 #include <linux/iio/adc-helpers.h>
21 #define SUN20I_GPADC_DRIVER_NAME "sun20i-gpadc"
66 u32 ctrl; in sun20i_gpadc_adc_read() local
69 mutex_lock(&info->lock); in sun20i_gpadc_adc_read()
71 reinit_completion(&info->completion); in sun20i_gpadc_adc_read()
73 if (info->last_channel != chan->channel) { in sun20i_gpadc_adc_read()
74 info->last_channel = chan->channel; in sun20i_gpadc_adc_read()
77 writel(SUN20I_GPADC_CS_EN_ADC_CH(chan->channel), in sun20i_gpadc_adc_read()
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/linux/Documentation/devicetree/bindings/phy/
H A Dbrcm,ns2-drd-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/brcm,ns2-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <florian.fainelli@broadcom.com>
11 - Hauke Mehrtens <hauke@hauke-m.de>
12 - Rafał Miłecki <zajec5@gmail.com>
16 const: brcm,ns2-drd-phy
20 - description: DRD ICFG configurations
21 - description: DRD IDM reset
[all …]
/linux/drivers/usb/gadget/udc/aspeed-vhub/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0+
3 * aspeed-vhub -- Driver for Aspeed SoC "vHub" USB gadget
5 * core.c - Top level support
25 #include <linux/dma-mapping.h>
33 bool internal = req->internal; in ast_vhub_done()
34 struct ast_vhub *vhub = ep->vhub; in ast_vhub_done()
38 list_del_init(&req->queue); in ast_vhub_done()
40 if ((req->req.status == -EINPROGRESS) || (status == -EOVERFLOW)) in ast_vhub_done()
41 req->req.status = status; in ast_vhub_done()
43 if (req->req.dma) { in ast_vhub_done()
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/linux/drivers/mtd/nand/raw/
H A Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de>
10 #include <linux/dma-mapping.h>
34 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20)
40 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4)
41 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0)
156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off))
207 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc()
211 return -ERANGE; in tegra_nand_ooblayout_rs_ecc()
213 oobregion->offset = SKIP_SPARE_BYTES; in tegra_nand_ooblayout_rs_ecc()
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/linux/include/linux/platform_data/
H A Dmax197.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2012 Savoir-faire Linux Inc.
8 * For further information, see the Documentation/hwmon/max197.rst file.
15 * struct max197_platform_data - MAX197 connectivity info
16 * @convert: Function used to start a conversion with control byte ctrl.
20 int (*convert)(u8 ctrl);
/linux/drivers/char/hw_random/
H A Djh7110-trng.c1 // SPDX-License-Identifier: GPL-2.0
42 /* CTRL CMD */
100 struct reset_control *rst; member
107 /* protects against concurrent write to ctrl register */
113 MODULE_PARM_DESC(autoreq, "Auto-reseeding after random number requests by host reaches specified co…
114 " 0 - disable counter\n"
115 " other - reload value for internal counter");
119 MODULE_PARM_DESC(autoage, "Auto-reseeding after specified timer countdowns to 0:\n"
120 " 0 - disable timer\n"
121 " other - reload value for internal timer");
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/linux/drivers/media/platform/amlogic/meson-ge2d/
H A Dge2d.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-event.h>
22 #include <media/v4l2-ioctl.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/videobuf2-v4l2.h>
26 #include <media/videobuf2-dma-contig.h>
28 #include "ge2d-regs.h"
30 #define GE2D_NAME "meson-ge2d"
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/linux/Documentation/devicetree/bindings/ufs/
H A Dhisilicon,ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Wei <liwei213@huawei.com>
18 - hisilicon,hi3660-ufs
19 - hisilicon,hi3670-ufs
21 - compatible
24 - $ref: ufs-common.yaml
29 - items:
30 - const: hisilicon,hi3660-ufs
[all …]
/linux/drivers/spi/
H A Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
202 #define STM32_SPI_HOST_MODE(stm32_spi) (!(stm32_spi)->device_mode)
203 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
210 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
222 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
254 * struct stm32_spi_cfg - stm32 compatible configuration data
311 * struct stm32_spi - private data of the SPI controller
313 * @ctrl: controller interface
[all …]
/linux/drivers/gpu/drm/sun4i/
H A Dsun8i_tcon_top.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <dt-bindings/clock/sun8i-tcon-top.h>
34 if (!sun8i_tcon_top_node_is_tcon_top(dev->of_node)) { in sun8i_tcon_top_set_hdmi_src()
36 return -EINVAL; in sun8i_tcon_top_set_hdmi_src()
41 return -EINVAL; in sun8i_tcon_top_set_hdmi_src()
44 spin_lock_irqsave(&tcon_top->reg_lock, flags); in sun8i_tcon_top_set_hdmi_src()
46 val = readl(tcon_top->regs + TCON_TOP_GATE_SRC_REG); in sun8i_tcon_top_set_hdmi_src()
48 val |= FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, tcon - 1); in sun8i_tcon_top_set_hdmi_src()
49 writel(val, tcon_top->regs + TCON_TOP_GATE_SRC_REG); in sun8i_tcon_top_set_hdmi_src()
51 spin_unlock_irqrestore(&tcon_top->reg_lock, flags); in sun8i_tcon_top_set_hdmi_src()
[all …]
/linux/drivers/hwtracing/ptt/
H A Dhisi_ptt.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
31 return !readl_poll_timeout(hisi_ptt->iobase + HISI_PTT_TUNING_INT_STAT, in hisi_ptt_wait_tuning_finish()
48 desc = ext_attr->var; in hisi_ptt_tune_attr_show()
50 mutex_lock(&hisi_ptt->tune_lock); in hisi_ptt_tune_attr_show()
52 reg = readl(hisi_ptt->iobase + HISI_PTT_TUNING_CTRL); in hisi_ptt_tune_attr_show()
55 desc->event_code); in hisi_ptt_tune_attr_show()
56 writel(reg, hisi_ptt->iobase + HISI_PTT_TUNING_CTRL); in hisi_ptt_tune_attr_show()
59 writel(~0U, hisi_ptt->iobase + HISI_PTT_TUNING_DATA); in hisi_ptt_tune_attr_show()
62 mutex_unlock(&hisi_ptt->tune_lock); in hisi_ptt_tune_attr_show()
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-xiaomi-mocha.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/input/ti-drv260x.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/thermal/thermal.h>
15 chassis-type = "tablet";
30 stdout-path = "serial0:115200n8";
41 avdd-dsi-csi-supply = <&avdd_dsi_csi>;
[all …]
/linux/drivers/net/ethernet/intel/igbvf/
H A Dvf.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009 - 2018 Intel Corporation. */
22 * e1000_init_mac_params_vf - Inits MAC params
27 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_params_vf()
29 /* VF's have no MTA Registers - PF feature only */ in e1000_init_mac_params_vf()
30 mac->mta_reg_count = 128; in e1000_init_mac_params_vf()
32 mac->rar_entry_count = 1; in e1000_init_mac_params_vf()
36 mac->ops.reset_hw = e1000_reset_hw_vf; in e1000_init_mac_params_vf()
38 mac->ops.init_hw = e1000_init_hw_vf; in e1000_init_mac_params_vf()
40 mac->ops.check_for_link = e1000_check_for_link_vf; in e1000_init_mac_params_vf()
[all …]
/linux/drivers/scsi/be2iscsi/
H A Dbe_cmds.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * linux-drivers@broadcom.com
16 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
28 /* bits 0 - embedded */
29 /* bits 1 - 2 reserved */
30 /* bits 3 - 7 sge count */
31 /* bits 8 - 23 reserved */
32 /* bits 24 - 31 special */
43 struct be_sge sgl[19]; /* used by non-embedded cmds */
61 #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
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/linux/drivers/misc/
H A Dad525x_dpot.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 2009-2010 Analog Devices, Inc.
33 * AD5291 1 256 20, 50, 100 (20-TP)
34 * AD5292 1 1024 20, 50, 100 (20-TP)
56 * AD5270 1 1024 20, 50, 100 (50-TP)
57 * AD5271 1 256 20, 50, 100 (50-TP)
58 * AD5272 1 1024 20, 50, 100 (50-TP)
59 * AD5274 1 256 20, 50, 100 (50-TP)
61 * See Documentation/misc-devices/ad525x_dpot.rst for more info.
68 * Copyright (c) 2006-2011 Michael Hennerich <michael.hennerich@analog.com>
[all …]
/linux/drivers/media/i2c/
H A Dmax2175.c1 // SPDX-License-Identifier: GPL-2.0
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
30 #define mxm_dbg(ctx, fmt, arg...) dev_dbg(&ctx->client->dev, fmt, ## arg)
31 #define mxm_err(ctx, fmt, arg...) dev_err(&ctx->client->dev, fmt, ## arg)
264 struct v4l2_subdev sd; /* Sub-device */
273 struct v4l2_ctrl *hsls; /* High-side/Low-side polarity */
288 bool am_hiz; /* AM Hi-Z filter */
321 ret = regmap_read(ctx->regmap, idx, &regval); in max2175_read()
334 ret = regmap_write(ctx->regmap, idx, val); in max2175_write()
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/linux/Documentation/networking/
H A Dsnmp_counter.rst17 .. _RFC1213 ipInReceives: https://tools.ietf.org/html/rfc1213#page-26
30 .. _RFC1213 ipInDelivers: https://tools.ietf.org/html/rfc1213#page-28
41 .. _RFC1213 ipOutRequests: https://tools.ietf.org/html/rfc1213#page-28
60 .. _Explicit Congestion Notification: https://tools.ietf.org/html/rfc3168#page-6
73 .. _RFC1213 ipInHdrErrors: https://tools.ietf.org/html/rfc1213#page-27
81 .. _RFC1213 ipInAddrErrors: https://tools.ietf.org/html/rfc1213#page-27
98 .. _RFC1213 ipInUnknownProtos: https://tools.ietf.org/html/rfc1213#page-27
111 .. _RFC1213 ipInDiscards: https://tools.ietf.org/html/rfc1213#page-28
118 .. _RFC1213 ipOutDiscards: https://tools.ietf.org/html/rfc1213#page-28
125 .. _RFC1213 ipOutNoRoutes: https://tools.ietf.org/html/rfc1213#page-29
[all …]
/linux/drivers/ata/
H A Dsata_sil24.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_sil24.c - Driver for Silicon Image 3124/3132 SATA-2 controllers
17 #include <linux/dma-mapping.h>
30 __le16 ctrl; member
57 SIL24_MAX_SGT = (PAGE_SIZE - SIL24_PRB_SZ)
113 PORT_CTRL_STAT = 0x1000, /* write: ctrl-set, read: stat */
114 PORT_CTRL_CLR = 0x1004, /* write: ctrl-clear */
116 PORT_IRQ_ENABLE_SET = 0x1010, /* write: enable-set */
117 PORT_IRQ_ENABLE_CLR = 0x1014, /* write: enable-clear */
135 PORT_EXEC_DIAG = 0x1e00, /* 32bit exec diag * 16 (64 bytes, 0-10 used on 3124) */
[all …]
/linux/drivers/mailbox/
H A Dimx-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
27 /* TX0/RX0/RXDB[0-3] */
126 #define IMX_MU_xSR_GIPn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x))))
127 #define IMX_MU_xSR_RFn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
128 #define IMX_MU_xSR_TEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x))))
131 #define IMX_MU_xCR_GIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x))))
133 #define IMX_MU_xCR_RIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
135 #define IMX_MU_xCR_TIEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x))))
137 #define IMX_MU_xCR_GIRn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(16 + (3 - (x))))
150 iowrite32(val, priv->base + offs); in imx_mu_write()
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/linux/Documentation/fb/
H A Dsh7760fb.rst6 -----------
29 - drivers/video/sh7760fb.c
30 - include/asm-sh/sh7760fb.h
31 - Documentation/fb/sh7760fb.rst
34 -----------------
47 --------------------
62 * NEC NL6440bc26-01 640x480 TFT
82 .left_margin = 114, /* HTOT - (HSYNSLEN + HSYNSTART) */
83 .right_margin = 16, /* HSYNSTART - XRES */
84 .upper_margin = 33, /* VTOT - (VSYNLEN + VSYNSTART) */
[all …]
/linux/drivers/net/usb/
H A Dsmsc95xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2007-2008 SMSC
38 /* SCSRs - System Control and Status Registers */
126 #define AFC_CFG_HI_ (0x00FF0000) /* Auto Flow Ctrl High Level */
127 #define AFC_CFG_LO_ (0x0000FF00) /* Auto Flow Ctrl Low Level */
129 #define AFC_CFG_FC_MULT_ (0x00000008) /* Flow Ctrl on Mcast Frame */
130 #define AFC_CFG_FC_BRD_ (0x00000004) /* Flow Ctrl on Bcast Frame */
131 #define AFC_CFG_FC_ADD_ (0x00000002) /* Flow Ctrl on Addr. Decode */
132 #define AFC_CFG_FC_ANY_ (0x00000001) /* Flow Ctrl on Any Frame */
167 #define STRAP_STATUS_PWR_SEL_ (0x00000020) /* Device self-powered */
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