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/linux/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3528-ioc-grf
19 - rockchip,rk3528-pipe-phy-grf
20 - rockchip,rk3528-vo-grf
[all …]
/linux/Documentation/devicetree/bindings/gpu/
H A Darm,mali-valhall-csf.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liviu Dudau <liviu.dudau@arm.com>
11 - Boris Brezillon <boris.brezillon@collabora.com>
15 pattern: '^gpu@[a-f0-9]+$'
19 - items:
20 - enum:
21 - rockchip,rk3588-mali
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Drockchip-dw-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Niklas Cassel <cassel@kernel.org>
13 RK3588 SoC PCIe Endpoint controller is based on the Synopsys DesignWare
15 snps,dw-pcie-ep.yaml.
18 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
19 - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml#
24 - rockchip,rk3568-pcie-ep
[all …]
H A Drockchip-dw-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Lin <shawn.lin@rock-chips.com>
11 - Simon Xue <xxm@rock-chips.com>
12 - Heiko Stuebner <heiko@sntech.de>
17 snps,dw-pcie.yaml.
22 - const: rockchip,rk3568-pcie
23 - items:
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Drockchip-inno-csi-dphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC MIPI RX0 D-PHY
10 - Heiko Stuebner <heiko@sntech.de>
13 The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP which
19 - rockchip,px30-csi-dphy
20 - rockchip,rk1808-csi-dphy
21 - rockchip,rk3326-csi-dphy
[all …]
H A Drockchip,inno-usb2phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-usb2phy
16 - rockchip,rk3036-usb2phy
17 - rockchip,rk3128-usb2phy
18 - rockchip,rk3228-usb2phy
19 - rockchip,rk3308-usb2phy
[all …]
H A Dphy-rockchip-naneng-combphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3528-naneng-combphy
16 - rockchip,rk3562-naneng-combphy
17 - rockchip,rk3568-naneng-combphy
18 - rockchip,rk3576-naneng-combphy
19 - rockchip,rk3588-naneng-combphy
[all …]
/linux/Documentation/devicetree/bindings/arm/rockchip/
H A Dpmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Management Unit (PMU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The PMU is used to turn on and off different power domains of the SoCs.
15 This includes the power to the CPU cores.
22 - rockchip,px30-pmu
23 - rockchip,rk3066-pmu
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Drockchip,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
18 Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
20 Type-C PHY
21 Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml
28 - rockchip,rk3328-dwc3
29 - rockchip,rk3562-dwc3
30 - rockchip,rk3568-dwc3
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-nanopc-t6-lts.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
11 #include "rk3588-nanopc-t6.dtsi"
14 model = "FriendlyElec NanoPC-T6 LTS";
15 compatible = "friendlyarm,nanopc-t6-lts", "rockchip,rk3588";
17 /* provide power for on-board USB 2.0 hub */
18 vcc5v0_usb20_host: regulator-vcc5v0-usb20-host {
19 compatible = "regulator-fixed";
20 enable-active-high;
22 pinctrl-0 = <&usb20_host_pwren>;
[all …]
H A Drk3588-coolpi-cm5-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/soc/rockchip,vop2.h>
11 #include "rk3588-coolpi-cm5.dtsi"
14 model = "RK3588 CoolPi CM5 EVB";
15 compatible = "coolpi,pi-cm5-evb", "coolpi,pi-cm5", "rockchip,rk3588";
18 compatible = "pwm-backlight";
19 enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
[all …]
H A Drk3588-evb2-v10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,vop2.h>
13 #include "rk3588.dtsi"
16 model = "Rockchip RK3588 EVB2 V10 Board";
17 compatible = "rockchip,rk3588-evb2-v10", "rockchip,rk3588";
25 stdout-path = "serial2:1500000n8";
[all …]
H A Drk3588-orangepi-5-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/soc/rockchip,vop2.h>
11 #include <dt-bindings/usb/pd.h>
12 #include "rk3588-orangepi-5.dtsi"
16 compatible = "xunlong,orangepi-5-plus", "rockchip,rk3588";
18 hdmi0-con {
19 compatible = "hdmi-connector";
[all …]
H A Drk3588-armsom-w3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
8 #include "rk3588-armsom-lm7.dtsi"
12 compatible = "armsom,w3", "armsom,lm7", "rockchip,rk3588";
19 analog-sound {
20 compatible = "audio-graph-card";
21 label = "rk3588-es8316";
[all …]
H A Drk3588-coolpi-cm5-genbook.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/soc/rockchip,vop2.h>
11 #include "rk3588-coolpi-cm5.dtsi"
15 compatible = "coolpi,pi-cm5-genbook", "coolpi,pi-cm5", "rockchip,rk3588";
18 compatible = "pwm-backlight";
19 enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&bl_en>;
[all …]
H A Drk3588-firefly-core-3588j.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/pinctrl/rockchip.h>
6 #include "rk3588.dtsi"
9 compatible = "firefly,core-3588j", "rockchip,rk3588";
17 cpu-supply = <&vdd_cpu_big0_s0>;
21 cpu-supply = <&vdd_cpu_big0_s0>;
25 cpu-supply = <&vdd_cpu_big1_s0>;
29 cpu-supply = <&vdd_cpu_big1_s0>;
33 cpu-supply = <&vdd_cpu_lit_s0>;
[all …]
H A Drk3588-jaguar-pre-ict-tester.dtso1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
5 * Device Tree Overlay for the Pre-ICT tester adapter for the Mezzanine
6 * connector on RK3588 Jaguar.
8 * This adapter has a PCIe Gen2 x1 M.2 M-Key connector and two proprietary
10 * as 2-lane CSI).
12 * This adapter routes some GPIOs to power rails and loops together some other
19 /dts-v1/;
22 #include <dt-bindings/gpio/gpio.h>
23 #include <dt-bindings/pinctrl/rockchip.h>
26 pre_ict_tester_vcc_1v2: regulator-pre-ict-tester-vcc-1v2 {
[all …]
H A Drk3588-toybrick-x0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include "rk3588.dtsi"
15 model = "Rockchip Toybrick TB-RK3588X Board";
16 compatible = "rockchip,rk3588-toybrick-x0", "rockchip,rk3588";
23 stdout-path = "serial2:1500000n8";
26 adc-keys {
[all …]
H A Drk3588-jaguar.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,vop2.h>
12 #include <dt-bindings/usb/pd.h>
14 #include "rk3588.dtsi"
17 model = "Theobroma Systems RK3588-SBC Jaguar";
[all …]
H A Drk3588-evb1-v10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,vop2.h>
13 #include <dt-bindings/usb/pd.h>
14 #include "rk3588.dtsi"
17 model = "Rockchip RK3588 EVB1 V10 Board";
18 compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588";
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Dsnps,dwcmshc-sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
11 - Jisheng Zhang <Jisheng.Zhang@synaptics.com>
16 - items:
17 - enum:
18 - rockchip,rk3528-dwcmshc
19 - rockchip,rk3562-dwcmshc
[all …]
/linux/Documentation/devicetree/bindings/power/
H A Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Drockchip-rga.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/rockchip-rga.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Jacob Chen <jacob-chen@iotwrt.com>
16 - Ezequiel Garcia <ezequiel@collabora.com>
21 - const: rockchip,rk3288-rga
22 - const: rockchip,rk3399-rga
23 - items:
24 - enum:
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
25 - const: rockchip,rk3188-i2c
26 - const: rockchip,rk3228-i2c
[all …]

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