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Searched +full:rk3328 +full:- +full:grf +full:- +full:gpio (Results 1 – 18 of 18) sorted by relevance

/linux/Documentation/devicetree/bindings/gpio/
H A Drockchip,rk3328-grf-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3328 General Register Files GPIO controller
10 The Rockchip RK3328 General Register File (GRF) outputs only the
14 The GPIO node should be declared as the child of the GRF node.
21 the second cell is used to specify the GPIO polarity
26 - Heiko Stuebner <heiko@sntech.de>
30 const: rockchip,rk3328-grf-gpio
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/linux/Documentation/devicetree/bindings/sound/
H A Drockchip,rk3328-codec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,rk3328-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip rk3328 internal codec
10 - Heiko Stuebner <heiko@sntech.de>
12 - $ref: dai-common.yaml#
17 const: rockchip,rk3328-codec
24 - description: clock for audio codec
25 - description: clock for I2S master clock
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/linux/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip General Register Files (GRF)
10 - Heiko Stuebner <heiko@sntech.de>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3566-pipe-grf
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/linux/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rv1126-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rv1126-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
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/linux/sound/soc/codecs/
H A Drk3328_codec.c1 // SPDX-License-Identifier: GPL-2.0
3 // rk3328 ALSA SoC Audio driver
10 #include <linux/gpio/consumer.h>
22 * 0: -39dB
56 static int rk3328_codec_reset(struct rk3328_codec_priv *rk3328) in rk3328_codec_reset() argument
58 regmap_write(rk3328->regmap, CODEC_RESET, 0x00); in rk3328_codec_reset()
60 regmap_write(rk3328->regmap, CODEC_RESET, 0x03); in rk3328_codec_reset()
67 struct rk3328_codec_priv *rk3328 = in rk3328_set_dai_fmt() local
68 snd_soc_component_get_drvdata(dai->component); in rk3328_set_dai_fmt()
79 return -EINVAL; in rk3328_set_dai_fmt()
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3328-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 compatible = "rockchip,rk3328";
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H A Drk356x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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H A Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
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H A Drk3588-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/power/rk3588-power.h>
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/ata/ahci.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
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H A Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Drockchip,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
16 options with option 0 being used as a GPIO.
18 Please refer to pinctrl-bindings.txt in this directory for details of the
26 various pad settings such as pull-up, etc.
29 defined as gpio sub-nodes of the pinmux controller.
34 - rockchip,px30-pinctrl
35 - rockchip,rk2928-pinctrl
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/linux/drivers/gpio/
H A Dgpio-syscon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SYSCON GPIO driver
9 #include <linux/gpio/driver.h>
20 /* SYSCON driver is designed to use 32-bit wide registers */
25 * struct syscon_gpio_data - Configuration for the device.
31 * @dat_bit_offset: Offset (in bits) to the first GPIO bit.
33 * GPIO direction (Used with GPIO_SYSCON_FEAT_DIR flag).
61 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; in syscon_gpio_get()
63 ret = regmap_read(priv->syscon, in syscon_gpio_get()
76 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; in syscon_gpio_set()
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/linux/drivers/soc/rockchip/
H A Dio-domain.c1 // SPDX-License-Identifier: GPL-2.0-only
22 * "Recommended Operating Conditions" for "Digital GPIO". When the typical
26 * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
28 * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
80 struct regmap *grf; member
88 struct rockchip_iodomain *iod = supply->iod; in rk3568_iodomain_write()
93 switch (supply->idx) { in rk3568_iodomain_write()
97 b = supply->idx; in rk3568_iodomain_write()
99 b = supply->idx + 4; in rk3568_iodomain_write()
102 regmap_write(iod->grf, RK3568_PMU_GRF_IO_VSEL2, val0); in rk3568_iodomain_write()
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/linux/Documentation/devicetree/bindings/thermal/
H A Drockchip-thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
12 $ref: thermal-sensor.yaml#
17 - rockchip,px30-tsadc
18 - rockchip,rk3228-tsadc
19 - rockchip,rk3288-tsadc
20 - rockchip,rk3328-tsadc
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/linux/drivers/thermal/
H A Drockchip_thermal.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
4 * Caesar Wang <wxt@rock-chips.com>
25 * or via GPIO give PMIC.
55 * struct chip_tsadc_table - hold information about chip-specific differences
69 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
72 * @tshut_temp: the hardware-controlled shutdown temperature value
73 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
74 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
80 * @set_tshut_temp: set the hardware-controlled shutdown temperature
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/linux/drivers/pinctrl/
H A Dpinctrl-rockchip.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2020-2021 Rockchip Electronics Co. Ltd.
8 * With some ideas taken from pinctrl-samsung:
14 * and pinctrl-at91:
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
196 RK3328, enumerator
243 * @offset: if initialized to -1 it will be autocalculated, by specifying
276 * @offset: if initialized to -1 it will be autocalculated, by specifying
290 * @reg_base: register base of the gpio bank
292 * @clk: clock of the gpio bank
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H A Dpinctrl-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * With some ideas taken from pinctrl-samsung:
14 * and pinctrl-at91:
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
23 #include <linux/gpio/driver.h>
30 #include <linux/pinctrl/pinconf-generic.h>
37 #include <dt-bindings/pinctrl/rockchip.h>
41 #include "pinctrl-rockchip.h"
67 { .offset = -1 }, \
68 { .offset = -1 }, \
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/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-usb2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
11 #include <linux/extcon-provider.h>
14 #include <linux/gpio/consumer.h>
50 * enum usb_chg_state - Different states involved in USB charger detection.
89 * struct rockchip_chg_det_reg - usb charger detect registers
115 * struct rockchip_usb2phy_port_cfg - usb-phy port configuration.
169 * struct rockchip_usb2phy_cfg - usb-phy configuration.
170 * @reg: the address offset of grf for usb-phy config.
174 * @port_cfgs: usb-phy port configurations.
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