Home
last modified time | relevance | path

Searched +full:riscv +full:- +full:non +full:- +full:isa (Results 1 – 10 of 10) sorted by relevance

/linux/arch/riscv/kernel/
H A Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <asm/text-patching.h>
32 #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
40 /* Host ISA bitmap */
43 /* Per-cpu ISA extensions. */
49 * riscv_isa_extension_base() - Get base extension word
51 * @isa_bitmap: ISA bitmap to use
54 * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
63 * __riscv_isa_extension_available() - Check whether given extension
66 * @isa_bitmap: ISA bitmap to use
[all …]
/linux/Documentation/devicetree/bindings/iommu/
H A Driscv,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iommu/riscv,iommu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V IOMMU Architecture Implementation
10 - Tomasz Jeznach <tjeznach@rivosinc.com>
13 The RISC-V IOMMU provides memory address translation and isolation for
14 input and output devices, supporting per-device translation context,
17 It supports identical translation table format to the RISC-V address
19 Hardware uses in-memory command and fault reporting queues with wired
[all …]
/linux/Documentation/devicetree/bindings/perf/
H A Driscv,pmu.yaml1 # SPDX-License-Identifier: BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/perf/riscv,pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V SBI PMU events
10 - Atish Patra <atishp@rivosinc.com>
31 https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc
35 const: riscv,pmu
37 riscv,event-to-mhpmevent:
38 $ref: /schemas/types.yaml#/definitions/uint32-matrix
[all …]
/linux/Documentation/devicetree/bindings/cpu/
H A Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
22 run-time, can be specified through device tree bindings representing the
[all …]
/linux/drivers/misc/lkdtm/
H A Dcfi.c1 // SPDX-License-Identifier: GPL-2.0
55 # define __no_pac "branch-protection=bti"
58 # define __no_pac "branch-protection=none"
60 # define __no_pac "sign-return-address=none"
72 /* https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc#frame-pointer-con…
73 #define FRAME_RA_OFFSET (-1)
124 * constants in -02. in lkdtm_CFI_BACKWARD()
/linux/arch/riscv/boot/dts/canaan/
H A Dk210.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
6 #include <dt-bindings/clock/k210-clk.h>
7 #include <dt-bindings/pinctrl/k210-fpioa.h>
8 #include <dt-bindings/reset/k210-rst.h>
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "canaan,kendryte-k210";
21 * Since this is a non-ratified draft specification, the kernel does not
[all …]
/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt16 force -- enable ACPI if default was off
17 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
18 off -- disable ACPI if default was on
19 noirq -- do not use ACPI for IRQ routing
20 strict -- Be less tolerant of platforms that are not
22 rsdt -- prefer RSDT over (default) XSDT
23 copy_dsdt -- copy DSDT to memory
24 nocmcff -- Disable firmware first mode for corrected
28 nospcr -- disable console in ACPI SPCR table as
45 If set to vendor, prefer vendor-specific driver
[all …]
/linux/tools/lib/bpf/
H A Dbpf_tracing.h1 /* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */
114 /* i386 kernel is built with -mregparm=3 */
161 * https://github.com/IBM/s390x-abi/releases/download/v1.6/lzsabi_s390x.pdf
182 #define PT_REGS_PARM1_SYSCALL(x) (((const struct pt_regs___s390 *)(x))->__PT_PARM1_SYSCALL_REG)
195 * https://github.com/ARM-software/abi-aa/blob/main/aapcs32/aapcs32.rst#machine-registers
220 * https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#machine-registers
244 #define PT_REGS_PARM1_SYSCALL(x) (((const struct pt_regs___arm64 *)(x))->__PT_PARM1_SYSCALL_REG)
286 * http://refspecs.linux-foundation.org/elf/elfspec_ppc.pdf (page 3-14,
351 …* https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc#risc-v-calling-co…
358 /* riscv provides struct user_regs_struct instead of struct pt_regs to userspace */
[all …]
/linux/Documentation/virt/kvm/
H A Dapi.rst1 .. SPDX-License-Identifier: GPL-2.0
4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation
24 - System ioctls: These query and set global attributes which affect the
28 - VM ioctls: These query and set attributes that affect an entire virtual
35 - vcpu ioctls: These query and set attributes that control the operation
43 - device ioctls: These query and set attributes that control the operation
92 facility that allows backward-compatible extensions to the API to be
133 -----------------------
150 -----------------
189 address used by the VM. The IPA_Bits is encoded in bits[7-0] of the
[all …]
/linux/include/acpi/
H A Dactbl2.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: actbl2.h - ACPI Table Definitions
6 * Copyright (C) 2000 - 2025, Intel Corp.
44 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */
54 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
55 #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */
64 * All tables must be byte-packed to match the ACPI specification, since
74 * essentially useless for dealing with packed data in on-disk formats or
83 * AEST - Arm Error Source Table
94 /* Common Subtable header - one per Node Structure (Subtable) */
[all …]