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/linux/Documentation/devicetree/bindings/watchdog/
H A Datmel,at91sam9-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/watchdog/atmel,at91sam9-wdt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Eugen Hristev <eugen.hristev@microchip.com>
15 const: atmel,at91sam9260-wdt
26 atmel,max-heartbeat-sec:
32 atmel,min-heartbeat-sec:
35 must be smaller than the max-heartbeat-sec value. It is used to
39 atmel,watchdog-type:
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H A Daspeed,ast2400-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/aspeed,ast2400-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@codeconstruct.com.au>
15 - aspeed,ast2400-wdt
16 - aspeed,ast2500-wdt
17 - aspeed,ast2600-wdt
29 aspeed,reset-type:
32 - cpu
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/linux/Documentation/devicetree/bindings/clock/
H A Dstericsson,u8500-clks.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/stericsson,u8500-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 (U8500) clocks
10 - Ulf Hansson <ulf.hansson@linaro.org>
11 - Linus Walleij <linus.walleij@linaro.org>
14 DB8500 digital baseband system-on-chip and its siblings such as
16 itself, not off-chip clocks. There are four different on-chip
17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
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/linux/drivers/media/pci/cx23885/
H A Dcx23885-cards.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <media/drv-intf/cx25840.h>
19 #include "netup-eeprom.h"
20 #include "netup-init.h"
21 #include "altera-ci.h"
24 #include "cx23888-ir.h"
29 "NetUP Dual DVB-T/C CI card revision");
35 "\t\t\tHVR-1250 (reported safe)\n"
41 /* ------------------------------------------------------------------ */
50 .type = CX23885_VMUX_COMPOSITE1,
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/linux/drivers/firmware/efi/
H A Dcapsule.c1 // SPDX-License-Identifier: GPL-2.0
25 static int efi_reset_type = -1;
34 * efi_capsule_pending - has a capsule been passed to the firmware?
35 * @reset_type: store the type of EFI reset if capsule is pending
38 * firmware we need to perform a specific type of reset. If a capsule is
39 * pending return the reset type in @reset_type.
47 * A non-racy use is from platform reboot code because we use
74 * efi_capsule_supported - does the firmware support the capsule?
78 * @reset: the reset type required for this capsule
83 * No attempt is made to check @reset against the reset type required
[all …]
/linux/Documentation/devicetree/bindings/firmware/xilinx/
H A Dxlnx,zynqmp-firmware.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
12 description: The zynqmp-firmware node describes the interface to platform
23 - description: For implementations complying for Zynq Ultrascale+ MPSoC.
24 const: xlnx,zynqmp-firmware
26 - description: For implementations complying for Versal.
27 const: xlnx,versal-firmware
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/linux/drivers/input/keyboard/
H A Dsunkbd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1999-2001 Vojtech Pavlik
53 * Per-keyboard data.
64 char type; member
66 volatile s8 reset; member
80 if (sunkbd->reset <= -1) { in sunkbd_interrupt()
82 * If cp[i] is 0xff, sunkbd->reset will stay -1. in sunkbd_interrupt()
85 sunkbd->reset = data; in sunkbd_interrupt()
86 wake_up_interruptible(&sunkbd->wait); in sunkbd_interrupt()
90 if (sunkbd->layout == -1) { in sunkbd_interrupt()
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/linux/Documentation/driver-api/
H A Dreset.rst1 .. SPDX-License-Identifier: GPL-2.0-only
4 Reset controller API
10 Reset controllers are central units that control the reset signals to multiple
12 The reset controller API is split into two parts:
13 the `consumer driver interface <#consumer-driver-interface>`__ (`API reference
14 <#reset-consumer-api>`__), which allows peripheral drivers to request control
15 over their reset input signals, and the `reset controller driver interface
16 <#reset-controller-driver-interface>`__ (`API reference
17 <#reset-controller-driver-api>`__), which is used by drivers for reset
18 controller devices to register their reset controls to provide them to the
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/linux/Documentation/devicetree/bindings/arm/bcm/
H A Draspberrypi,bcm2835-firmware.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/bcm/raspberrypi,bcm2835-firmware.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
11 - Stefan Wahren <wahrenst@gmx.net>
17 const: raspberrypi,bcm2835-firmware
20 - compatible
25 - const: raspberrypi,bcm2835-firmware
26 - const: simple-mfd
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/linux/drivers/infiniband/hw/irdma/
H A Dtrace_cm.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2019 - 2021 Intel Corporation */
28 TP_fast_assign(__entry->iwdev = iwdev;
29 __entry->lport = cm_info->loc_port;
30 __entry->ipv4 = cm_info->ipv4;
32 cm_info->loc_addr, 4);
35 __entry->iwdev,
37 __entry->lport, __entry->ipv4)
51 TP_fast_assign(__entry->iwdev = listener->iwdev;
52 __entry->lport = listener->loc_port;
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/linux/Documentation/devicetree/bindings/net/
H A Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
22 pattern: '^mdio(-(bus|external))?(@.+|-([0-9]+))?$'
24 "#address-cells":
27 "#size-cells":
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H A Dsmsc,lan9115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: ethernet-controller.yaml#
18 - const: smsc,lan9115
19 - items:
20 - enum:
21 - smsc,lan89218
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/linux/drivers/net/ethernet/sfc/siena/
H A Defx_common.c1 // SPDX-License-Identifier: GPL-2.0-only
37 * On Falcon-based NICs, this will:
38 * - Check the on-board hardware monitor;
39 * - Poll the link state and reconfigure the hardware as necessary.
40 * On Siena-based NICs for power systems with EEH support, this will give EEH a
45 /* How often and how many times to poll for a reset while waiting for a
72 #define RESET_TYPE(type) \ argument
73 STRING_TABLE_LOOKUP(type, efx_reset_type)
107 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
108 * queued onto this work queue. This is not a per-nic work queue, because
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/linux/Documentation/devicetree/bindings/net/nfc/
H A Dmarvell,nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - marvell,nfc-i2c
16 - marvell,nfc-spi
17 - marvell,nfc-uart
19 hci-muxed:
20 type: boolean
30 reset-n-io:
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/linux/drivers/mfd/
H A Dmadera-core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2015-2018 Cirrus Logic
50 .name = "madera-ldo1",
62 { .name = "madera-pinctrl", },
63 { .name = "madera-irq", },
64 { .name = "madera-gpio", },
66 .name = "madera-extcon",
71 .name = "cs47l15-codec",
86 { .name = "madera-pinctrl", },
87 { .name = "madera-irq", },
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H A Darizona-spi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arizona-spi.c -- Arizona SPI bus interface
21 #include <uapi/linux/input-event-codes.h>
32 { "reset-gpios", &reset_gpios, 1, },
33 { "wlf,ldoena-gpios", &ldoena_gpios, 1 },
38 * The ACPI resources for the device only describe external GPIO-s. They do
39 * not provide mappings for the GPIO-s coming from the Arizona codec itself.
42 { "arizona", 2, "wlf,spkvdd-ena", 0, GPIO_ACTIVE_HIGH },
43 { "arizona", 4, "wlf,micd-pol", 0, GPIO_ACTIVE_LOW },
58 /* Add mappings for the 2 ACPI declared GPIOs used for reset and ldo-ena */ in arizona_spi_acpi_windows_probe()
[all …]
/linux/drivers/reset/
H A Dreset-eyeq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Reset driver for the Mobileye EyeQ5, EyeQ6L and EyeQ6H platforms.
6 * have a single OLB instance for a single reset controller. EyeQ6H has seven
7 * OLB instances; three host reset controllers.
9 * Each reset controller has one or more domain. Domains are of a given type
13 * Domain types define expected behavior: one-register-per-reset,
14 * one-bit-per-reset, status detection method, busywait duration, etc.
16 * We use eqr_ as prefix, as-in "EyeQ Reset", but way shorter.
18 * Known resets in EyeQ5 domain 0 (type EQR_EYEQ5_SARCR):
27 * Known resets in EyeQ5 domain 1 (type EQR_EYEQ5_ACRP):
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/linux/drivers/phy/allwinner/
H A Dphy-sun9i-usb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2014-2015 Chen-Yu Tsai <wens@csie.org>
7 * Based on phy-sun4i-usb.c from
21 #include <linux/reset.h>
38 struct reset_control *reset; member
41 enum usb_phy_interface type; member
52 if (phy->type == USBPHY_INTERFACE_MODE_HSIC) in sun9i_usb_phy_passby()
56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby()
63 writel(reg_value, phy->pmu); in sun9i_usb_phy_passby()
71 ret = clk_prepare_enable(phy->clk); in sun9i_usb_phy_init()
[all …]
/linux/drivers/clk/baikal-t1/
H A Dccu-rst.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Baikal-T1 CCU Resets interface driver
11 #define pr_fmt(fmt) "bt1-ccu-rst: " fmt
19 #include <linux/reset-controller.h>
22 #include <dt-bindings/reset/bt1-ccu.h>
24 #include "ccu-rst.h"
47 .type = CCU_RST_TRIG, \
54 .type = CCU_RST_DIR, \
60 enum ccu_rst_type type; member
66 * Each AXI-bus clock divider is equipped with the corresponding clock-consumer
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/linux/arch/powerpc/platforms/powernv/
H A Deeh-powernv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
33 #include <asm/ppc-pci.h>
34 #include <asm/pnv-pci.h>
40 static int eeh_event_irq = -EINVAL;
44 dev_dbg(&pdev->dev, "EEH: Setting up device\n"); in pnv_pcibios_bus_add_device()
69 struct pci_controller *hose = filp->private_data; in pnv_eeh_ei_write()
71 int pe_no, type, func; in pnv_eeh_ei_write() local
76 if (!eeh_ops || !eeh_ops->err_inject) in pnv_eeh_ei_write()
77 return -ENXIO; in pnv_eeh_ei_write()
82 return -EFAULT; in pnv_eeh_ei_write()
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/linux/Documentation/devicetree/bindings/phy/
H A Dphy-cadence-torrent.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j7200-serdes-10g
24 - ti,j721e-serdes-10g
26 '#address-cells':
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/linux/Documentation/watchdog/
H A Dmlx-wdt.rst15 Type 1:
19 Get time-left isn't supported
21 Type 2:
23 a user-defined timeout.
25 Get time-left is supported.
27 Type 3:
28 Same as Type 2 with extended maximum timeout period.
31 Type 1 HW watchdog implementation exist in old systems and
32 all new systems have type 2 HW watchdog.
35 Type 3 HW watchdog implementation can exist on all Mellanox systems
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Daldebaran.c36 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_is_mode2_default()
39 adev->gmc.xgmi.connected_to_cpu)) in aldebaran_is_mode2_default()
50 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_get_reset_handler()
53 if (reset_context->method == AMD_RESET_METHOD_NONE) { in aldebaran_get_reset_handler()
55 reset_context->method = AMD_RESET_METHOD_MODE2; in aldebaran_get_reset_handler()
57 reset_context->method = amdgpu_asic_reset_method(adev); in aldebaran_get_reset_handler()
60 if (reset_context->method != AMD_RESET_METHOD_NONE) { in aldebaran_get_reset_handler()
61 dev_dbg(adev->dev, "Getting reset handler for method %d\n", in aldebaran_get_reset_handler()
62 reset_context->method); in aldebaran_get_reset_handler()
64 if (handler->reset_method == reset_context->method) in aldebaran_get_reset_handler()
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Daspeed-lpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
21 The LPC controller is represented as a multi-function device to account for the
27 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
41 - enum:
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/linux/net/dccp/
H A Dinput.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 /* rate-limit for syncs in reply to sequence-invalid packets; RFC 4340, 7.5.4 */
24 __skb_pull(skb, dccp_hdr(skb)->dccph_doff * 4); in dccp_enqueue_skb()
25 __skb_queue_tail(&sk->sk_receive_queue, skb); in dccp_enqueue_skb()
27 sk->sk_data_ready(sk); in dccp_enqueue_skb()
38 sk->sk_shutdown = SHUTDOWN_MASK; in dccp_fin()
47 switch (sk->sk_state) { in dccp_rcv_close()
50 * - CLOSED (may be a late or duplicate packet) in dccp_rcv_close()
51 * - PASSIVE_CLOSEREQ (the peer has sent a CloseReq earlier) in dccp_rcv_close()
52 * - RESPOND (already handled by dccp_check_req) in dccp_rcv_close()
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