xref: /linux/drivers/media/pci/cx23885/cx23885-cards.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2b285192aSMauro Carvalho Chehab /*
3b285192aSMauro Carvalho Chehab  *  Driver for the Conexant CX23885 PCIe bridge
4b285192aSMauro Carvalho Chehab  *
5b285192aSMauro Carvalho Chehab  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6b285192aSMauro Carvalho Chehab  */
7b285192aSMauro Carvalho Chehab 
8e39682b5SMauro Carvalho Chehab #include "cx23885.h"
9e39682b5SMauro Carvalho Chehab 
10b285192aSMauro Carvalho Chehab #include <linux/init.h>
11b285192aSMauro Carvalho Chehab #include <linux/module.h>
12b285192aSMauro Carvalho Chehab #include <linux/pci.h>
13b285192aSMauro Carvalho Chehab #include <linux/delay.h>
14d647f0b7SMauro Carvalho Chehab #include <media/drv-intf/cx25840.h>
15b285192aSMauro Carvalho Chehab #include <linux/firmware.h>
16b285192aSMauro Carvalho Chehab #include <misc/altera.h>
17b285192aSMauro Carvalho Chehab 
18*d76231e4SMauro Carvalho Chehab #include "xc2028.h"
19b285192aSMauro Carvalho Chehab #include "netup-eeprom.h"
20b285192aSMauro Carvalho Chehab #include "netup-init.h"
21b285192aSMauro Carvalho Chehab #include "altera-ci.h"
22b285192aSMauro Carvalho Chehab #include "xc4000.h"
23b285192aSMauro Carvalho Chehab #include "xc5000.h"
24b285192aSMauro Carvalho Chehab #include "cx23888-ir.h"
25b285192aSMauro Carvalho Chehab 
2689343055SAnton Nurkin static unsigned int netup_card_rev = 4;
27b285192aSMauro Carvalho Chehab module_param(netup_card_rev, int, 0644);
28b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(netup_card_rev,
29b285192aSMauro Carvalho Chehab 		"NetUP Dual DVB-T/C CI card revision");
30b285192aSMauro Carvalho Chehab static unsigned int enable_885_ir;
31b285192aSMauro Carvalho Chehab module_param(enable_885_ir, int, 0644);
32b285192aSMauro Carvalho Chehab MODULE_PARM_DESC(enable_885_ir,
33b285192aSMauro Carvalho Chehab 		 "Enable integrated IR controller for supported\n"
34b285192aSMauro Carvalho Chehab 		 "\t\t    CX2388[57] boards that are wired for it:\n"
35b285192aSMauro Carvalho Chehab 		 "\t\t\tHVR-1250 (reported safe)\n"
36b285192aSMauro Carvalho Chehab 		 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
37b285192aSMauro Carvalho Chehab 		 "\t\t\tTeVii S470 (reported unsafe)\n"
38b285192aSMauro Carvalho Chehab 		 "\t\t    This can cause an interrupt storm with some cards.\n"
39b285192aSMauro Carvalho Chehab 		 "\t\t    Default: 0 [Disabled]");
40b285192aSMauro Carvalho Chehab 
41b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
42b285192aSMauro Carvalho Chehab /* board config info                                                  */
43b285192aSMauro Carvalho Chehab 
44b285192aSMauro Carvalho Chehab struct cx23885_board cx23885_boards[] = {
45b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_UNKNOWN] = {
46b285192aSMauro Carvalho Chehab 		.name		= "UNKNOWN/GENERIC",
47b285192aSMauro Carvalho Chehab 		/* Ensure safe default for unknown boards */
48b285192aSMauro Carvalho Chehab 		.clk_freq       = 0,
49b285192aSMauro Carvalho Chehab 		.input          = {{
50b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
51b285192aSMauro Carvalho Chehab 			.vmux   = 0,
52b285192aSMauro Carvalho Chehab 		}, {
53b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
54b285192aSMauro Carvalho Chehab 			.vmux   = 1,
55b285192aSMauro Carvalho Chehab 		}, {
56b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
57b285192aSMauro Carvalho Chehab 			.vmux   = 2,
58b285192aSMauro Carvalho Chehab 		}, {
59b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
60b285192aSMauro Carvalho Chehab 			.vmux   = 3,
61b285192aSMauro Carvalho Chehab 		} },
62b285192aSMauro Carvalho Chehab 	},
63b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
64b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800lp",
65b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
66b285192aSMauro Carvalho Chehab 		.input          = {{
67b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
68b285192aSMauro Carvalho Chehab 			.vmux   = 0,
69b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
70b285192aSMauro Carvalho Chehab 		}, {
71b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_DEBUG,
72b285192aSMauro Carvalho Chehab 			.vmux   = 0,
73b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff01,
74b285192aSMauro Carvalho Chehab 		}, {
75b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
76b285192aSMauro Carvalho Chehab 			.vmux   = 1,
77b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
78b285192aSMauro Carvalho Chehab 		}, {
79b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
80b285192aSMauro Carvalho Chehab 			.vmux   = 2,
81b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
82b285192aSMauro Carvalho Chehab 		} },
83b285192aSMauro Carvalho Chehab 	},
84b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
85b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1800",
86b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
87b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
88b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
89b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
90b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
91b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
92b285192aSMauro Carvalho Chehab 		.input          = {{
93b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
94b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
95b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
96b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
97b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
98b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
99b285192aSMauro Carvalho Chehab 		}, {
100b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
101b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
102b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
103b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
104b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
105b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
106b285192aSMauro Carvalho Chehab 		}, {
107b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
108b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
109b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
110b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
111b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
112b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
113b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
114b285192aSMauro Carvalho Chehab 		} },
115b285192aSMauro Carvalho Chehab 	},
116b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1250] = {
117b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1250",
118b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
119b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
120b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
121b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_PHILIPS_TDA8290,
122b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
123b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
124b285192aSMauro Carvalho Chehab #endif
125b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
126b285192aSMauro Carvalho Chehab 		.input          = {{
127b285192aSMauro Carvalho Chehab #ifdef MT2131_NO_ANALOG_SUPPORT_YET
128b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
129b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
130b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
131b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
132b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
133b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff00,
134b285192aSMauro Carvalho Chehab 		}, {
135b285192aSMauro Carvalho Chehab #endif
136b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
137b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
138b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
139b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
140b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
141b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
142b285192aSMauro Carvalho Chehab 		}, {
143b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
144b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
145b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
146b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
147b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
148b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
149b285192aSMauro Carvalho Chehab 			.gpio0  = 0xff02,
150b285192aSMauro Carvalho Chehab 		} },
151b285192aSMauro Carvalho Chehab 	},
152b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
153b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV5 Express",
154b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
155b285192aSMauro Carvalho Chehab 	},
156b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
157b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500Q",
158b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
159b285192aSMauro Carvalho Chehab 	},
160b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1500] = {
161b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1500",
162b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
163b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
164b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC2028,
165b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
166b285192aSMauro Carvalho Chehab 		.input          = {{
167b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
168b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
169b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
170b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1,
171b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
172b285192aSMauro Carvalho Chehab 		}, {
173b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
174b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
175b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
176b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
177b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
178b285192aSMauro Carvalho Chehab 		}, {
179b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
180b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
181b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
182b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
183b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
184b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
185b285192aSMauro Carvalho Chehab 		} },
186b285192aSMauro Carvalho Chehab 	},
187b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1200] = {
188b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1200",
189b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
190b285192aSMauro Carvalho Chehab 	},
191b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1700] = {
192b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1700",
193b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
194b285192aSMauro Carvalho Chehab 	},
195b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1400] = {
196b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1400",
197b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
198b285192aSMauro Carvalho Chehab 	},
199b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
200b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV7 Dual Express",
201b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
202b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
203b285192aSMauro Carvalho Chehab 	},
204b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
205b285192aSMauro Carvalho Chehab 		.name		= "DViCO FusionHDTV DVB-T Dual Express",
206b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
207b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
208b285192aSMauro Carvalho Chehab 	},
209b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
210b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H",
211b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
212b285192aSMauro Carvalho Chehab 	},
213642ca1a0SAnca Emanuel 	[CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
214642ca1a0SAnca Emanuel 		.name		= "Leadtek Winfast PxPVR2200",
215642ca1a0SAnca Emanuel 		.porta		= CX23885_ANALOG_VIDEO,
216642ca1a0SAnca Emanuel 		.tuner_type	= TUNER_XC2028,
217642ca1a0SAnca Emanuel 		.tuner_addr	= 0x61,
218642ca1a0SAnca Emanuel 		.tuner_bus	= 1,
219642ca1a0SAnca Emanuel 		.input		= {{
220642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_TELEVISION,
221642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN2_CH1 |
222642ca1a0SAnca Emanuel 				  CX25840_VIN5_CH2,
223642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO8,
224642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
225642ca1a0SAnca Emanuel 		}, {
226642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPOSITE1,
227642ca1a0SAnca Emanuel 			.vmux	= CX25840_COMPOSITE1,
228642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
229642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
230642ca1a0SAnca Emanuel 		}, {
231642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_SVIDEO,
232642ca1a0SAnca Emanuel 			.vmux	= CX25840_SVIDEO_LUMA3 |
233642ca1a0SAnca Emanuel 				  CX25840_SVIDEO_CHROMA4,
234642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
235642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
236642ca1a0SAnca Emanuel 		}, {
237642ca1a0SAnca Emanuel 			.type	= CX23885_VMUX_COMPONENT,
238642ca1a0SAnca Emanuel 			.vmux	= CX25840_VIN7_CH1 |
239642ca1a0SAnca Emanuel 				  CX25840_VIN6_CH2 |
240642ca1a0SAnca Emanuel 				  CX25840_VIN8_CH3 |
241642ca1a0SAnca Emanuel 				  CX25840_COMPONENT_ON,
242642ca1a0SAnca Emanuel 			.amux	= CX25840_AUDIO7,
243642ca1a0SAnca Emanuel 			.gpio0	= 0x704040,
244642ca1a0SAnca Emanuel 		} },
245642ca1a0SAnca Emanuel 	},
246b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
247b285192aSMauro Carvalho Chehab 		.name		= "Leadtek Winfast PxDVR3200 H XC4000",
248b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
249b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
250b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC4000,
251b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x61,
252b285192aSMauro Carvalho Chehab 		.radio_type	= UNSET,
253b285192aSMauro Carvalho Chehab 		.radio_addr	= ADDR_UNSET,
254b285192aSMauro Carvalho Chehab 		.input		= {{
255b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_TELEVISION,
256b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN2_CH1 |
257b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
258b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
259b285192aSMauro Carvalho Chehab 		}, {
260b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPOSITE1,
261b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_COMPOSITE1,
262b285192aSMauro Carvalho Chehab 		}, {
263b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_SVIDEO,
264b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_SVIDEO_LUMA3 |
265b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
266b285192aSMauro Carvalho Chehab 		}, {
267b285192aSMauro Carvalho Chehab 			.type	= CX23885_VMUX_COMPONENT,
268b285192aSMauro Carvalho Chehab 			.vmux	= CX25840_VIN7_CH1 |
269b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
270b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
271b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
272b285192aSMauro Carvalho Chehab 		} },
273b285192aSMauro Carvalho Chehab 	},
274b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
275b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E650F",
276b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
277b285192aSMauro Carvalho Chehab 	},
278b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TBS_6920] = {
279b285192aSMauro Carvalho Chehab 		.name		= "TurboSight TBS 6920",
280b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
281b285192aSMauro Carvalho Chehab 	},
282e6001482SLuis Alves 	[CX23885_BOARD_TBS_6980] = {
283e6001482SLuis Alves 		.name		= "TurboSight TBS 6980",
284e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
285e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
286e6001482SLuis Alves 	},
287e6001482SLuis Alves 	[CX23885_BOARD_TBS_6981] = {
288e6001482SLuis Alves 		.name		= "TurboSight TBS 6981",
289e6001482SLuis Alves 		.portb		= CX23885_MPEG_DVB,
290e6001482SLuis Alves 		.portc		= CX23885_MPEG_DVB,
291e6001482SLuis Alves 	},
292b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S470] = {
293b285192aSMauro Carvalho Chehab 		.name		= "TeVii S470",
294b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
295b285192aSMauro Carvalho Chehab 	},
296b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_DVBWORLD_2005] = {
297b285192aSMauro Carvalho Chehab 		.name		= "DVBWorld DVB-S2 2005",
298b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
299b285192aSMauro Carvalho Chehab 	},
300b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
301b285192aSMauro Carvalho Chehab 		.ci_type	= 1,
302b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-S2 CI",
303b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
304b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
305b285192aSMauro Carvalho Chehab 	},
306b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1270] = {
307b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1270",
308b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
309b285192aSMauro Carvalho Chehab 	},
310b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1275] = {
311b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1275",
312b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
313b285192aSMauro Carvalho Chehab 	},
314b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255] = {
315b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
316b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
317b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
318b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
319b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
320b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
321b285192aSMauro Carvalho Chehab 		.input          = {{
322b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
323b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
324b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
325b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
326b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
327b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
328b285192aSMauro Carvalho Chehab 		}, {
329b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
330b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
331b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
332b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
333b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
334b285192aSMauro Carvalho Chehab 		}, {
335b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
336b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
337b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
338b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
339b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
340b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
341b285192aSMauro Carvalho Chehab 		} },
342b285192aSMauro Carvalho Chehab 	},
343b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
344b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1255",
345b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
346b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
347b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
348b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
349b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
350b285192aSMauro Carvalho Chehab 		.input          = {{
351b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
352b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
353b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
354b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
355b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
356b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
357b285192aSMauro Carvalho Chehab 		}, {
358b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
359b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
360b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
361b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
362b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
363b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
364b285192aSMauro Carvalho Chehab 		} },
365b285192aSMauro Carvalho Chehab 	},
366b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1210] = {
367b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1210",
368b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
369b285192aSMauro Carvalho Chehab 	},
370b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8506] = {
371b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8506 DMB-TH",
372b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
373b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
374b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
375b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
376b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
377b285192aSMauro Carvalho Chehab 		.input		= {
378b285192aSMauro Carvalho Chehab 			{
379b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
380b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
381b285192aSMauro Carvalho Chehab 			},
382b285192aSMauro Carvalho Chehab 			{
383b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
384b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
385b285192aSMauro Carvalho Chehab 			},
386b285192aSMauro Carvalho Chehab 			{
387b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
388b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
389b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
390b285192aSMauro Carvalho Chehab 			},
391b285192aSMauro Carvalho Chehab 			{
392b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
393b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
394b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
395b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
396b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
397b285192aSMauro Carvalho Chehab 			},
398b285192aSMauro Carvalho Chehab 		},
399b285192aSMauro Carvalho Chehab 	},
400b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
401b285192aSMauro Carvalho Chehab 		.name		= "Magic-Pro ProHDTV Extreme 2",
402b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
403b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
404b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
405b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
406b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
407b285192aSMauro Carvalho Chehab 		.input		= {
408b285192aSMauro Carvalho Chehab 			{
409b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
410b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
411b285192aSMauro Carvalho Chehab 			},
412b285192aSMauro Carvalho Chehab 			{
413b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
414b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
415b285192aSMauro Carvalho Chehab 			},
416b285192aSMauro Carvalho Chehab 			{
417b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
418b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
419b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
420b285192aSMauro Carvalho Chehab 			},
421b285192aSMauro Carvalho Chehab 			{
422b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
423b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
424b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
425b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
426b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
427b285192aSMauro Carvalho Chehab 			},
428b285192aSMauro Carvalho Chehab 		},
429b285192aSMauro Carvalho Chehab 	},
430b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1850] = {
431b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1850",
432b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
433b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_ENCODER,
434b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
435b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_ABSENT,
436b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x42, /* 0x84 >> 1 */
437b285192aSMauro Carvalho Chehab 		.force_bff	= 1,
438b285192aSMauro Carvalho Chehab 		.input          = {{
439b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
440b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
441b285192aSMauro Carvalho Chehab 					CX25840_VIN5_CH2 |
442b285192aSMauro Carvalho Chehab 					CX25840_VIN2_CH1 |
443b285192aSMauro Carvalho Chehab 					CX25840_DIF_ON,
444b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO8,
445b285192aSMauro Carvalho Chehab 		}, {
446b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
447b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
448b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
449b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH1,
450b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
451b285192aSMauro Carvalho Chehab 		}, {
452b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
453b285192aSMauro Carvalho Chehab 			.vmux   =	CX25840_VIN7_CH3 |
454b285192aSMauro Carvalho Chehab 					CX25840_VIN4_CH2 |
455b285192aSMauro Carvalho Chehab 					CX25840_VIN8_CH1 |
456b285192aSMauro Carvalho Chehab 					CX25840_SVIDEO_ON,
457b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
458b285192aSMauro Carvalho Chehab 		} },
459b285192aSMauro Carvalho Chehab 	},
460b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
461b285192aSMauro Carvalho Chehab 		.name		= "Compro VideoMate E800",
462b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
463b285192aSMauro Carvalho Chehab 	},
464b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_HAUPPAUGE_HVR1290] = {
465b285192aSMauro Carvalho Chehab 		.name		= "Hauppauge WinTV-HVR1290",
466b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
467b285192aSMauro Carvalho Chehab 	},
468b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8558PRO] = {
469b285192aSMauro Carvalho Chehab 		.name		= "Mygica X8558 PRO DMB-TH",
470b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
471b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
472b285192aSMauro Carvalho Chehab 	},
473b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
474b285192aSMauro Carvalho Chehab 		.name           = "LEADTEK WinFast PxTV1200",
475b285192aSMauro Carvalho Chehab 		.porta          = CX23885_ANALOG_VIDEO,
476b285192aSMauro Carvalho Chehab 		.tuner_type     = TUNER_XC2028,
477b285192aSMauro Carvalho Chehab 		.tuner_addr     = 0x61,
478b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
479b285192aSMauro Carvalho Chehab 		.input          = {{
480b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
481b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
482b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2 |
483b285192aSMauro Carvalho Chehab 				  CX25840_NONE0_CH3,
484b285192aSMauro Carvalho Chehab 		}, {
485b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
486b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
487b285192aSMauro Carvalho Chehab 		}, {
488b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
489b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
490b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
491b285192aSMauro Carvalho Chehab 		}, {
492b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPONENT,
493b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN7_CH1 |
494b285192aSMauro Carvalho Chehab 				  CX25840_VIN6_CH2 |
495b285192aSMauro Carvalho Chehab 				  CX25840_VIN8_CH3 |
496b285192aSMauro Carvalho Chehab 				  CX25840_COMPONENT_ON,
497b285192aSMauro Carvalho Chehab 		} },
498b285192aSMauro Carvalho Chehab 	},
499b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
500b285192aSMauro Carvalho Chehab 		.name		= "GoTView X5 3D Hybrid",
501b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
502b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
503b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
504b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
505b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
506b285192aSMauro Carvalho Chehab 		.input          = {{
507b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_TELEVISION,
508b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_VIN2_CH1 |
509b285192aSMauro Carvalho Chehab 				  CX25840_VIN5_CH2,
510b285192aSMauro Carvalho Chehab 			.gpio0	= 0x02,
511b285192aSMauro Carvalho Chehab 		}, {
512b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
513b285192aSMauro Carvalho Chehab 			.vmux   = CX23885_VMUX_COMPOSITE1,
514b285192aSMauro Carvalho Chehab 		}, {
515b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_SVIDEO,
516b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_SVIDEO_LUMA3 |
517b285192aSMauro Carvalho Chehab 				  CX25840_SVIDEO_CHROMA4,
518b285192aSMauro Carvalho Chehab 		} },
519b285192aSMauro Carvalho Chehab 	},
520b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
521b285192aSMauro Carvalho Chehab 		.ci_type	= 2,
522b285192aSMauro Carvalho Chehab 		.name		= "NetUP Dual DVB-T/C-CI RF",
523b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
524b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
525b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
526b285192aSMauro Carvalho Chehab 		.num_fds_portb	= 2,
527b285192aSMauro Carvalho Chehab 		.num_fds_portc	= 2,
528b285192aSMauro Carvalho Chehab 		.tuner_type	= TUNER_XC5000,
529b285192aSMauro Carvalho Chehab 		.tuner_addr	= 0x64,
530b285192aSMauro Carvalho Chehab 		.input          = { {
531b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
532b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE1,
533b285192aSMauro Carvalho Chehab 		} },
534b285192aSMauro Carvalho Chehab 	},
535b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MPX885] = {
536b285192aSMauro Carvalho Chehab 		.name		= "MPX-885",
537b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
538b285192aSMauro Carvalho Chehab 		.input          = {{
539b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE1,
540b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE1,
541b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
542b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
543b285192aSMauro Carvalho Chehab 		}, {
544b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE2,
545b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE2,
546b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO6,
547b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
548b285192aSMauro Carvalho Chehab 		}, {
549b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE3,
550b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE3,
551b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
552b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
553b285192aSMauro Carvalho Chehab 		}, {
554b285192aSMauro Carvalho Chehab 			.type   = CX23885_VMUX_COMPOSITE4,
555b285192aSMauro Carvalho Chehab 			.vmux   = CX25840_COMPOSITE4,
556b285192aSMauro Carvalho Chehab 			.amux   = CX25840_AUDIO7,
557b285192aSMauro Carvalho Chehab 			.gpio0  = 0,
558b285192aSMauro Carvalho Chehab 		} },
559b285192aSMauro Carvalho Chehab 	},
560b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_MYGICA_X8507] = {
5610d1b5265SMauro Carvalho Chehab 		.name		= "Mygica X8502/X8507 ISDB-T",
562b285192aSMauro Carvalho Chehab 		.tuner_type = TUNER_XC5000,
563b285192aSMauro Carvalho Chehab 		.tuner_addr = 0x61,
564b285192aSMauro Carvalho Chehab 		.tuner_bus	= 1,
565b285192aSMauro Carvalho Chehab 		.porta		= CX23885_ANALOG_VIDEO,
5660d1b5265SMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
567b285192aSMauro Carvalho Chehab 		.input		= {
568b285192aSMauro Carvalho Chehab 			{
569b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_TELEVISION,
570b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE2,
571b285192aSMauro Carvalho Chehab 				.amux   = CX25840_AUDIO8,
572b285192aSMauro Carvalho Chehab 			},
573b285192aSMauro Carvalho Chehab 			{
574b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPOSITE1,
575b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPOSITE8,
576082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
577b285192aSMauro Carvalho Chehab 			},
578b285192aSMauro Carvalho Chehab 			{
579b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_SVIDEO,
580b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_SVIDEO_LUMA3 |
581b285192aSMauro Carvalho Chehab 						CX25840_SVIDEO_CHROMA4,
582082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
583b285192aSMauro Carvalho Chehab 			},
584b285192aSMauro Carvalho Chehab 			{
585b285192aSMauro Carvalho Chehab 				.type   = CX23885_VMUX_COMPONENT,
586b285192aSMauro Carvalho Chehab 				.vmux   = CX25840_COMPONENT_ON |
587b285192aSMauro Carvalho Chehab 					CX25840_VIN1_CH1 |
588b285192aSMauro Carvalho Chehab 					CX25840_VIN6_CH2 |
589b285192aSMauro Carvalho Chehab 					CX25840_VIN7_CH3,
590082c0576SAlfredo Jesús Delaiti 				.amux   = CX25840_AUDIO7,
591b285192aSMauro Carvalho Chehab 			},
592b285192aSMauro Carvalho Chehab 		},
593b285192aSMauro Carvalho Chehab 	},
594b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
595b285192aSMauro Carvalho Chehab 		.name		= "TerraTec Cinergy T PCIe Dual",
596b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
597b285192aSMauro Carvalho Chehab 		.portc		= CX23885_MPEG_DVB,
598b285192aSMauro Carvalho Chehab 	},
599b285192aSMauro Carvalho Chehab 	[CX23885_BOARD_TEVII_S471] = {
600b285192aSMauro Carvalho Chehab 		.name		= "TeVii S471",
601b285192aSMauro Carvalho Chehab 		.portb		= CX23885_MPEG_DVB,
602f667190bSMariusz Bia?o?czyk 	},
603f667190bSMariusz Bia?o?czyk 	[CX23885_BOARD_PROF_8000] = {
604f667190bSMariusz Bia?o?czyk 		.name		= "Prof Revolution DVB-S2 8000",
605f667190bSMariusz Bia?o?czyk 		.portb		= CX23885_MPEG_DVB,
6067c62f5a1SMichael Krufky 	},
6077c62f5a1SMichael Krufky 	[CX23885_BOARD_HAUPPAUGE_HVR4400] = {
608721f3223SMatthias Schwarzott 		.name		= "Hauppauge WinTV-HVR4400/HVR5500",
60936efec48SMatthias Schwarzott 		.porta		= CX23885_ANALOG_VIDEO,
6107c62f5a1SMichael Krufky 		.portb		= CX23885_MPEG_DVB,
61136efec48SMatthias Schwarzott 		.portc		= CX23885_MPEG_DVB,
61236efec48SMatthias Schwarzott 		.tuner_type	= TUNER_NXP_TDA18271,
61336efec48SMatthias Schwarzott 		.tuner_addr	= 0x60, /* 0xc0 >> 1 */
61436efec48SMatthias Schwarzott 		.tuner_bus	= 1,
6157c62f5a1SMichael Krufky 	},
616721f3223SMatthias Schwarzott 	[CX23885_BOARD_HAUPPAUGE_STARBURST] = {
617721f3223SMatthias Schwarzott 		.name		= "Hauppauge WinTV Starburst",
618721f3223SMatthias Schwarzott 		.portb		= CX23885_MPEG_DVB,
619721f3223SMatthias Schwarzott 	},
620e8d42373SOleh Kravchenko 	[CX23885_BOARD_AVERMEDIA_HC81R] = {
621e8d42373SOleh Kravchenko 		.name		= "AVerTV Hybrid Express Slim HC81R",
622e8d42373SOleh Kravchenko 		.tuner_type	= TUNER_XC2028,
623e8d42373SOleh Kravchenko 		.tuner_addr	= 0x61, /* 0xc2 >> 1 */
624e8d42373SOleh Kravchenko 		.tuner_bus	= 1,
625e8d42373SOleh Kravchenko 		.porta		= CX23885_ANALOG_VIDEO,
626e8d42373SOleh Kravchenko 		.input          = {{
627e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_TELEVISION,
628e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN2_CH1 |
629e8d42373SOleh Kravchenko 				  CX25840_VIN5_CH2 |
630e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
631e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
632e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO8,
633e8d42373SOleh Kravchenko 		}, {
634e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_SVIDEO,
635e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN8_CH1 |
636e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
637e8d42373SOleh Kravchenko 				  CX25840_VIN7_CH3 |
638e8d42373SOleh Kravchenko 				  CX25840_SVIDEO_ON,
639e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
640e8d42373SOleh Kravchenko 		}, {
641e8d42373SOleh Kravchenko 			.type   = CX23885_VMUX_COMPONENT,
642e8d42373SOleh Kravchenko 			.vmux   = CX25840_VIN1_CH1 |
643e8d42373SOleh Kravchenko 				  CX25840_NONE_CH2 |
644e8d42373SOleh Kravchenko 				  CX25840_NONE0_CH3 |
645e8d42373SOleh Kravchenko 				  CX25840_NONE1_CH3,
646e8d42373SOleh Kravchenko 			.amux   = CX25840_AUDIO6,
647e8d42373SOleh Kravchenko 		} },
648cce11b09SHans Verkuil 	},
64946b21bbaSJames Harper 	[CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
65046b21bbaSJames Harper 		.name		= "DViCO FusionHDTV DVB-T Dual Express2",
65146b21bbaSJames Harper 		.portb		= CX23885_MPEG_DVB,
65246b21bbaSJames Harper 		.portc		= CX23885_MPEG_DVB,
65346b21bbaSJames Harper 	},
654cce11b09SHans Verkuil 	[CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
655cce11b09SHans Verkuil 		.name		= "Hauppauge ImpactVCB-e",
656cce11b09SHans Verkuil 		.tuner_type	= TUNER_ABSENT,
657cce11b09SHans Verkuil 		.porta		= CX23885_ANALOG_VIDEO,
658cce11b09SHans Verkuil 		.input          = {{
659cce11b09SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE1,
660cb1318fdSBrad Love 			.vmux   = CX25840_VIN6_CH1,
661cce11b09SHans Verkuil 			.amux   = CX25840_AUDIO7,
662cce11b09SHans Verkuil 		}, {
663cce11b09SHans Verkuil 			.type   = CX23885_VMUX_SVIDEO,
664cb1318fdSBrad Love 			.vmux   = CX25840_VIN4_CH2 |
665cce11b09SHans Verkuil 				  CX25840_VIN8_CH1 |
666cce11b09SHans Verkuil 				  CX25840_SVIDEO_ON,
667cce11b09SHans Verkuil 			.amux   = CX25840_AUDIO7,
668cce11b09SHans Verkuil 		} },
669cce11b09SHans Verkuil 	},
67029442266SOlli Salonen 	[CX23885_BOARD_DVBSKY_T9580] = {
67129442266SOlli Salonen 		.name		= "DVBSky T9580",
67229442266SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
67329442266SOlli Salonen 		.portc		= CX23885_MPEG_DVB,
67429442266SOlli Salonen 	},
67582c10276SOlli Salonen 	[CX23885_BOARD_DVBSKY_T980C] = {
67682c10276SOlli Salonen 		.name		= "DVBSky T980C",
67782c10276SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
67882c10276SOlli Salonen 	},
6790e6c7b01Snibble.max 	[CX23885_BOARD_DVBSKY_S950C] = {
6800e6c7b01Snibble.max 		.name		= "DVBSky S950C",
6810e6c7b01Snibble.max 		.portb		= CX23885_MPEG_DVB,
6820e6c7b01Snibble.max 	},
68361b103e8SOlli Salonen 	[CX23885_BOARD_TT_CT2_4500_CI] = {
68461b103e8SOlli Salonen 		.name		= "Technotrend TT-budget CT2-4500 CI",
68561b103e8SOlli Salonen 		.portb		= CX23885_MPEG_DVB,
68661b103e8SOlli Salonen 	},
687cba5480cSnibble.max 	[CX23885_BOARD_DVBSKY_S950] = {
688cba5480cSnibble.max 		.name		= "DVBSky S950",
689cba5480cSnibble.max 		.portb		= CX23885_MPEG_DVB,
690cba5480cSnibble.max 	},
691c29d6a83Snibble.max 	[CX23885_BOARD_DVBSKY_S952] = {
692c29d6a83Snibble.max 		.name		= "DVBSky S952",
693c29d6a83Snibble.max 		.portb		= CX23885_MPEG_DVB,
694c29d6a83Snibble.max 		.portc		= CX23885_MPEG_DVB,
695c29d6a83Snibble.max 	},
696c02ef64aSNibble Max 	[CX23885_BOARD_DVBSKY_T982] = {
697c02ef64aSNibble Max 		.name		= "DVBSky T982",
698c02ef64aSNibble Max 		.portb		= CX23885_MPEG_DVB,
699c02ef64aSNibble Max 		.portc		= CX23885_MPEG_DVB,
700c02ef64aSNibble Max 	},
7011fc77d01SAntti Palosaari 	[CX23885_BOARD_HAUPPAUGE_HVR5525] = {
7021fc77d01SAntti Palosaari 		.name		= "Hauppauge WinTV-HVR5525",
7032be355a0SBrad Love 		.porta		= CX23885_ANALOG_VIDEO,
7041fc77d01SAntti Palosaari 		.portb		= CX23885_MPEG_DVB,
7051fc77d01SAntti Palosaari 		.portc		= CX23885_MPEG_DVB,
7062be355a0SBrad Love 		.tuner_type	= TUNER_ABSENT,
7072be355a0SBrad Love 		.force_bff	= 1,
7082be355a0SBrad Love 		.input		= {{
7092be355a0SBrad Love 			.type	= CX23885_VMUX_TELEVISION,
7102be355a0SBrad Love 			.vmux	=	CX25840_VIN7_CH3 |
7112be355a0SBrad Love 					CX25840_VIN5_CH2 |
7122be355a0SBrad Love 					CX25840_VIN2_CH1 |
7132be355a0SBrad Love 					CX25840_DIF_ON,
7142be355a0SBrad Love 			.amux   = CX25840_AUDIO8,
715cb1318fdSBrad Love 		}, {
716cb1318fdSBrad Love 			.type   = CX23885_VMUX_COMPOSITE1,
717cb1318fdSBrad Love 			.vmux   = CX25840_VIN6_CH1,
718cb1318fdSBrad Love 			.amux   = CX25840_AUDIO7,
719cb1318fdSBrad Love 		}, {
720cb1318fdSBrad Love 			.type   = CX23885_VMUX_SVIDEO,
721cb1318fdSBrad Love 			.vmux   = CX25840_VIN7_CH3 |
722cb1318fdSBrad Love 				  CX25840_VIN8_CH1 |
723cb1318fdSBrad Love 				  CX25840_SVIDEO_ON,
724cb1318fdSBrad Love 			.amux   = CX25840_AUDIO7,
7252be355a0SBrad Love 		} },
7261fc77d01SAntti Palosaari 	},
7276c43a217SHans Verkuil 	[CX23885_BOARD_VIEWCAST_260E] = {
7286c43a217SHans Verkuil 		.name		= "ViewCast 260e",
7296c43a217SHans Verkuil 		.porta		= CX23885_ANALOG_VIDEO,
7306c43a217SHans Verkuil 		.force_bff	= 1,
7316c43a217SHans Verkuil 		.input          = {{
7326c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE1,
7336c43a217SHans Verkuil 			.vmux   = CX25840_VIN6_CH1,
7346c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7356c43a217SHans Verkuil 		}, {
7366c43a217SHans Verkuil 			.type   = CX23885_VMUX_SVIDEO,
7376c43a217SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
7386c43a217SHans Verkuil 					CX25840_VIN5_CH1 |
7396c43a217SHans Verkuil 					CX25840_SVIDEO_ON,
7406c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7416c43a217SHans Verkuil 		}, {
7426c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPONENT,
7436c43a217SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
7446c43a217SHans Verkuil 					CX25840_VIN6_CH2 |
7456c43a217SHans Verkuil 					CX25840_VIN5_CH1 |
7466c43a217SHans Verkuil 					CX25840_COMPONENT_ON,
7476c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7486c43a217SHans Verkuil 		} },
7496c43a217SHans Verkuil 	},
7506c43a217SHans Verkuil 	[CX23885_BOARD_VIEWCAST_460E] = {
7516c43a217SHans Verkuil 		.name		= "ViewCast 460e",
7526c43a217SHans Verkuil 		.porta		= CX23885_ANALOG_VIDEO,
7536c43a217SHans Verkuil 		.force_bff	= 1,
7546c43a217SHans Verkuil 		.input          = {{
7556c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE1,
7566c43a217SHans Verkuil 			.vmux   = CX25840_VIN4_CH1,
7576c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7586c43a217SHans Verkuil 		}, {
7596c43a217SHans Verkuil 			.type   = CX23885_VMUX_SVIDEO,
7606c43a217SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
7616c43a217SHans Verkuil 					CX25840_VIN6_CH1 |
7626c43a217SHans Verkuil 					CX25840_SVIDEO_ON,
7636c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7646c43a217SHans Verkuil 		}, {
7656c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPONENT,
7666c43a217SHans Verkuil 			.vmux   = CX25840_VIN7_CH3 |
7676c43a217SHans Verkuil 					CX25840_VIN6_CH1 |
7686c43a217SHans Verkuil 					CX25840_VIN5_CH2 |
7696c43a217SHans Verkuil 					CX25840_COMPONENT_ON,
7706c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7716c43a217SHans Verkuil 		}, {
7726c43a217SHans Verkuil 			.type   = CX23885_VMUX_COMPOSITE2,
7736c43a217SHans Verkuil 			.vmux   = CX25840_VIN6_CH1,
7746c43a217SHans Verkuil 			.amux   = CX25840_AUDIO7,
7756c43a217SHans Verkuil 		} },
7766c43a217SHans Verkuil 	},
77710a5210eSStephen Backway 	[CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
77810a5210eSStephen Backway 		.name         = "Hauppauge WinTV-QuadHD-DVB",
77981118817SBrad Love 		.porta        = CX23885_ANALOG_VIDEO,
78010a5210eSStephen Backway 		.portb        = CX23885_MPEG_DVB,
78110a5210eSStephen Backway 		.portc        = CX23885_MPEG_DVB,
78281118817SBrad Love 		.tuner_type	= TUNER_ABSENT,
78381118817SBrad Love 		.force_bff	= 1,
78481118817SBrad Love 		.input          = {{
78581118817SBrad Love 			.type   = CX23885_VMUX_TELEVISION,
78681118817SBrad Love 			.vmux   =	CX25840_VIN7_CH3 |
78781118817SBrad Love 					CX25840_VIN5_CH2 |
78881118817SBrad Love 					CX25840_VIN2_CH1 |
78981118817SBrad Love 					CX25840_DIF_ON,
79081118817SBrad Love 			.amux   = CX25840_AUDIO8,
79181118817SBrad Love 		} },
79210a5210eSStephen Backway 	},
793c00ba2c1SBrad Love 	[CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885] = {
794c00ba2c1SBrad Love 		.name         = "Hauppauge WinTV-QuadHD-DVB(885)",
795c00ba2c1SBrad Love 		.portb        = CX23885_MPEG_DVB,
796c00ba2c1SBrad Love 		.portc        = CX23885_MPEG_DVB,
79781118817SBrad Love 		.tuner_type   = TUNER_ABSENT,
798c00ba2c1SBrad Love 	},
799dd9ad4fbSStephen Backway 	[CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
800dd9ad4fbSStephen Backway 		.name         = "Hauppauge WinTV-QuadHD-ATSC",
80181118817SBrad Love 		.porta        = CX23885_ANALOG_VIDEO,
802dd9ad4fbSStephen Backway 		.portb        = CX23885_MPEG_DVB,
803dd9ad4fbSStephen Backway 		.portc        = CX23885_MPEG_DVB,
80481118817SBrad Love 		.tuner_type	= TUNER_ABSENT,
80581118817SBrad Love 		.input          = {{
80681118817SBrad Love 			.type   = CX23885_VMUX_TELEVISION,
80781118817SBrad Love 			.vmux   =	CX25840_VIN7_CH3 |
80881118817SBrad Love 					CX25840_VIN5_CH2 |
80981118817SBrad Love 					CX25840_VIN2_CH1 |
81081118817SBrad Love 					CX25840_DIF_ON,
81181118817SBrad Love 			.amux   = CX25840_AUDIO8,
81281118817SBrad Love 		} },
813dd9ad4fbSStephen Backway 	},
814c00ba2c1SBrad Love 	[CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885] = {
815c00ba2c1SBrad Love 		.name         = "Hauppauge WinTV-QuadHD-ATSC(885)",
816c00ba2c1SBrad Love 		.portb        = CX23885_MPEG_DVB,
817c00ba2c1SBrad Love 		.portc        = CX23885_MPEG_DVB,
81881118817SBrad Love 		.tuner_type   = TUNER_ABSENT,
819c00ba2c1SBrad Love 	},
82094f11518SBrad Love 	[CX23885_BOARD_HAUPPAUGE_HVR1265_K4] = {
82194f11518SBrad Love 		.name		= "Hauppauge WinTV-HVR-1265(161111)",
82293e5b206SBrad Love 		.porta          = CX23885_ANALOG_VIDEO,
82394f11518SBrad Love 		.portc		= CX23885_MPEG_DVB,
82493e5b206SBrad Love 		.tuner_type     = TUNER_ABSENT,
82593e5b206SBrad Love 		.input          = {{
826f8e76a5eSBrad Love 			.type   = CX23885_VMUX_TELEVISION,
827f8e76a5eSBrad Love 			.vmux   =	CX25840_VIN7_CH3 |
828f8e76a5eSBrad Love 					CX25840_VIN5_CH2 |
829f8e76a5eSBrad Love 					CX25840_VIN2_CH1 |
830f8e76a5eSBrad Love 					CX25840_DIF_ON,
831f8e76a5eSBrad Love 			.amux   = CX25840_AUDIO8,
832f8e76a5eSBrad Love 		}, {
83393e5b206SBrad Love 			.type   = CX23885_VMUX_SVIDEO,
834cb1318fdSBrad Love 			.vmux   =	CX25840_VIN4_CH2 |
835cb1318fdSBrad Love 					CX25840_VIN6_CH1 |
83693e5b206SBrad Love 					CX25840_SVIDEO_ON,
83793e5b206SBrad Love 			.amux   = CX25840_AUDIO7,
83893e5b206SBrad Love 		} },
83994f11518SBrad Love 	},
84016fad674SBrad Love 	[CX23885_BOARD_HAUPPAUGE_STARBURST2] = {
84116fad674SBrad Love 		.name		= "Hauppauge WinTV-Starburst2",
84216fad674SBrad Love 		.portb		= CX23885_MPEG_DVB,
84316fad674SBrad Love 	},
844dc4cac67SForest Crossman 	[CX23885_BOARD_AVERMEDIA_CE310B] = {
845dc4cac67SForest Crossman 		.name		= "AVerMedia CE310B",
846dc4cac67SForest Crossman 		.porta		= CX23885_ANALOG_VIDEO,
847dc4cac67SForest Crossman 		.force_bff	= 1,
848dc4cac67SForest Crossman 		.input          = {{
849dc4cac67SForest Crossman 			.type   = CX23885_VMUX_COMPOSITE1,
850dc4cac67SForest Crossman 			.vmux   = CX25840_VIN1_CH1 |
851dc4cac67SForest Crossman 				  CX25840_NONE_CH2 |
852dc4cac67SForest Crossman 				  CX25840_NONE0_CH3,
853dc4cac67SForest Crossman 			.amux   = CX25840_AUDIO7,
854dc4cac67SForest Crossman 		}, {
855dc4cac67SForest Crossman 			.type   = CX23885_VMUX_SVIDEO,
856dc4cac67SForest Crossman 			.vmux   = CX25840_VIN8_CH1 |
857dc4cac67SForest Crossman 				  CX25840_NONE_CH2 |
858dc4cac67SForest Crossman 				  CX25840_VIN7_CH3 |
859dc4cac67SForest Crossman 				  CX25840_SVIDEO_ON,
860dc4cac67SForest Crossman 			.amux   = CX25840_AUDIO7,
861dc4cac67SForest Crossman 		} },
862dc4cac67SForest Crossman 	},
863b285192aSMauro Carvalho Chehab };
864b285192aSMauro Carvalho Chehab const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
865b285192aSMauro Carvalho Chehab 
866b285192aSMauro Carvalho Chehab /* ------------------------------------------------------------------ */
867b285192aSMauro Carvalho Chehab /* PCI subsystem IDs                                                  */
868b285192aSMauro Carvalho Chehab 
869b285192aSMauro Carvalho Chehab struct cx23885_subid cx23885_subids[] = {
870b285192aSMauro Carvalho Chehab 	{
871b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
872b285192aSMauro Carvalho Chehab 		.subdevice = 0x3400,
873b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_UNKNOWN,
874b285192aSMauro Carvalho Chehab 	}, {
875b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
876b285192aSMauro Carvalho Chehab 		.subdevice = 0x7600,
877b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
878b285192aSMauro Carvalho Chehab 	}, {
879b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
880b285192aSMauro Carvalho Chehab 		.subdevice = 0x7800,
881b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
882b285192aSMauro Carvalho Chehab 	}, {
883b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
884b285192aSMauro Carvalho Chehab 		.subdevice = 0x7801,
885b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
886b285192aSMauro Carvalho Chehab 	}, {
887b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
888b285192aSMauro Carvalho Chehab 		.subdevice = 0x7809,
889b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1800,
890b285192aSMauro Carvalho Chehab 	}, {
891b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
892b285192aSMauro Carvalho Chehab 		.subdevice = 0x7911,
893b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1250,
894b285192aSMauro Carvalho Chehab 	}, {
895b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
896b285192aSMauro Carvalho Chehab 		.subdevice = 0xd500,
897b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
898b285192aSMauro Carvalho Chehab 	}, {
899b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
900b285192aSMauro Carvalho Chehab 		.subdevice = 0x7790,
901b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
902b285192aSMauro Carvalho Chehab 	}, {
903b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
904b285192aSMauro Carvalho Chehab 		.subdevice = 0x7797,
905b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
906b285192aSMauro Carvalho Chehab 	}, {
907b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
908b285192aSMauro Carvalho Chehab 		.subdevice = 0x7710,
909b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
910b285192aSMauro Carvalho Chehab 	}, {
911b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
912b285192aSMauro Carvalho Chehab 		.subdevice = 0x7717,
913b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1500,
914b285192aSMauro Carvalho Chehab 	}, {
915b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
916b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d1,
917b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
918b285192aSMauro Carvalho Chehab 	}, {
919b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
920b285192aSMauro Carvalho Chehab 		.subdevice = 0x71d3,
921b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1200,
922b285192aSMauro Carvalho Chehab 	}, {
923b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
924b285192aSMauro Carvalho Chehab 		.subdevice = 0x8101,
925b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1700,
926b285192aSMauro Carvalho Chehab 	}, {
927b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
928b285192aSMauro Carvalho Chehab 		.subdevice = 0x8010,
929b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1400,
930b285192aSMauro Carvalho Chehab 	}, {
931b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
932b285192aSMauro Carvalho Chehab 		.subdevice = 0xd618,
933b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
934b285192aSMauro Carvalho Chehab 	}, {
935b285192aSMauro Carvalho Chehab 		.subvendor = 0x18ac,
936b285192aSMauro Carvalho Chehab 		.subdevice = 0xdb78,
937b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
938b285192aSMauro Carvalho Chehab 	}, {
939b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
940b285192aSMauro Carvalho Chehab 		.subdevice = 0x6681,
941b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
942b285192aSMauro Carvalho Chehab 	}, {
943b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
944642ca1a0SAnca Emanuel 		.subdevice = 0x6f21,
945642ca1a0SAnca Emanuel 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
946642ca1a0SAnca Emanuel 	}, {
947642ca1a0SAnca Emanuel 		.subvendor = 0x107d,
948b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f39,
949b285192aSMauro Carvalho Chehab 		.card	   = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
950b285192aSMauro Carvalho Chehab 	}, {
951b285192aSMauro Carvalho Chehab 		.subvendor = 0x185b,
952b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
953b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
954b285192aSMauro Carvalho Chehab 	}, {
955b285192aSMauro Carvalho Chehab 		.subvendor = 0x6920,
956b285192aSMauro Carvalho Chehab 		.subdevice = 0x8888,
957b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TBS_6920,
958b285192aSMauro Carvalho Chehab 	}, {
959e6001482SLuis Alves 		.subvendor = 0x6980,
960e6001482SLuis Alves 		.subdevice = 0x8888,
961e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6980,
962e6001482SLuis Alves 	}, {
963e6001482SLuis Alves 		.subvendor = 0x6981,
964e6001482SLuis Alves 		.subdevice = 0x8888,
965e6001482SLuis Alves 		.card      = CX23885_BOARD_TBS_6981,
966e6001482SLuis Alves 	}, {
967b285192aSMauro Carvalho Chehab 		.subvendor = 0xd470,
968b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
969b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S470,
970b285192aSMauro Carvalho Chehab 	}, {
971b285192aSMauro Carvalho Chehab 		.subvendor = 0x0001,
972b285192aSMauro Carvalho Chehab 		.subdevice = 0x2005,
973b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_DVBWORLD_2005,
974b285192aSMauro Carvalho Chehab 	}, {
975b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
976b285192aSMauro Carvalho Chehab 		.subdevice = 0x2a2c,
977b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
978b285192aSMauro Carvalho Chehab 	}, {
979b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
980b285192aSMauro Carvalho Chehab 		.subdevice = 0x2211,
981b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1270,
982b285192aSMauro Carvalho Chehab 	}, {
983b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
984b285192aSMauro Carvalho Chehab 		.subdevice = 0x2215,
985b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
986b285192aSMauro Carvalho Chehab 	}, {
987b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
988b285192aSMauro Carvalho Chehab 		.subdevice = 0x221d,
989b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
990b285192aSMauro Carvalho Chehab 	}, {
991b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
992b285192aSMauro Carvalho Chehab 		.subdevice = 0x2251,
993b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
994b285192aSMauro Carvalho Chehab 	}, {
995b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
996b285192aSMauro Carvalho Chehab 		.subdevice = 0x2259,
997b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
998b285192aSMauro Carvalho Chehab 	}, {
999b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1000b285192aSMauro Carvalho Chehab 		.subdevice = 0x2291,
1001b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1002b285192aSMauro Carvalho Chehab 	}, {
1003b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1004b285192aSMauro Carvalho Chehab 		.subdevice = 0x2295,
1005b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1006b285192aSMauro Carvalho Chehab 	}, {
1007b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1008b285192aSMauro Carvalho Chehab 		.subdevice = 0x2299,
1009b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1010b285192aSMauro Carvalho Chehab 	}, {
1011b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1012b285192aSMauro Carvalho Chehab 		.subdevice = 0x229d,
1013b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
1014b285192aSMauro Carvalho Chehab 	}, {
1015b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1016b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f0,
1017b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1018b285192aSMauro Carvalho Chehab 	}, {
1019b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1020b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f1,
1021b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1255,
1022b285192aSMauro Carvalho Chehab 	}, {
1023b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1024b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f2,
1025b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1275,
1026b285192aSMauro Carvalho Chehab 	}, {
1027b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1028b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f3,
1029b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
1030b285192aSMauro Carvalho Chehab 	}, {
1031b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1032b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f4,
1033b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210,
1034b285192aSMauro Carvalho Chehab 	}, {
1035b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1036b285192aSMauro Carvalho Chehab 		.subdevice = 0x22f5,
1037b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
1038b285192aSMauro Carvalho Chehab 	}, {
1039b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
1040b285192aSMauro Carvalho Chehab 		.subdevice = 0x8651,
1041b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8506,
1042b285192aSMauro Carvalho Chehab 	}, {
1043b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
1044b285192aSMauro Carvalho Chehab 		.subdevice = 0x8657,
1045b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MAGICPRO_PROHDTVE2,
1046b285192aSMauro Carvalho Chehab 	}, {
1047b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1048b285192aSMauro Carvalho Chehab 		.subdevice = 0x8541,
1049b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1850,
1050b285192aSMauro Carvalho Chehab 	}, {
1051b285192aSMauro Carvalho Chehab 		.subvendor = 0x1858,
1052b285192aSMauro Carvalho Chehab 		.subdevice = 0xe800,
1053b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
1054b285192aSMauro Carvalho Chehab 	}, {
1055b285192aSMauro Carvalho Chehab 		.subvendor = 0x0070,
1056b285192aSMauro Carvalho Chehab 		.subdevice = 0x8551,
1057b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1290,
1058b285192aSMauro Carvalho Chehab 	}, {
1059b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
1060b285192aSMauro Carvalho Chehab 		.subdevice = 0x8578,
1061b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8558PRO,
1062b285192aSMauro Carvalho Chehab 	}, {
1063b285192aSMauro Carvalho Chehab 		.subvendor = 0x107d,
1064b285192aSMauro Carvalho Chehab 		.subdevice = 0x6f22,
1065b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
1066b285192aSMauro Carvalho Chehab 	}, {
1067b285192aSMauro Carvalho Chehab 		.subvendor = 0x5654,
1068b285192aSMauro Carvalho Chehab 		.subdevice = 0x2390,
1069b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
1070b285192aSMauro Carvalho Chehab 	}, {
1071b285192aSMauro Carvalho Chehab 		.subvendor = 0x1b55,
1072b285192aSMauro Carvalho Chehab 		.subdevice = 0xe2e4,
1073b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
1074b285192aSMauro Carvalho Chehab 	}, {
1075b285192aSMauro Carvalho Chehab 		.subvendor = 0x14f1,
1076b285192aSMauro Carvalho Chehab 		.subdevice = 0x8502,
1077b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_MYGICA_X8507,
1078b285192aSMauro Carvalho Chehab 	}, {
1079b285192aSMauro Carvalho Chehab 		.subvendor = 0x153b,
1080b285192aSMauro Carvalho Chehab 		.subdevice = 0x117e,
1081b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
1082b285192aSMauro Carvalho Chehab 	}, {
1083b285192aSMauro Carvalho Chehab 		.subvendor = 0xd471,
1084b285192aSMauro Carvalho Chehab 		.subdevice = 0x9022,
1085b285192aSMauro Carvalho Chehab 		.card      = CX23885_BOARD_TEVII_S471,
1086f667190bSMariusz Bia?o?czyk 	}, {
1087f667190bSMariusz Bia?o?czyk 		.subvendor = 0x8000,
1088f667190bSMariusz Bia?o?czyk 		.subdevice = 0x3034,
1089f667190bSMariusz Bia?o?czyk 		.card      = CX23885_BOARD_PROF_8000,
10907c62f5a1SMichael Krufky 	}, {
10917c62f5a1SMichael Krufky 		.subvendor = 0x0070,
10927c62f5a1SMichael Krufky 		.subdevice = 0xc108,
1093721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
10947c62f5a1SMichael Krufky 	}, {
10957c62f5a1SMichael Krufky 		.subvendor = 0x0070,
10967c62f5a1SMichael Krufky 		.subdevice = 0xc138,
1097721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
10987c62f5a1SMichael Krufky 	}, {
10997c62f5a1SMichael Krufky 		.subvendor = 0x0070,
11007c62f5a1SMichael Krufky 		.subdevice = 0xc12a,
1101721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
11027c62f5a1SMichael Krufky 	}, {
11037c62f5a1SMichael Krufky 		.subvendor = 0x0070,
11047c62f5a1SMichael Krufky 		.subdevice = 0xc1f8,
1105721f3223SMatthias Schwarzott 		.card      = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
1106e8d42373SOleh Kravchenko 	}, {
1107e8d42373SOleh Kravchenko 		.subvendor = 0x1461,
1108e8d42373SOleh Kravchenko 		.subdevice = 0xd939,
1109e8d42373SOleh Kravchenko 		.card      = CX23885_BOARD_AVERMEDIA_HC81R,
1110cce11b09SHans Verkuil 	}, {
1111cce11b09SHans Verkuil 		.subvendor = 0x0070,
1112cce11b09SHans Verkuil 		.subdevice = 0x7133,
1113cce11b09SHans Verkuil 		.card      = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
111446b21bbaSJames Harper 	}, {
11158177733aSBrad Love 		.subvendor = 0x0070,
11168177733aSBrad Love 		.subdevice = 0x7137,
11178177733aSBrad Love 		.card      = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
11188177733aSBrad Love 	}, {
111946b21bbaSJames Harper 		.subvendor = 0x18ac,
112046b21bbaSJames Harper 		.subdevice = 0xdb98,
112146b21bbaSJames Harper 		.card      = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
112229442266SOlli Salonen 	}, {
112329442266SOlli Salonen 		.subvendor = 0x4254,
112429442266SOlli Salonen 		.subdevice = 0x9580,
112529442266SOlli Salonen 		.card      = CX23885_BOARD_DVBSKY_T9580,
112682c10276SOlli Salonen 	}, {
112782c10276SOlli Salonen 		.subvendor = 0x4254,
112882c10276SOlli Salonen 		.subdevice = 0x980c,
112982c10276SOlli Salonen 		.card      = CX23885_BOARD_DVBSKY_T980C,
11300e6c7b01Snibble.max 	}, {
11310e6c7b01Snibble.max 		.subvendor = 0x4254,
11320e6c7b01Snibble.max 		.subdevice = 0x950c,
11330e6c7b01Snibble.max 		.card      = CX23885_BOARD_DVBSKY_S950C,
113461b103e8SOlli Salonen 	}, {
113561b103e8SOlli Salonen 		.subvendor = 0x13c2,
113661b103e8SOlli Salonen 		.subdevice = 0x3013,
113761b103e8SOlli Salonen 		.card      = CX23885_BOARD_TT_CT2_4500_CI,
1138cba5480cSnibble.max 	}, {
1139cba5480cSnibble.max 		.subvendor = 0x4254,
1140cba5480cSnibble.max 		.subdevice = 0x0950,
1141cba5480cSnibble.max 		.card      = CX23885_BOARD_DVBSKY_S950,
1142c29d6a83Snibble.max 	}, {
1143c29d6a83Snibble.max 		.subvendor = 0x4254,
1144c29d6a83Snibble.max 		.subdevice = 0x0952,
1145c29d6a83Snibble.max 		.card      = CX23885_BOARD_DVBSKY_S952,
1146c02ef64aSNibble Max 	}, {
1147c02ef64aSNibble Max 		.subvendor = 0x4254,
1148c02ef64aSNibble Max 		.subdevice = 0x0982,
1149c02ef64aSNibble Max 		.card      = CX23885_BOARD_DVBSKY_T982,
11501fc77d01SAntti Palosaari 	}, {
11511fc77d01SAntti Palosaari 		.subvendor = 0x0070,
11521fc77d01SAntti Palosaari 		.subdevice = 0xf038,
11531fc77d01SAntti Palosaari 		.card      = CX23885_BOARD_HAUPPAUGE_HVR5525,
11546c43a217SHans Verkuil 	}, {
11556c43a217SHans Verkuil 		.subvendor = 0x1576,
11566c43a217SHans Verkuil 		.subdevice = 0x0260,
11576c43a217SHans Verkuil 		.card      = CX23885_BOARD_VIEWCAST_260E,
11586c43a217SHans Verkuil 	}, {
11596c43a217SHans Verkuil 		.subvendor = 0x1576,
11606c43a217SHans Verkuil 		.subdevice = 0x0460,
11616c43a217SHans Verkuil 		.card      = CX23885_BOARD_VIEWCAST_460E,
116210a5210eSStephen Backway 	}, {
116310a5210eSStephen Backway 		.subvendor = 0x0070,
116410a5210eSStephen Backway 		.subdevice = 0x6a28,
116510a5210eSStephen Backway 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
116610a5210eSStephen Backway 	}, {
116710a5210eSStephen Backway 		.subvendor = 0x0070,
116810a5210eSStephen Backway 		.subdevice = 0x6b28,
116910a5210eSStephen Backway 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
1170dd9ad4fbSStephen Backway 	}, {
1171dd9ad4fbSStephen Backway 		.subvendor = 0x0070,
1172dd9ad4fbSStephen Backway 		.subdevice = 0x6a18,
1173dd9ad4fbSStephen Backway 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
1174dd9ad4fbSStephen Backway 	}, {
1175dd9ad4fbSStephen Backway 		.subvendor = 0x0070,
1176dd9ad4fbSStephen Backway 		.subdevice = 0x6b18,
1177dd9ad4fbSStephen Backway 		.card      = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
117894f11518SBrad Love 	}, {
117994f11518SBrad Love 		.subvendor = 0x0070,
118094f11518SBrad Love 		.subdevice = 0x2a18,
118194f11518SBrad Love 		.card      = CX23885_BOARD_HAUPPAUGE_HVR1265_K4, /* Hauppauge WinTV HVR-1265 (Model 161xx1, Hybrid ATSC/QAM-B) */
118216fad674SBrad Love 	}, {
118316fad674SBrad Love 		.subvendor = 0x0070,
118416fad674SBrad Love 		.subdevice = 0xf02a,
118516fad674SBrad Love 		.card      = CX23885_BOARD_HAUPPAUGE_STARBURST2,
1186dc4cac67SForest Crossman 	}, {
1187dc4cac67SForest Crossman 		.subvendor = 0x1461,
1188dc4cac67SForest Crossman 		.subdevice = 0x3100,
1189dc4cac67SForest Crossman 		.card      = CX23885_BOARD_AVERMEDIA_CE310B,
1190b285192aSMauro Carvalho Chehab 	},
1191b285192aSMauro Carvalho Chehab };
1192b285192aSMauro Carvalho Chehab const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
1193b285192aSMauro Carvalho Chehab 
cx23885_card_list(struct cx23885_dev * dev)1194b285192aSMauro Carvalho Chehab void cx23885_card_list(struct cx23885_dev *dev)
1195b285192aSMauro Carvalho Chehab {
1196b285192aSMauro Carvalho Chehab 	int i;
1197b285192aSMauro Carvalho Chehab 
1198b285192aSMauro Carvalho Chehab 	if (0 == dev->pci->subsystem_vendor &&
1199b285192aSMauro Carvalho Chehab 	    0 == dev->pci->subsystem_device) {
1200e39682b5SMauro Carvalho Chehab 		pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n"
1201b285192aSMauro Carvalho Chehab 			"%s: be autodetected. Pass card=<n> insmod option\n"
1202b285192aSMauro Carvalho Chehab 			"%s: to workaround that. Redirect complaints to the\n"
1203b285192aSMauro Carvalho Chehab 			"%s: vendor of the TV card.  Best regards,\n"
1204b285192aSMauro Carvalho Chehab 			"%s:         -- tux\n",
1205b285192aSMauro Carvalho Chehab 			dev->name, dev->name, dev->name, dev->name, dev->name);
1206b285192aSMauro Carvalho Chehab 	} else {
1207e39682b5SMauro Carvalho Chehab 		pr_info("%s: Your board isn't known (yet) to the driver.\n"
1208b285192aSMauro Carvalho Chehab 			"%s: Try to pick one of the existing card configs via\n"
1209b285192aSMauro Carvalho Chehab 			"%s: card=<n> insmod option.  Updating to the latest\n"
1210b285192aSMauro Carvalho Chehab 			"%s: version might help as well.\n",
1211b285192aSMauro Carvalho Chehab 			dev->name, dev->name, dev->name, dev->name);
1212b285192aSMauro Carvalho Chehab 	}
1213e39682b5SMauro Carvalho Chehab 	pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
1214b285192aSMauro Carvalho Chehab 	       dev->name);
1215b285192aSMauro Carvalho Chehab 	for (i = 0; i < cx23885_bcount; i++)
1216e39682b5SMauro Carvalho Chehab 		pr_info("%s:    card=%d -> %s\n",
1217b285192aSMauro Carvalho Chehab 			dev->name, i, cx23885_boards[i].name);
1218b285192aSMauro Carvalho Chehab }
1219b285192aSMauro Carvalho Chehab 
viewcast_eeprom(struct cx23885_dev * dev,u8 * eeprom_data)12206c43a217SHans Verkuil static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
12216c43a217SHans Verkuil {
12226c43a217SHans Verkuil 	u32 sn;
12236c43a217SHans Verkuil 
12246c43a217SHans Verkuil 	/* The serial number record begins with tag 0x59 */
12256c43a217SHans Verkuil 	if (*(eeprom_data + 0x00) != 0x59) {
12266c43a217SHans Verkuil 		pr_info("%s() eeprom records are undefined, no serial number\n",
12276c43a217SHans Verkuil 			__func__);
12286c43a217SHans Verkuil 		return;
12296c43a217SHans Verkuil 	}
12306c43a217SHans Verkuil 
12316c43a217SHans Verkuil 	sn =	(*(eeprom_data + 0x06) << 24) |
12326c43a217SHans Verkuil 		(*(eeprom_data + 0x05) << 16) |
12336c43a217SHans Verkuil 		(*(eeprom_data + 0x04) << 8) |
12346c43a217SHans Verkuil 		(*(eeprom_data + 0x03));
12356c43a217SHans Verkuil 
12366c43a217SHans Verkuil 	pr_info("%s: card '%s' sn# MM%d\n",
12376c43a217SHans Verkuil 		dev->name,
12386c43a217SHans Verkuil 		cx23885_boards[dev->board].name,
12396c43a217SHans Verkuil 		sn);
12406c43a217SHans Verkuil }
12416c43a217SHans Verkuil 
hauppauge_eeprom(struct cx23885_dev * dev,u8 * eeprom_data)1242b285192aSMauro Carvalho Chehab static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1243b285192aSMauro Carvalho Chehab {
1244b285192aSMauro Carvalho Chehab 	struct tveeprom tv;
1245b285192aSMauro Carvalho Chehab 
1246446aba66SMauro Carvalho Chehab 	tveeprom_hauppauge_analog(&tv, eeprom_data);
1247b285192aSMauro Carvalho Chehab 
1248b285192aSMauro Carvalho Chehab 	/* Make sure we support the board model */
1249b285192aSMauro Carvalho Chehab 	switch (tv.model) {
1250b285192aSMauro Carvalho Chehab 	case 22001:
1251b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
1252b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
1253b285192aSMauro Carvalho Chehab 	case 22009:
1254b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1255b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
1256b285192aSMauro Carvalho Chehab 	case 22011:
1257b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, half height)
1258b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1259b285192aSMauro Carvalho Chehab 	case 22019:
1260b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1261b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1262b285192aSMauro Carvalho Chehab 	case 22021:
1263b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, half height)
1264b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1265b285192aSMauro Carvalho Chehab 	case 22029:
1266b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, half height)
1267b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1268b285192aSMauro Carvalho Chehab 	case 22101:
1269b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1270b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Blast */
1271b285192aSMauro Carvalho Chehab 	case 22109:
1272b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1273b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Blast */
1274b285192aSMauro Carvalho Chehab 	case 22111:
1275b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1270 (PCIe, Retail, full height)
1276b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1277b285192aSMauro Carvalho Chehab 	case 22119:
1278b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1279b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1280b285192aSMauro Carvalho Chehab 	case 22121:
1281b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1275 (PCIe, Retail, full height)
1282b285192aSMauro Carvalho Chehab 		 * ATSC/QAM and basic analog, IR Recv */
1283b285192aSMauro Carvalho Chehab 	case 22129:
1284b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1210 (PCIe, Retail, full height)
1285b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog, IR Recv */
1286b285192aSMauro Carvalho Chehab 	case 71009:
1287b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, Retail, full height)
1288b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1289cce11b09SHans Verkuil 	case 71100:
1290cce11b09SHans Verkuil 		/* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1291cce11b09SHans Verkuil 		 * Basic analog */
1292b285192aSMauro Carvalho Chehab 	case 71359:
1293b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1294b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1295b285192aSMauro Carvalho Chehab 	case 71439:
1296b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1297b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1298b285192aSMauro Carvalho Chehab 	case 71449:
1299b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1300b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1301b285192aSMauro Carvalho Chehab 	case 71939:
1302b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1303b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1304b285192aSMauro Carvalho Chehab 	case 71949:
1305b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1306b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1307b285192aSMauro Carvalho Chehab 	case 71959:
1308b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1309b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1310b285192aSMauro Carvalho Chehab 	case 71979:
1311b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, half height)
1312b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1313b285192aSMauro Carvalho Chehab 	case 71999:
1314b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1200 (PCIe, OEM, full height)
1315b285192aSMauro Carvalho Chehab 		 * DVB-T and basic analog */
1316b285192aSMauro Carvalho Chehab 	case 76601:
1317b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1318b285192aSMauro Carvalho Chehab 			channel ATSC and MPEG2 HW Encoder */
1319b285192aSMauro Carvalho Chehab 	case 77001:
1320b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1321b285192aSMauro Carvalho Chehab 			and Basic analog */
1322b285192aSMauro Carvalho Chehab 	case 77011:
1323b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1324b285192aSMauro Carvalho Chehab 			and Basic analog */
1325b285192aSMauro Carvalho Chehab 	case 77041:
1326b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1327b285192aSMauro Carvalho Chehab 			and Basic analog */
1328b285192aSMauro Carvalho Chehab 	case 77051:
1329b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1330b285192aSMauro Carvalho Chehab 			and Basic analog */
1331b285192aSMauro Carvalho Chehab 	case 78011:
1332b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1333b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1334b285192aSMauro Carvalho Chehab 	case 78501:
1335b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1336b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1337b285192aSMauro Carvalho Chehab 	case 78521:
1338b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1339b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1340b285192aSMauro Carvalho Chehab 	case 78531:
1341b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1342b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1343b285192aSMauro Carvalho Chehab 	case 78631:
1344b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1345b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1346b285192aSMauro Carvalho Chehab 	case 79001:
1347b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1348b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1349b285192aSMauro Carvalho Chehab 	case 79101:
1350b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1351b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1352b285192aSMauro Carvalho Chehab 	case 79501:
1353b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, No IR, half height,
1354b285192aSMauro Carvalho Chehab 			ATSC [at least] and Basic analog) */
1355b285192aSMauro Carvalho Chehab 	case 79561:
1356b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1357b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1358b285192aSMauro Carvalho Chehab 	case 79571:
1359b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1360b285192aSMauro Carvalho Chehab 		 ATSC and Basic analog */
1361b285192aSMauro Carvalho Chehab 	case 79671:
1362b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1363b285192aSMauro Carvalho Chehab 			ATSC and Basic analog */
1364b285192aSMauro Carvalho Chehab 	case 80019:
1365b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1400 (Express Card, Retail, IR,
1366b285192aSMauro Carvalho Chehab 		 * DVB-T and Basic analog */
1367b285192aSMauro Carvalho Chehab 	case 81509:
1368b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1369b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1370b285192aSMauro Carvalho Chehab 	case 81519:
1371b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
1372b285192aSMauro Carvalho Chehab 		 * DVB-T and MPEG2 HW Encoder */
1373b285192aSMauro Carvalho Chehab 		break;
1374b285192aSMauro Carvalho Chehab 	case 85021:
1375b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
1376b285192aSMauro Carvalho Chehab 			Dual channel ATSC and MPEG2 HW Encoder */
1377b285192aSMauro Carvalho Chehab 		break;
1378b285192aSMauro Carvalho Chehab 	case 85721:
1379b285192aSMauro Carvalho Chehab 		/* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1380b285192aSMauro Carvalho Chehab 			Dual channel ATSC and Basic analog */
138182cf5f4fSMatthias Schwarzott 	case 121019:
138282cf5f4fSMatthias Schwarzott 		/* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
138382cf5f4fSMatthias Schwarzott 		break;
138482cf5f4fSMatthias Schwarzott 	case 121029:
138582cf5f4fSMatthias Schwarzott 		/* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
138682cf5f4fSMatthias Schwarzott 		break;
13871fc77d01SAntti Palosaari 	case 150329:
13881fc77d01SAntti Palosaari 		/* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
1389b285192aSMauro Carvalho Chehab 		break;
139094f11518SBrad Love 	case 161111:
139194f11518SBrad Love 		/* WinTV-HVR-1265 K4 (PCIe, Analog/ATSC/QAM-B) */
139294f11518SBrad Love 		break;
1393c00ba2c1SBrad Love 	case 166100: /* 888 version, hybrid */
1394c00ba2c1SBrad Love 	case 166200: /* 885 version, DVB only */
139510a5210eSStephen Backway 		/* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
139610a5210eSStephen Backway 		   DVB-T/T2/C, DVB-T/T2/C */
139710a5210eSStephen Backway 		break;
1398c00ba2c1SBrad Love 	case 166101: /* 888 version, hybrid */
1399c00ba2c1SBrad Love 	case 166201: /* 885 version, DVB only */
140010a5210eSStephen Backway 		/* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
140110a5210eSStephen Backway 		   DVB-T/T2/C, DVB-T/T2/C */
140210a5210eSStephen Backway 		break;
1403c00ba2c1SBrad Love 	case 165100: /* 888 version, hybrid */
1404c00ba2c1SBrad Love 	case 165200: /* 885 version, digital only */
1405c00ba2c1SBrad Love 		/* WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
1406c00ba2c1SBrad Love 		 * ATSC/QAM-B, ATSC/QAM-B */
1407dd9ad4fbSStephen Backway 		break;
1408c00ba2c1SBrad Love 	case 165101: /* 888 version, hybrid */
1409c00ba2c1SBrad Love 	case 165201: /* 885 version, digital only */
1410c00ba2c1SBrad Love 		/* WinTV-QuadHD (ATSC) Tuner Pair 2 (PCIe, IR, half height,
1411c00ba2c1SBrad Love 		 * ATSC/QAM-B, ATSC/QAM-B */
1412dd9ad4fbSStephen Backway 		break;
1413b285192aSMauro Carvalho Chehab 	default:
1414e39682b5SMauro Carvalho Chehab 		pr_warn("%s: warning: unknown hauppauge model #%d\n",
1415b285192aSMauro Carvalho Chehab 			dev->name, tv.model);
1416b285192aSMauro Carvalho Chehab 		break;
1417b285192aSMauro Carvalho Chehab 	}
1418b285192aSMauro Carvalho Chehab 
1419e39682b5SMauro Carvalho Chehab 	pr_info("%s: hauppauge eeprom: model=%d\n",
1420b285192aSMauro Carvalho Chehab 		dev->name, tv.model);
1421b285192aSMauro Carvalho Chehab }
1422b285192aSMauro Carvalho Chehab 
1423e6001482SLuis Alves /* Some TBS cards require initing a chip using a bitbanged SPI attached
1424e6001482SLuis Alves    to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1425e6001482SLuis Alves    doesn't respond to any command. */
tbs_card_init(struct cx23885_dev * dev)1426e6001482SLuis Alves static void tbs_card_init(struct cx23885_dev *dev)
1427e6001482SLuis Alves {
1428e6001482SLuis Alves 	int i;
1429601b1f0aSColin Ian King 	static const u8 buf[] = {
1430e6001482SLuis Alves 		0xe0, 0x06, 0x66, 0x33, 0x65,
1431e6001482SLuis Alves 		0x01, 0x17, 0x06, 0xde};
1432e6001482SLuis Alves 
1433e6001482SLuis Alves 	switch (dev->board) {
1434e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1435e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1436e6001482SLuis Alves 		cx_set(GP0_IO, 0x00070007);
1437e6001482SLuis Alves 		usleep_range(1000, 10000);
1438e6001482SLuis Alves 		cx_clear(GP0_IO, 2);
1439e6001482SLuis Alves 		usleep_range(1000, 10000);
1440e6001482SLuis Alves 		for (i = 0; i < 9 * 8; i++) {
1441e6001482SLuis Alves 			cx_clear(GP0_IO, 7);
1442e6001482SLuis Alves 			usleep_range(1000, 10000);
1443e6001482SLuis Alves 			cx_set(GP0_IO,
1444e6001482SLuis Alves 				((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1445e6001482SLuis Alves 			usleep_range(1000, 10000);
1446e6001482SLuis Alves 		}
1447e6001482SLuis Alves 		cx_set(GP0_IO, 7);
1448e6001482SLuis Alves 		break;
1449e6001482SLuis Alves 	}
1450e6001482SLuis Alves }
1451e6001482SLuis Alves 
cx23885_tuner_callback(void * priv,int component,int command,int arg)1452b285192aSMauro Carvalho Chehab int cx23885_tuner_callback(void *priv, int component, int command, int arg)
1453b285192aSMauro Carvalho Chehab {
1454b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *port = priv;
1455b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = port->dev;
1456b285192aSMauro Carvalho Chehab 	u32 bitmask = 0;
1457b285192aSMauro Carvalho Chehab 
1458b285192aSMauro Carvalho Chehab 	if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
1459b285192aSMauro Carvalho Chehab 		return 0;
1460b285192aSMauro Carvalho Chehab 
1461b285192aSMauro Carvalho Chehab 	if (command != 0) {
1462e39682b5SMauro Carvalho Chehab 		pr_err("%s(): Unknown command 0x%x.\n",
1463b285192aSMauro Carvalho Chehab 		       __func__, command);
1464b285192aSMauro Carvalho Chehab 		return -EINVAL;
1465b285192aSMauro Carvalho Chehab 	}
1466b285192aSMauro Carvalho Chehab 
1467b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1468b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1469b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1470b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1471b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1472642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1473b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1474b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1475b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1476b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1477b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1478b285192aSMauro Carvalho Chehab 		bitmask = 0x04;
1479b285192aSMauro Carvalho Chehab 		break;
1480b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1481b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
148246b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1483b285192aSMauro Carvalho Chehab 		/* Two identical tuners on two different i2c buses,
1484b285192aSMauro Carvalho Chehab 		 * we need to reset the correct gpio. */
1485b285192aSMauro Carvalho Chehab 		if (port->nr == 1)
1486b285192aSMauro Carvalho Chehab 			bitmask = 0x01;
1487b285192aSMauro Carvalho Chehab 		else if (port->nr == 2)
1488b285192aSMauro Carvalho Chehab 			bitmask = 0x04;
1489b285192aSMauro Carvalho Chehab 		break;
1490b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1491b285192aSMauro Carvalho Chehab 		/* Tuner Reset Command */
1492b285192aSMauro Carvalho Chehab 		bitmask = 0x02;
1493b285192aSMauro Carvalho Chehab 		break;
1494b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1495b285192aSMauro Carvalho Chehab 		altera_ci_tuner_reset(dev, port->nr);
1496b285192aSMauro Carvalho Chehab 		break;
1497e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1498e8d42373SOleh Kravchenko 		/* XC3028L Reset Command */
1499e8d42373SOleh Kravchenko 		bitmask = 1 << 2;
1500e8d42373SOleh Kravchenko 		break;
1501b285192aSMauro Carvalho Chehab 	}
1502b285192aSMauro Carvalho Chehab 
1503b285192aSMauro Carvalho Chehab 	if (bitmask) {
1504b285192aSMauro Carvalho Chehab 		/* Drive the tuner into reset and back out */
1505b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, bitmask);
1506b285192aSMauro Carvalho Chehab 		mdelay(200);
1507b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, bitmask);
1508b285192aSMauro Carvalho Chehab 	}
1509b285192aSMauro Carvalho Chehab 
1510b285192aSMauro Carvalho Chehab 	return 0;
1511b285192aSMauro Carvalho Chehab }
1512b285192aSMauro Carvalho Chehab 
cx23885_gpio_setup(struct cx23885_dev * dev)1513b285192aSMauro Carvalho Chehab void cx23885_gpio_setup(struct cx23885_dev *dev)
1514b285192aSMauro Carvalho Chehab {
1515b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1516b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
1517b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1518b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1519b285192aSMauro Carvalho Chehab 		break;
1520b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1521b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator */
1522b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc3028 tuner */
1523b285192aSMauro Carvalho Chehab 
1524b285192aSMauro Carvalho Chehab 		/* Put the parts into reset */
1525b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
1526b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
1527b285192aSMauro Carvalho Chehab 		msleep(5);
1528b285192aSMauro Carvalho Chehab 
1529b285192aSMauro Carvalho Chehab 		/* Bring the parts out of reset */
1530b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1531b285192aSMauro Carvalho Chehab 		break;
1532b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1533b285192aSMauro Carvalho Chehab 		/* GPIO-0 cx24227 demodulator reset */
1534b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset */
1535b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1536b285192aSMauro Carvalho Chehab 		break;
1537b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1538b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1539b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1540b285192aSMauro Carvalho Chehab 		/* GPIO-2 8295A Reset */
1541b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1542b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1543b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1544b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1545b285192aSMauro Carvalho Chehab 
1546b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1547b285192aSMauro Carvalho Chehab 		/* EIO15 Zilog Reset */
1548b285192aSMauro Carvalho Chehab 		/* EIO14 S5H1409/CX24227 Reset */
1549b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1550b285192aSMauro Carvalho Chehab 
1551b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1552b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
15539095b23fSJia-Ju Bai 		msleep(100);
1554b285192aSMauro Carvalho Chehab 
1555b285192aSMauro Carvalho Chehab 		/* Bring the demod and blaster out of reset */
1556b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_15 | GPIO_14);
15579095b23fSJia-Ju Bai 		msleep(100);
1558b285192aSMauro Carvalho Chehab 
1559b285192aSMauro Carvalho Chehab 		/* Force the TDA8295A into reset and back */
1560b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_2, 1);
1561b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
15629095b23fSJia-Ju Bai 		msleep(20);
1563b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_2);
15649095b23fSJia-Ju Bai 		msleep(20);
1565b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_2);
15669095b23fSJia-Ju Bai 		msleep(20);
1567b285192aSMauro Carvalho Chehab 		break;
1568b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1569b285192aSMauro Carvalho Chehab 		/* GPIO-0 tda10048 demodulator reset */
1570b285192aSMauro Carvalho Chehab 		/* GPIO-2 tda18271 tuner reset */
1571b285192aSMauro Carvalho Chehab 
1572b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1573b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
15749095b23fSJia-Ju Bai 		msleep(20);
1575b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
15769095b23fSJia-Ju Bai 		msleep(20);
1577b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1578b285192aSMauro Carvalho Chehab 		break;
1579b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
1580b285192aSMauro Carvalho Chehab 		/* GPIO-0 TDA10048 demodulator reset */
1581b285192aSMauro Carvalho Chehab 		/* GPIO-2 TDA8295A Reset */
1582b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1583b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1584b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1585b285192aSMauro Carvalho Chehab 
1586b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the interna AVCore (cx25840) */
1587b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1588b285192aSMauro Carvalho Chehab 		/* GPIO-20 IR_TX 416/DVBT Select */
1589b285192aSMauro Carvalho Chehab 		/* GPIO-21 IIS DAT */
1590b285192aSMauro Carvalho Chehab 		/* GPIO-22 IIS WCLK */
1591b285192aSMauro Carvalho Chehab 		/* GPIO-23 IIS BCLK */
1592b285192aSMauro Carvalho Chehab 
1593b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1594b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
15959095b23fSJia-Ju Bai 		msleep(20);
1596b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
15979095b23fSJia-Ju Bai 		msleep(20);
1598b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1599b285192aSMauro Carvalho Chehab 		break;
1600b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1601b285192aSMauro Carvalho Chehab 		/* GPIO-0  Dibcom7000p demodulator reset */
1602b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028L tuner reset */
1603b285192aSMauro Carvalho Chehab 		/* GPIO-13 LED */
1604b285192aSMauro Carvalho Chehab 
1605b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1606b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050000);
16079095b23fSJia-Ju Bai 		msleep(20);
1608b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000005);
16099095b23fSJia-Ju Bai 		msleep(20);
1610b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00050005);
1611b285192aSMauro Carvalho Chehab 		break;
1612b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1613b285192aSMauro Carvalho Chehab 		/* GPIO-0 xc5000 tuner reset i2c bus 0 */
1614b285192aSMauro Carvalho Chehab 		/* GPIO-1 s5h1409 demod reset i2c bus 0 */
1615b285192aSMauro Carvalho Chehab 		/* GPIO-2 xc5000 tuner reset i2c bus 1 */
1616b285192aSMauro Carvalho Chehab 		/* GPIO-3 s5h1409 demod reset i2c bus 0 */
1617b285192aSMauro Carvalho Chehab 
1618b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1619b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
16209095b23fSJia-Ju Bai 		msleep(20);
1621b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
16229095b23fSJia-Ju Bai 		msleep(20);
1623b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1624b285192aSMauro Carvalho Chehab 		break;
1625b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
162646b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
1627b285192aSMauro Carvalho Chehab 		/* GPIO-0 portb xc3028 reset */
1628b285192aSMauro Carvalho Chehab 		/* GPIO-1 portb zl10353 reset */
1629b285192aSMauro Carvalho Chehab 		/* GPIO-2 portc xc3028 reset */
1630b285192aSMauro Carvalho Chehab 		/* GPIO-3 portc zl10353 reset */
1631b285192aSMauro Carvalho Chehab 
1632b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1633b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f0000);
16349095b23fSJia-Ju Bai 		msleep(20);
1635b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x0000000f);
16369095b23fSJia-Ju Bai 		msleep(20);
1637b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x000f000f);
1638b285192aSMauro Carvalho Chehab 		break;
1639b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1640642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
1641b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1642b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1643b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1644b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1645b285192aSMauro Carvalho Chehab 		/* GPIO-2  xc3028 tuner reset */
1646b285192aSMauro Carvalho Chehab 
1647b285192aSMauro Carvalho Chehab 		/* The following GPIO's are on the internal AVCore (cx25840) */
1648b285192aSMauro Carvalho Chehab 		/* GPIO-?  zl10353 demod reset */
1649b285192aSMauro Carvalho Chehab 
1650b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1651b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000);
16529095b23fSJia-Ju Bai 		msleep(20);
1653b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00000004);
16549095b23fSJia-Ju Bai 		msleep(20);
1655b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004);
1656b285192aSMauro Carvalho Chehab 		break;
1657b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
1658e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
1659e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
1660f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
1661b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000036);
1662b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1663b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000002);
16649095b23fSJia-Ju Bai 		msleep(200);
1665b285192aSMauro Carvalho Chehab 		cx_clear(MC417_RWD, 0x00000800);
16669095b23fSJia-Ju Bai 		msleep(200);
1667b285192aSMauro Carvalho Chehab 		cx_set(MC417_RWD, 0x00000800);
16689095b23fSJia-Ju Bai 		msleep(200);
1669b285192aSMauro Carvalho Chehab 		break;
1670b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1671b285192aSMauro Carvalho Chehab 		/* GPIO-0 INTA from CiMax1
1672b285192aSMauro Carvalho Chehab 		   GPIO-1 INTB from CiMax2
1673b285192aSMauro Carvalho Chehab 		   GPIO-2 reset chips
1674b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA
1675b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS0 to CiMax1
1676b285192aSMauro Carvalho Chehab 		   GPIO-12 ~CS1 to CiMax2
1677b285192aSMauro Carvalho Chehab 		   GPIO-13 ADL0 load LSB addr
1678b285192aSMauro Carvalho Chehab 		   GPIO-14 ADL1 load MSB addr
1679b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY from CiMax
1680b285192aSMauro Carvalho Chehab 		   GPIO-17 ~RD to CiMax
1681b285192aSMauro Carvalho Chehab 		   GPIO-18 ~WR to CiMax
1682b285192aSMauro Carvalho Chehab 		 */
1683b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1684b285192aSMauro Carvalho Chehab 		/* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1685b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00030004);
16869095b23fSJia-Ju Bai 		msleep(100);/* reset delay */
1687b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1688b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1689b285192aSMauro Carvalho Chehab 		/* GPIO-15 IN as ~ACK, rest as OUT */
1690b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00001000);
1691b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1692b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x0000c300);
1693b285192aSMauro Carvalho Chehab 		/* enable irq */
1694b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1695b285192aSMauro Carvalho Chehab 		break;
1696b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1697b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1698b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1699b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1700b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
1701b285192aSMauro Carvalho Chehab 		/* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
1702b285192aSMauro Carvalho Chehab 		/* GPIO-6 I2C Gate which can isolate the demod from the bus */
1703b285192aSMauro Carvalho Chehab 		/* GPIO-9 Demod reset */
1704b285192aSMauro Carvalho Chehab 
1705b285192aSMauro Carvalho Chehab 		/* Put the parts into reset and back */
1706b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1707b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
1708b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_9);
17099095b23fSJia-Ju Bai 		msleep(20);
1710b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_9);
1711b285192aSMauro Carvalho Chehab 		break;
1712b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
1713b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1714b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
1715b285192aSMauro Carvalho Chehab 		/* GPIO-0 (0)Analog / (1)Digital TV */
1716b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset XC5000 */
17170d1b5265SMauro Carvalho Chehab 		/* GPIO-2 demod reset */
1718b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1719b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
17209095b23fSJia-Ju Bai 		msleep(100);
1721b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
17229095b23fSJia-Ju Bai 		msleep(100);
1723b285192aSMauro Carvalho Chehab 		break;
1724b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
1725b285192aSMauro Carvalho Chehab 		/* GPIO-0 reset first ATBM8830 */
1726b285192aSMauro Carvalho Chehab 		/* GPIO-1 reset second ATBM8830 */
1727b285192aSMauro Carvalho Chehab 		cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1728b285192aSMauro Carvalho Chehab 		cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
17299095b23fSJia-Ju Bai 		msleep(100);
1730b285192aSMauro Carvalho Chehab 		cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
17319095b23fSJia-Ju Bai 		msleep(100);
1732b285192aSMauro Carvalho Chehab 		break;
1733b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1734b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1735b285192aSMauro Carvalho Chehab 		/* GPIO-0 656_CLK */
1736b285192aSMauro Carvalho Chehab 		/* GPIO-1 656_D0 */
1737b285192aSMauro Carvalho Chehab 		/* GPIO-2 Wake# */
1738b285192aSMauro Carvalho Chehab 		/* GPIO-3-10 cx23417 data0-7 */
1739b285192aSMauro Carvalho Chehab 		/* GPIO-11-14 cx23417 addr0-3 */
1740b285192aSMauro Carvalho Chehab 		/* GPIO-15-18 cx23417 READY, CS, RD, WR */
1741b285192aSMauro Carvalho Chehab 		/* GPIO-19 IR_RX */
1742b285192aSMauro Carvalho Chehab 		/* GPIO-20 C_IR_TX */
1743b285192aSMauro Carvalho Chehab 		/* GPIO-21 I2S DAT */
1744b285192aSMauro Carvalho Chehab 		/* GPIO-22 I2S WCLK */
1745b285192aSMauro Carvalho Chehab 		/* GPIO-23 I2S BCLK */
1746b285192aSMauro Carvalho Chehab 		/* ALT GPIO: EXP GPIO LATCH */
1747b285192aSMauro Carvalho Chehab 
1748b285192aSMauro Carvalho Chehab 		/* CX23417 GPIO's */
1749b285192aSMauro Carvalho Chehab 		/* GPIO-14 S5H1411/CX24228 Reset */
1750b285192aSMauro Carvalho Chehab 		/* GPIO-13 EEPROM write protect */
1751b285192aSMauro Carvalho Chehab 		mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1752b285192aSMauro Carvalho Chehab 
1753b285192aSMauro Carvalho Chehab 		/* Put the demod into reset and protect the eeprom */
1754b285192aSMauro Carvalho Chehab 		mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
17559095b23fSJia-Ju Bai 		msleep(100);
1756b285192aSMauro Carvalho Chehab 
1757b285192aSMauro Carvalho Chehab 		/* Bring the demod out of reset */
1758b285192aSMauro Carvalho Chehab 		mc417_gpio_set(dev, GPIO_14);
17599095b23fSJia-Ju Bai 		msleep(100);
1760b285192aSMauro Carvalho Chehab 
1761b285192aSMauro Carvalho Chehab 		/* CX24228 GPIO */
1762b285192aSMauro Carvalho Chehab 		/* Connected to IF / Mux */
1763b285192aSMauro Carvalho Chehab 		break;
1764b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1765b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1766b285192aSMauro Carvalho Chehab 		break;
1767b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1768b285192aSMauro Carvalho Chehab 		/* GPIO-0 ~INT in
1769b285192aSMauro Carvalho Chehab 		   GPIO-1 TMS out
1770b285192aSMauro Carvalho Chehab 		   GPIO-2 ~reset chips out
1771b285192aSMauro Carvalho Chehab 		   GPIO-3 to GPIO-10 data/addr for CA in/out
1772b285192aSMauro Carvalho Chehab 		   GPIO-11 ~CS out
1773b285192aSMauro Carvalho Chehab 		   GPIO-12 ADDR out
1774b285192aSMauro Carvalho Chehab 		   GPIO-13 ~WR out
1775b285192aSMauro Carvalho Chehab 		   GPIO-14 ~RD out
1776b285192aSMauro Carvalho Chehab 		   GPIO-15 ~RDY in
1777b285192aSMauro Carvalho Chehab 		   GPIO-16 TCK out
1778b285192aSMauro Carvalho Chehab 		   GPIO-17 TDO in
1779b285192aSMauro Carvalho Chehab 		   GPIO-18 TDI out
1780b285192aSMauro Carvalho Chehab 		 */
1781b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1782b285192aSMauro Carvalho Chehab 		/* GPIO-0 as INT, reset & TMS low */
1783b285192aSMauro Carvalho Chehab 		cx_clear(GP0_IO, 0x00010006);
17849095b23fSJia-Ju Bai 		msleep(100);/* reset delay */
1785b285192aSMauro Carvalho Chehab 		cx_set(GP0_IO, 0x00000004); /* reset high */
1786b285192aSMauro Carvalho Chehab 		cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1787b285192aSMauro Carvalho Chehab 		/* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1788b285192aSMauro Carvalho Chehab 		cx_write(MC417_OEN, 0x00005000);
1789b285192aSMauro Carvalho Chehab 		/* ~RD, ~WR high; ADDR low; ~CS high */
1790b285192aSMauro Carvalho Chehab 		cx_write(MC417_RWD, 0x00000d00);
1791b285192aSMauro Carvalho Chehab 		/* enable irq */
1792b285192aSMauro Carvalho Chehab 		cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1793b285192aSMauro Carvalho Chehab 		break;
17947c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
1795721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
17967c62f5a1SMichael Krufky 		/* GPIO-8 tda10071 demod reset */
1797721f3223SMatthias Schwarzott 		/* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
17987c62f5a1SMichael Krufky 
17997c62f5a1SMichael Krufky 		/* Put the parts into reset and back */
180036efec48SMatthias Schwarzott 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
180136efec48SMatthias Schwarzott 
180236efec48SMatthias Schwarzott 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
18039095b23fSJia-Ju Bai 		msleep(100);
180436efec48SMatthias Schwarzott 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
18059095b23fSJia-Ju Bai 		msleep(100);
180636efec48SMatthias Schwarzott 
18077c62f5a1SMichael Krufky 		break;
1808e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
1809e8d42373SOleh Kravchenko 		cx_clear(MC417_CTL, 1);
1810e8d42373SOleh Kravchenko 		/* GPIO-0,1,2 setup direction as output */
1811e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00070000);
18129095b23fSJia-Ju Bai 		usleep_range(10000, 11000);
1813e8d42373SOleh Kravchenko 		/* AF9013 demod reset */
1814e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
18159095b23fSJia-Ju Bai 		usleep_range(10000, 11000);
1816e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00010001);
18179095b23fSJia-Ju Bai 		usleep_range(10000, 11000);
1818e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
18199095b23fSJia-Ju Bai 		usleep_range(10000, 11000);
1820e8d42373SOleh Kravchenko 		/* demod tune? */
1821e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00030003);
18229095b23fSJia-Ju Bai 		usleep_range(10000, 11000);
1823e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00020002);
18249095b23fSJia-Ju Bai 		usleep_range(10000, 11000);
1825e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00010001);
18269095b23fSJia-Ju Bai 		usleep_range(10000, 11000);
1827e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00020002);
1828e8d42373SOleh Kravchenko 		/* XC3028L tuner reset */
1829e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
1830e8d42373SOleh Kravchenko 		cx_clear(GP0_IO, 0x00040004);
1831e8d42373SOleh Kravchenko 		cx_set(GP0_IO, 0x00040004);
18329095b23fSJia-Ju Bai 		msleep(60);
1833e8d42373SOleh Kravchenko 		break;
183429442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
1835c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
1836c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
183729442266SOlli Salonen 		/* enable GPIO3-18 pins */
183829442266SOlli Salonen 		cx_write(MC417_CTL, 0x00000037);
183929442266SOlli Salonen 		cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
184029442266SOlli Salonen 		cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
18419095b23fSJia-Ju Bai 		msleep(100);
184229442266SOlli Salonen 		cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
184329442266SOlli Salonen 		break;
184482c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
18450e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
184661b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
184782c10276SOlli Salonen 		/*
184882c10276SOlli Salonen 		 * GPIO-0 INTA from CiMax, input
184982c10276SOlli Salonen 		 * GPIO-1 reset CiMax, output, high active
185082c10276SOlli Salonen 		 * GPIO-2 reset demod, output, low active
185182c10276SOlli Salonen 		 * GPIO-3 to GPIO-10 data/addr for CAM
185282c10276SOlli Salonen 		 * GPIO-11 ~CS0 to CiMax1
185382c10276SOlli Salonen 		 * GPIO-12 ~CS1 to CiMax2
185482c10276SOlli Salonen 		 * GPIO-13 ADL0 load LSB addr
185582c10276SOlli Salonen 		 * GPIO-14 ADL1 load MSB addr
185682c10276SOlli Salonen 		 * GPIO-15 ~RDY from CiMax
185782c10276SOlli Salonen 		 * GPIO-17 ~RD to CiMax
185882c10276SOlli Salonen 		 * GPIO-18 ~WR to CiMax
185982c10276SOlli Salonen 		 */
186082c10276SOlli Salonen 
186182c10276SOlli Salonen 		cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
186282c10276SOlli Salonen 		cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
18639095b23fSJia-Ju Bai 		msleep(100); /* reset delay */
186482c10276SOlli Salonen 		cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
186582c10276SOlli Salonen 		cx_clear(GP0_IO, 0x00010002);
186682c10276SOlli Salonen 		cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
186782c10276SOlli Salonen 
186882c10276SOlli Salonen 		/* GPIO-15 IN as ~ACK, rest as OUT */
186982c10276SOlli Salonen 		cx_write(MC417_OEN, 0x00001000);
187082c10276SOlli Salonen 
187182c10276SOlli Salonen 		/* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
187282c10276SOlli Salonen 		cx_write(MC417_RWD, 0x0000c300);
187382c10276SOlli Salonen 
187482c10276SOlli Salonen 		/* enable irq */
187582c10276SOlli Salonen 		cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
1876cba5480cSnibble.max 		break;
1877cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
1878cba5480cSnibble.max 		cx23885_gpio_enable(dev, GPIO_2, 1);
1879cba5480cSnibble.max 		cx23885_gpio_clear(dev, GPIO_2);
1880cba5480cSnibble.max 		msleep(100);
1881cba5480cSnibble.max 		cx23885_gpio_set(dev, GPIO_2);
1882cba5480cSnibble.max 		break;
18831fc77d01SAntti Palosaari 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
188416fad674SBrad Love 	case CX23885_BOARD_HAUPPAUGE_STARBURST2:
18851fc77d01SAntti Palosaari 		/*
188610a5210eSStephen Backway 		 * HVR5525 GPIO Details:
18871fc77d01SAntti Palosaari 		 *  GPIO-00 IR_WIDE
18881fc77d01SAntti Palosaari 		 *  GPIO-02 wake#
18891fc77d01SAntti Palosaari 		 *  GPIO-03 VAUX Pres.
18901fc77d01SAntti Palosaari 		 *  GPIO-07 PROG#
18911fc77d01SAntti Palosaari 		 *  GPIO-08 SAT_RESN
18921fc77d01SAntti Palosaari 		 *  GPIO-09 TER_RESN
18931fc77d01SAntti Palosaari 		 *  GPIO-10 B2_SENSE
18941fc77d01SAntti Palosaari 		 *  GPIO-11 B1_SENSE
18951fc77d01SAntti Palosaari 		 *  GPIO-15 IR_LED_STATUS
18961fc77d01SAntti Palosaari 		 *  GPIO-19 IR_NARROW
18971fc77d01SAntti Palosaari 		 *  GPIO-20 Blauster1
18981fc77d01SAntti Palosaari 		 *  ALTGPIO VAUX_SWITCH
18991fc77d01SAntti Palosaari 		 *  AUX_PLL_CLK : Blaster2
19001fc77d01SAntti Palosaari 		 */
19011fc77d01SAntti Palosaari 		/* Put the parts into reset and back */
19021fc77d01SAntti Palosaari 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
19031fc77d01SAntti Palosaari 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
19041fc77d01SAntti Palosaari 		msleep(100);
19051fc77d01SAntti Palosaari 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
19061fc77d01SAntti Palosaari 		msleep(100);
19071fc77d01SAntti Palosaari 		break;
19086c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_260E:
19096c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_460E:
19106c43a217SHans Verkuil 		/* For documentation purposes, it's worth noting that this
19116c43a217SHans Verkuil 		 * card does not have any GPIO's connected to subcomponents.
19126c43a217SHans Verkuil 		 */
19136c43a217SHans Verkuil 		break;
191494f11518SBrad Love 	case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
19159cbf518eSBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1916c00ba2c1SBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
19179cbf518eSBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1918c00ba2c1SBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
191994f11518SBrad Love 		/*
192094f11518SBrad Love 		 * GPIO-08 TER1_RESN
192194f11518SBrad Love 		 * GPIO-09 TER2_RESN
192294f11518SBrad Love 		 */
192394f11518SBrad Love 		/* Put the parts into reset and back */
192494f11518SBrad Love 		cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
192594f11518SBrad Love 		cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
192694f11518SBrad Love 		msleep(100);
192794f11518SBrad Love 		cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
192894f11518SBrad Love 		msleep(100);
192994f11518SBrad Love 		break;
1930b285192aSMauro Carvalho Chehab 	}
1931b285192aSMauro Carvalho Chehab }
1932b285192aSMauro Carvalho Chehab 
cx23885_ir_init(struct cx23885_dev * dev)1933b285192aSMauro Carvalho Chehab int cx23885_ir_init(struct cx23885_dev *dev)
1934b285192aSMauro Carvalho Chehab {
1935b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
1936b285192aSMauro Carvalho Chehab 		{
19374eb2f557SMauro Carvalho Chehab 			.flags	  = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1938b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1939b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1940b285192aSMauro Carvalho Chehab 			.value	  = 0,
1941b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1942b285192aSMauro Carvalho Chehab 		}, {
19434eb2f557SMauro Carvalho Chehab 			.flags	  = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
1944b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_TX_GPIO20,
1945b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_TX,
1946b285192aSMauro Carvalho Chehab 			.value	  = 0,
1947b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1948b285192aSMauro Carvalho Chehab 		}
1949b285192aSMauro Carvalho Chehab 	};
1950b285192aSMauro Carvalho Chehab 	const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1951b285192aSMauro Carvalho Chehab 
1952b285192aSMauro Carvalho Chehab 	static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1953b285192aSMauro Carvalho Chehab 		{
19544eb2f557SMauro Carvalho Chehab 			.flags	  = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
1955b285192aSMauro Carvalho Chehab 			.pin	  = CX23885_PIN_IR_RX_GPIO19,
1956b285192aSMauro Carvalho Chehab 			.function = CX23885_PAD_IR_RX,
1957b285192aSMauro Carvalho Chehab 			.value	  = 0,
1958b285192aSMauro Carvalho Chehab 			.strength = CX25840_PIN_DRIVE_MEDIUM,
1959b285192aSMauro Carvalho Chehab 		}
1960b285192aSMauro Carvalho Chehab 	};
1961b285192aSMauro Carvalho Chehab 	const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
1962b285192aSMauro Carvalho Chehab 
1963b285192aSMauro Carvalho Chehab 	struct v4l2_subdev_ir_parameters params;
1964b285192aSMauro Carvalho Chehab 	int ret = 0;
1965b285192aSMauro Carvalho Chehab 	switch (dev->board) {
1966b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
1967b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1968b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
1969b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
1970b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
1971b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
1972b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
1973b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1974b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
197510a5210eSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1976dd9ad4fbSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1977b285192aSMauro Carvalho Chehab 		/* FIXME: Implement me */
1978b285192aSMauro Carvalho Chehab 		break;
1979b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
1980b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1981b285192aSMauro Carvalho Chehab 		if (ret)
1982b285192aSMauro Carvalho Chehab 			break;
1983b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1984b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1985b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1986b285192aSMauro Carvalho Chehab 		break;
1987b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
1988b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
1989b285192aSMauro Carvalho Chehab 		ret = cx23888_ir_probe(dev);
1990b285192aSMauro Carvalho Chehab 		if (ret)
1991b285192aSMauro Carvalho Chehab 			break;
1992b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1993b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1994b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
1995b285192aSMauro Carvalho Chehab 		/*
1996b285192aSMauro Carvalho Chehab 		 * For these boards we need to invert the Tx output via the
1997b285192aSMauro Carvalho Chehab 		 * IR controller to have the LED off while idle
1998b285192aSMauro Carvalho Chehab 		 */
1999b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
2000b285192aSMauro Carvalho Chehab 		params.enable = false;
2001b285192aSMauro Carvalho Chehab 		params.shutdown = false;
2002b285192aSMauro Carvalho Chehab 		params.invert_level = true;
2003b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
2004b285192aSMauro Carvalho Chehab 		params.shutdown = true;
2005b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
2006b285192aSMauro Carvalho Chehab 		break;
2007b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2008b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
2009e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
2010e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
2011e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
2012d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
2013070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
2014070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
201561b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2016cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2017c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2018c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
2019b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
2020b285192aSMauro Carvalho Chehab 			break;
2021b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
2022b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
2023b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
2024b285192aSMauro Carvalho Chehab 			break;
2025b285192aSMauro Carvalho Chehab 		}
2026b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2027b285192aSMauro Carvalho Chehab 				 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
2028b285192aSMauro Carvalho Chehab 		break;
2029b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2030b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
2031b285192aSMauro Carvalho Chehab 			break;
2032b285192aSMauro Carvalho Chehab 		dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
2033b285192aSMauro Carvalho Chehab 		if (dev->sd_ir == NULL) {
2034b285192aSMauro Carvalho Chehab 			ret = -ENODEV;
2035b285192aSMauro Carvalho Chehab 			break;
2036b285192aSMauro Carvalho Chehab 		}
2037b285192aSMauro Carvalho Chehab 		v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
2038b285192aSMauro Carvalho Chehab 				 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
2039b285192aSMauro Carvalho Chehab 		break;
2040b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
204146b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2042b285192aSMauro Carvalho Chehab 		request_module("ir-kbd-i2c");
2043b285192aSMauro Carvalho Chehab 		break;
2044b285192aSMauro Carvalho Chehab 	}
2045b285192aSMauro Carvalho Chehab 
2046b285192aSMauro Carvalho Chehab 	return ret;
2047b285192aSMauro Carvalho Chehab }
2048b285192aSMauro Carvalho Chehab 
cx23885_ir_fini(struct cx23885_dev * dev)2049b285192aSMauro Carvalho Chehab void cx23885_ir_fini(struct cx23885_dev *dev)
2050b285192aSMauro Carvalho Chehab {
2051b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2052b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2053b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2054b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2055b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_IR);
2056b285192aSMauro Carvalho Chehab 		cx23888_ir_remove(dev);
2057b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
2058b285192aSMauro Carvalho Chehab 		break;
2059b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2060b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
2061b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2062e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
2063e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
2064e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
2065d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
2066070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
2067070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
206861b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2069cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2070c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2071c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
2072b285192aSMauro Carvalho Chehab 		cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
2073b285192aSMauro Carvalho Chehab 		/* sd_ir is a duplicate pointer to the AV Core, just clear it */
2074b285192aSMauro Carvalho Chehab 		dev->sd_ir = NULL;
2075b285192aSMauro Carvalho Chehab 		break;
2076b285192aSMauro Carvalho Chehab 	}
2077b285192aSMauro Carvalho Chehab }
2078b285192aSMauro Carvalho Chehab 
netup_jtag_io(void * device,int tms,int tdi,int read_tdo)2079ada73eeeSMauro Carvalho Chehab static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
2080b285192aSMauro Carvalho Chehab {
2081b285192aSMauro Carvalho Chehab 	int data;
2082b285192aSMauro Carvalho Chehab 	int tdo = 0;
2083b285192aSMauro Carvalho Chehab 	struct cx23885_dev *dev = (struct cx23885_dev *)device;
2084b285192aSMauro Carvalho Chehab 	/*TMS*/
2085b285192aSMauro Carvalho Chehab 	data = ((cx_read(GP0_IO)) & (~0x00000002));
2086b285192aSMauro Carvalho Chehab 	data |= (tms ? 0x00020002 : 0x00020000);
2087b285192aSMauro Carvalho Chehab 	cx_write(GP0_IO, data);
2088b285192aSMauro Carvalho Chehab 
2089b285192aSMauro Carvalho Chehab 	/*TDI*/
2090b285192aSMauro Carvalho Chehab 	data = ((cx_read(MC417_RWD)) & (~0x0000a000));
2091b285192aSMauro Carvalho Chehab 	data |= (tdi ? 0x00008000 : 0);
2092b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
2093b285192aSMauro Carvalho Chehab 	if (read_tdo)
2094b285192aSMauro Carvalho Chehab 		tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
2095b285192aSMauro Carvalho Chehab 
2096b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data | 0x00002000);
2097b285192aSMauro Carvalho Chehab 	udelay(1);
2098b285192aSMauro Carvalho Chehab 	/*TCK*/
2099b285192aSMauro Carvalho Chehab 	cx_write(MC417_RWD, data);
2100b285192aSMauro Carvalho Chehab 
2101b285192aSMauro Carvalho Chehab 	return tdo;
2102b285192aSMauro Carvalho Chehab }
2103b285192aSMauro Carvalho Chehab 
cx23885_ir_pci_int_enable(struct cx23885_dev * dev)2104b285192aSMauro Carvalho Chehab void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
2105b285192aSMauro Carvalho Chehab {
2106b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2107b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2108b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2109b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2110b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
2111b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_IR);
2112b285192aSMauro Carvalho Chehab 		break;
2113b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2114b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
2115b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2116e5f670b7SAlfredo Jesús Delaiti 	case CX23885_BOARD_MYGICA_X8507:
2117e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
2118e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
2119d11a3835Snibble.max 	case CX23885_BOARD_DVBSKY_T9580:
2120070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_T980C:
2121070e6661Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
212261b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2123cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2124c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2125c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
2126b285192aSMauro Carvalho Chehab 		if (dev->sd_ir)
2127b285192aSMauro Carvalho Chehab 			cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
2128b285192aSMauro Carvalho Chehab 		break;
2129b285192aSMauro Carvalho Chehab 	}
2130b285192aSMauro Carvalho Chehab }
2131b285192aSMauro Carvalho Chehab 
cx23885_card_setup(struct cx23885_dev * dev)2132b285192aSMauro Carvalho Chehab void cx23885_card_setup(struct cx23885_dev *dev)
2133b285192aSMauro Carvalho Chehab {
2134b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts1 = &dev->ts1;
2135b285192aSMauro Carvalho Chehab 	struct cx23885_tsport *ts2 = &dev->ts2;
2136b285192aSMauro Carvalho Chehab 
2137b285192aSMauro Carvalho Chehab 	static u8 eeprom[256];
2138b285192aSMauro Carvalho Chehab 
2139b285192aSMauro Carvalho Chehab 	if (dev->i2c_bus[0].i2c_rc == 0) {
2140b285192aSMauro Carvalho Chehab 		dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2141b285192aSMauro Carvalho Chehab 		tveeprom_read(&dev->i2c_bus[0].i2c_client,
2142b285192aSMauro Carvalho Chehab 			      eeprom, sizeof(eeprom));
2143b285192aSMauro Carvalho Chehab 	}
2144b285192aSMauro Carvalho Chehab 
2145b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2146b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2147b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0) {
2148b285192aSMauro Carvalho Chehab 			if (eeprom[0x80] != 0x84)
2149b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0xc0);
2150b285192aSMauro Carvalho Chehab 			else
2151b285192aSMauro Carvalho Chehab 				hauppauge_eeprom(dev, eeprom+0x80);
2152b285192aSMauro Carvalho Chehab 		}
2153b285192aSMauro Carvalho Chehab 		break;
2154b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2155b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2156b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
2157b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
2158b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0x80);
2159b285192aSMauro Carvalho Chehab 		break;
2160b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2161b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2162b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
2163b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2164b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2165b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
2166b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2167b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2168b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
2169b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2170b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
21717c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
2172721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
2173cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
21741fc77d01SAntti Palosaari 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
217594f11518SBrad Love 	case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
217616fad674SBrad Love 	case CX23885_BOARD_HAUPPAUGE_STARBURST2:
217710a5210eSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2178c00ba2c1SBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2179dd9ad4fbSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2180c00ba2c1SBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
2181b285192aSMauro Carvalho Chehab 		if (dev->i2c_bus[0].i2c_rc == 0)
2182b285192aSMauro Carvalho Chehab 			hauppauge_eeprom(dev, eeprom+0xc0);
2183b285192aSMauro Carvalho Chehab 		break;
21846c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_260E:
21856c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_460E:
21866c43a217SHans Verkuil 		dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
21876c43a217SHans Verkuil 		tveeprom_read(&dev->i2c_bus[1].i2c_client,
21886c43a217SHans Verkuil 			      eeprom, sizeof(eeprom));
21896c43a217SHans Verkuil 		if (dev->i2c_bus[0].i2c_rc == 0)
21906c43a217SHans Verkuil 			viewcast_eeprom(dev, eeprom);
21916c43a217SHans Verkuil 		break;
2192b285192aSMauro Carvalho Chehab 	}
2193b285192aSMauro Carvalho Chehab 
2194b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2195e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
2196e8d42373SOleh Kravchenko 		/* Defaults for VID B */
2197e8d42373SOleh Kravchenko 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
2198e8d42373SOleh Kravchenko 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2199e8d42373SOleh Kravchenko 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2200e8d42373SOleh Kravchenko 		/* Defaults for VID C */
2201e8d42373SOleh Kravchenko 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2202e8d42373SOleh Kravchenko 		ts2->gen_ctrl_val  = 0x10e;
2203e8d42373SOleh Kravchenko 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2204e8d42373SOleh Kravchenko 		ts2->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2205e8d42373SOleh Kravchenko 		break;
2206b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
2207b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
220846b21bbaSJames Harper 	case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
2209b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2210b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2211b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2212df561f66SGustavo A. R. Silva 		fallthrough;
2213b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2214b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2215b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2216b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2217b285192aSMauro Carvalho Chehab 		break;
2218b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
2219b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2220b285192aSMauro Carvalho Chehab 		/* Defaults for VID B - Analog encoder */
2221b285192aSMauro Carvalho Chehab 		/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2222b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val    = 0x10e;
2223b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val   = 0x1; /* Enable TS_CLK */
2224b285192aSMauro Carvalho Chehab 		ts1->src_sel_val     = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2225b285192aSMauro Carvalho Chehab 
2226b285192aSMauro Carvalho Chehab 		/* APB_TSVALERR_POL (active low)*/
2227b285192aSMauro Carvalho Chehab 		ts1->vld_misc_val    = 0x2000;
2228b285192aSMauro Carvalho Chehab 		ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
2229b285192aSMauro Carvalho Chehab 		cx_write(0x130184, 0xc);
2230b285192aSMauro Carvalho Chehab 
2231b285192aSMauro Carvalho Chehab 		/* Defaults for VID C */
2232b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2233b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2234b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2235b285192aSMauro Carvalho Chehab 		break;
2236b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TBS_6920:
2237b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x4; /* Parallel */
2238b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2239b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2240b285192aSMauro Carvalho Chehab 		break;
2241b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
2242b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S471:
2243b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_DVBWORLD_2005:
2244f667190bSMariusz Bia?o?czyk 	case CX23885_BOARD_PROF_8000:
224582c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
22460e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
224761b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2248cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2249b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2250b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2251b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2252b285192aSMauro Carvalho Chehab 		break;
2253b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2254b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2255b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2256b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2257b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2258b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2259b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2260b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2261b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2262b285192aSMauro Carvalho Chehab 		break;
2263e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
2264e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
2265e6001482SLuis Alves 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2266e6001482SLuis Alves 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2267e6001482SLuis Alves 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2268e6001482SLuis Alves 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2269e6001482SLuis Alves 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2270e6001482SLuis Alves 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2271e6001482SLuis Alves 		tbs_card_init(dev);
2272e6001482SLuis Alves 		break;
2273b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
2274b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
22750d1b5265SMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
2276b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2277b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2278b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2279b285192aSMauro Carvalho Chehab 		break;
2280b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8558PRO:
2281b285192aSMauro Carvalho Chehab 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2282b285192aSMauro Carvalho Chehab 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2283b285192aSMauro Carvalho Chehab 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2284b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2285b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2286b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2287b285192aSMauro Carvalho Chehab 		break;
22887c62f5a1SMichael Krufky 	case CX23885_BOARD_HAUPPAUGE_HVR4400:
22897c62f5a1SMichael Krufky 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
22907c62f5a1SMichael Krufky 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
22917c62f5a1SMichael Krufky 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
229236efec48SMatthias Schwarzott 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
229336efec48SMatthias Schwarzott 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
229436efec48SMatthias Schwarzott 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
22957c62f5a1SMichael Krufky 		break;
2296721f3223SMatthias Schwarzott 	case CX23885_BOARD_HAUPPAUGE_STARBURST:
2297721f3223SMatthias Schwarzott 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2298721f3223SMatthias Schwarzott 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2299721f3223SMatthias Schwarzott 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2300721f3223SMatthias Schwarzott 		break;
230129442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
2302c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
230329442266SOlli Salonen 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
230429442266SOlli Salonen 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
230529442266SOlli Salonen 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
230629442266SOlli Salonen 		ts2->gen_ctrl_val  = 0x8; /* Serial bus */
230729442266SOlli Salonen 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
230829442266SOlli Salonen 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
230929442266SOlli Salonen 		break;
2310c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2311c29d6a83Snibble.max 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
2312c29d6a83Snibble.max 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2313c29d6a83Snibble.max 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2314c29d6a83Snibble.max 		ts2->gen_ctrl_val  = 0xe; /* Serial bus */
2315c29d6a83Snibble.max 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2316c29d6a83Snibble.max 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2317c29d6a83Snibble.max 		break;
23181fc77d01SAntti Palosaari 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
231916fad674SBrad Love 	case CX23885_BOARD_HAUPPAUGE_STARBURST2:
23201fc77d01SAntti Palosaari 		ts1->gen_ctrl_val  = 0x5; /* Parallel */
23211fc77d01SAntti Palosaari 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
23221fc77d01SAntti Palosaari 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
23231fc77d01SAntti Palosaari 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
23241fc77d01SAntti Palosaari 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
23251fc77d01SAntti Palosaari 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
23261fc77d01SAntti Palosaari 		break;
232794f11518SBrad Love 	case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
232810a5210eSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2329c00ba2c1SBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885:
2330dd9ad4fbSStephen Backway 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2331c00ba2c1SBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885:
233210a5210eSStephen Backway 		ts1->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
233310a5210eSStephen Backway 		ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
233410a5210eSStephen Backway 		ts1->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
233510a5210eSStephen Backway 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
233610a5210eSStephen Backway 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
233710a5210eSStephen Backway 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
233810a5210eSStephen Backway 		break;
2339b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2340b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2341b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
2342b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2343b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1200:
2344b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2345b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1400:
2346cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2347b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2348642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2349b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2350b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2351b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2352b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1275:
2353b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2354b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
2355b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1210:
2356b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2357b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2358b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2359b285192aSMauro Carvalho Chehab 	default:
2360b285192aSMauro Carvalho Chehab 		ts2->gen_ctrl_val  = 0xc; /* Serial bus + punctured clock */
2361b285192aSMauro Carvalho Chehab 		ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2362b285192aSMauro Carvalho Chehab 		ts2->src_sel_val   = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2363b285192aSMauro Carvalho Chehab 	}
2364b285192aSMauro Carvalho Chehab 
2365b285192aSMauro Carvalho Chehab 	/* Certain boards support analog, or require the avcore to be
2366b285192aSMauro Carvalho Chehab 	 * loaded, ensure this happens.
2367b285192aSMauro Carvalho Chehab 	 */
2368b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2369b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TEVII_S470:
2370b285192aSMauro Carvalho Chehab 		/* Currently only enabled for the integrated IR controller */
2371b285192aSMauro Carvalho Chehab 		if (!enable_885_ir)
2372b285192aSMauro Carvalho Chehab 			break;
2373df561f66SGustavo A. R. Silva 		fallthrough;
2374b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2375b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2376cce11b09SHans Verkuil 	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
2377b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2378b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1700:
2379b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
2380642ca1a0SAnca Emanuel 	case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
2381b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
2382b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2383b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2384b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2385b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
2386b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255:
2387b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
238894f11518SBrad Love 	case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
2389c00ba2c1SBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
2390c00ba2c1SBrad Love 	case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
2391b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1270:
2392b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1850:
23932be355a0SBrad Love 	case CX23885_BOARD_HAUPPAUGE_HVR5525:
2394b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8506:
2395b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MAGICPRO_PROHDTVE2:
2396b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1290:
2397b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
2398b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
2399b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_HAUPPAUGE_HVR1500:
2400b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MPX885:
2401b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_MYGICA_X8507:
2402b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
2403e8d42373SOleh Kravchenko 	case CX23885_BOARD_AVERMEDIA_HC81R:
2404e6001482SLuis Alves 	case CX23885_BOARD_TBS_6980:
2405e6001482SLuis Alves 	case CX23885_BOARD_TBS_6981:
240629442266SOlli Salonen 	case CX23885_BOARD_DVBSKY_T9580:
240782c10276SOlli Salonen 	case CX23885_BOARD_DVBSKY_T980C:
24080e6c7b01Snibble.max 	case CX23885_BOARD_DVBSKY_S950C:
240961b103e8SOlli Salonen 	case CX23885_BOARD_TT_CT2_4500_CI:
2410cba5480cSnibble.max 	case CX23885_BOARD_DVBSKY_S950:
2411c29d6a83Snibble.max 	case CX23885_BOARD_DVBSKY_S952:
2412c02ef64aSNibble Max 	case CX23885_BOARD_DVBSKY_T982:
24136c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_260E:
24146c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_460E:
2415dc4cac67SForest Crossman 	case CX23885_BOARD_AVERMEDIA_CE310B:
2416b285192aSMauro Carvalho Chehab 		dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2417b285192aSMauro Carvalho Chehab 				&dev->i2c_bus[2].i2c_adap,
2418b285192aSMauro Carvalho Chehab 				"cx25840", 0x88 >> 1, NULL);
2419b285192aSMauro Carvalho Chehab 		if (dev->sd_cx25840) {
24205ceade1dSBrad Love 			/* set host data for clk_freq configuration */
24215ceade1dSBrad Love 			v4l2_set_subdev_hostdata(dev->sd_cx25840,
24225ceade1dSBrad Love 						&dev->clk_freq);
24235ceade1dSBrad Love 
2424b285192aSMauro Carvalho Chehab 			dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2425b285192aSMauro Carvalho Chehab 			v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2426b285192aSMauro Carvalho Chehab 		}
2427b285192aSMauro Carvalho Chehab 		break;
2428b285192aSMauro Carvalho Chehab 	}
2429b285192aSMauro Carvalho Chehab 
24306c43a217SHans Verkuil 	switch (dev->board) {
24316c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_260E:
24326c43a217SHans Verkuil 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
24336c43a217SHans Verkuil 				&dev->i2c_bus[0].i2c_adap,
24346c43a217SHans Verkuil 				"cs3308", 0x82 >> 1, NULL);
24356c43a217SHans Verkuil 		break;
24366c43a217SHans Verkuil 	case CX23885_BOARD_VIEWCAST_460E:
24376c43a217SHans Verkuil 		/* This cs3308 controls the audio from the breakout cable */
24386c43a217SHans Verkuil 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
24396c43a217SHans Verkuil 				&dev->i2c_bus[0].i2c_adap,
24406c43a217SHans Verkuil 				"cs3308", 0x80 >> 1, NULL);
24416c43a217SHans Verkuil 		/* This cs3308 controls the audio from the onboard header */
24426c43a217SHans Verkuil 		v4l2_i2c_new_subdev(&dev->v4l2_dev,
24436c43a217SHans Verkuil 				&dev->i2c_bus[0].i2c_adap,
24446c43a217SHans Verkuil 				"cs3308", 0x82 >> 1, NULL);
24456c43a217SHans Verkuil 		break;
24466c43a217SHans Verkuil 	}
24476c43a217SHans Verkuil 
2448b285192aSMauro Carvalho Chehab 	/* AUX-PLL 27MHz CLK */
2449b285192aSMauro Carvalho Chehab 	switch (dev->board) {
2450b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2451b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
2452b285192aSMauro Carvalho Chehab 		break;
2453b285192aSMauro Carvalho Chehab 	case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2454b285192aSMauro Carvalho Chehab 		int ret;
2455b285192aSMauro Carvalho Chehab 		const struct firmware *fw;
2456b285192aSMauro Carvalho Chehab 		const char *filename = "dvb-netup-altera-01.fw";
2457b285192aSMauro Carvalho Chehab 		char *action = "configure";
2458b285192aSMauro Carvalho Chehab 		static struct netup_card_info cinfo;
2459b285192aSMauro Carvalho Chehab 		struct altera_config netup_config = {
2460b285192aSMauro Carvalho Chehab 			.dev = dev,
2461b285192aSMauro Carvalho Chehab 			.action = action,
2462b285192aSMauro Carvalho Chehab 			.jtag_io = netup_jtag_io,
2463b285192aSMauro Carvalho Chehab 		};
2464b285192aSMauro Carvalho Chehab 
2465b285192aSMauro Carvalho Chehab 		netup_initialize(dev);
2466b285192aSMauro Carvalho Chehab 
2467b285192aSMauro Carvalho Chehab 		netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2468b285192aSMauro Carvalho Chehab 		if (netup_card_rev)
2469b285192aSMauro Carvalho Chehab 			cinfo.rev = netup_card_rev;
2470b285192aSMauro Carvalho Chehab 
2471b285192aSMauro Carvalho Chehab 		switch (cinfo.rev) {
2472b285192aSMauro Carvalho Chehab 		case 0x4:
2473b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-04.fw";
2474b285192aSMauro Carvalho Chehab 			break;
2475b285192aSMauro Carvalho Chehab 		default:
2476b285192aSMauro Carvalho Chehab 			filename = "dvb-netup-altera-01.fw";
2477b285192aSMauro Carvalho Chehab 			break;
2478b285192aSMauro Carvalho Chehab 		}
2479e39682b5SMauro Carvalho Chehab 		pr_info("NetUP card rev=0x%x fw_filename=%s\n",
2480b285192aSMauro Carvalho Chehab 			cinfo.rev, filename);
2481b285192aSMauro Carvalho Chehab 
2482b285192aSMauro Carvalho Chehab 		ret = request_firmware(&fw, filename, &dev->pci->dev);
2483b285192aSMauro Carvalho Chehab 		if (ret != 0)
2484fe63a1a6SMauro Carvalho Chehab 			pr_err("did not find the firmware file '%s'. You can use <kernel_dir>/scripts/get_dvb_firmware to get the firmware.",
248507ab29e1SMauro Carvalho Chehab 			       filename);
2486b285192aSMauro Carvalho Chehab 		else
2487b285192aSMauro Carvalho Chehab 			altera_init(&netup_config, fw);
2488b285192aSMauro Carvalho Chehab 
2489b285192aSMauro Carvalho Chehab 		release_firmware(fw);
2490b285192aSMauro Carvalho Chehab 		break;
2491b285192aSMauro Carvalho Chehab 	}
2492b285192aSMauro Carvalho Chehab 	}
2493b285192aSMauro Carvalho Chehab }
2494