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/linux/tools/testing/memblock/tests/
H A Dbasic_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 ASSERT_NE(memblock.memory.regions, NULL); in memblock_initialization_check()
18 ASSERT_EQ(memblock.memory.cnt, 0); in memblock_initialization_check()
19 ASSERT_EQ(memblock.memory.max, EXPECTED_MEMBLOCK_REGIONS); in memblock_initialization_check()
20 ASSERT_EQ(strcmp(memblock.memory.name, "memory"), 0); in memblock_initialization_check()
22 ASSERT_NE(memblock.reserved.regions, NULL); in memblock_initialization_check()
23 ASSERT_EQ(memblock.reserved.cnt, 0); in memblock_initialization_check()
24 ASSERT_EQ(memblock.memory.max, EXPECTED_MEMBLOCK_REGIONS); in memblock_initialization_check()
25 ASSERT_EQ(strcmp(memblock.reserved.name, "reserved"), 0); in memblock_initialization_check()
36 * A simple test that adds a memory block of a specified base address
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H A Dalloc_helpers_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * A simple test that tries to allocate a memory region above a specified,
9 * | +-----------+ |
11 * +----------+-----------+---------+
16 * Expect to allocate a cleared region at the minimal memory address.
20 struct memblock_region *rgn = &memblock.reserved.regions[0]; in alloc_from_simple_generic_check()
28 min_addr = memblock_end_of_DRAM() - SMP_CACHE_BYTES; in alloc_from_simple_generic_check()
35 ASSERT_EQ(rgn->size, size); in alloc_from_simple_generic_check()
36 ASSERT_EQ(rgn->base, min_addr); in alloc_from_simple_generic_check()
38 ASSERT_EQ(memblock.reserved.cnt, 1); in alloc_from_simple_generic_check()
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H A Dalloc_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 * A simple test that tries to allocate a small memory region.
22 * Expect to allocate an aligned region near the end of the available memory.
26 struct memblock_region *rgn = &memblock.reserved.regions[0]; in alloc_top_down_simple_check()
34 expected_start = memblock_end_of_DRAM() - SMP_CACHE_BYTES; in alloc_top_down_simple_check()
41 ASSERT_EQ(rgn->size, size); in alloc_top_down_simple_check()
42 ASSERT_EQ(rgn->base, expected_start); in alloc_top_down_simple_check()
44 ASSERT_EQ(memblock.reserved.cnt, 1); in alloc_top_down_simple_check()
45 ASSERT_EQ(memblock.reserved.total_size, size); in alloc_top_down_simple_check()
53 * A test that tries to allocate memory next to a reserved region that starts at
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H A Dalloc_nid_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
51 * A simple test that tries to allocate a memory region within min_addr and
55 * | + +----
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H A Dalloc_exact_nid_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 * A test that tries to allocate a memory region in a specific NUMA node that
24 * has enough memory to allocate a region of the requested size.
30 struct memblock_region *new_rgn = &memblock.reserved.regions[0]; in alloc_exact_nid_top_down_numa_simple_check()
31 struct memblock_region *req_node = &memblock.memory.regions[nid_req]; in alloc_exact_nid_top_down_numa_simple_check()
40 ASSERT_LE(SZ_4, req_node->siz in alloc_exact_nid_top_down_numa_simple_check()
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H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 {"movable-node", 0, NULL, 'm'},
41 memset(memblock.memory.regions, 0, in reset_memblock_regions()
42 memblock.memory.cnt * sizeof(struct memblock_region)); in reset_memblock_regions()
43 memblock.memory.cnt = 0; in reset_memblock_regions()
44 memblock.memory.max = INIT_MEMBLOCK_REGIONS; in reset_memblock_regions()
45 memblock.memory.total_size = 0; in reset_memblock_regions()
47 memset(memblock.reserved.regions, 0, in reset_memblock_regions()
48 memblock.reserved.cnt * sizeof(struct memblock_region)); in reset_memblock_regions()
49 memblock.reserved.cnt = 0; in reset_memblock_regions()
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/linux/Documentation/devicetree/bindings/soc/fsl/
H A Dfsl,qman-fqd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/fsl,qman-fqd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: QMan Private Memory Nodes
10 - Frank Li <Frank.Li@nxp.com>
13 QMan requires two contiguous range of physical memory used for the backing store
15 This memory is reserved/allocated as a node under the /reserved-memory node.
17 BMan requires a contiguous range of physical memory used for the backing store
18 for BMan Free Buffer Proxy Records (FBPR). This memory is reserved/allocated as
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/linux/Documentation/driver-api/cxl/platform/example-configurations/
H A Dflexible.rst1 .. SPDX-License-Identifier: GPL-2.0
7 has two CXL memory expanders with a 4GB of memory (32GB total).
10 to configure the memory devices in various interleave or NUMA node
15 * Cross-Bridge interleave is described in one CFMWS that covers all capacity.
16 * One CFMWS is also described per-host bridge.
17 * One CFMWS is also described per-device.
24 Reserved : 00
28 Reserved : 00000000
33 Reserved : 00
37 Reserved : 00000000
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/linux/mm/
H A Dmemblock.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Procedures for maintaining information about logical memory blocks.
47 * Memblock is a method of managing memory regions during the early
48 * boot period when the usual kernel memory allocators are not up and
51 * Memblock views the system memory as collections of contiguous
54 * * ``memory``
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/linux/Documentation/arch/arm64/
H A Dkdump.rst2 crashkernel memory reservation on arm64
9 reserved memory is needed to pre-load the kdump kernel and boot such
12 That reserved memory for kdump is adapted to be able to minimally
19 Through the kernel parameters below, memory can be reserved accordingly
21 large chunk of memomy can be found. The low memory reservation needs to
22 be considered if the crashkernel is reserved from the high memory area.
24 - crashkernel=size@offset
25 - crashkernel=size
26 - crashkernel=size,high crashkernel=size,low
28 Low memory and high memory
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,davinci-rproc.txt4 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
5 is used to offload some of the processor-intensive tasks or algorithms, for
8 The processor cores in the sub-system usually contain additional sub-modules
9 like L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
15 Each DSP Core sub-system is represented as a single DT node.
18 --------------------
21 - compatible: Should be one of the following,
22 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
24 - reg: Should contain an entry for each value in 'reg-names'.
25 Each entry should have the memory region's start address
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H A Dti,omap-remoteproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
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H A Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-ds
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H A Drenesas,rcar-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/renesas,rcar-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car remote processor controller
10 - Julien Massot <julien.massot@iot.bzh>
14 boots firmwares on the Renesas R-Car family chipset.
15 R-Car gen3 family may have a realtime processor, this processor shares peripheral
20 const: renesas,rcar-cr7
25 power-domains:
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/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_switch_map.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
49 /* VLAN-FID Table offset. 4096 VIDs. 2B per VID = 8KB = 0x2000 */
52 /* VLAN-FID Table offset for EMAC */
55 /* Packet descriptor Q reserved memory */
58 /* Packet descriptor Q reserved memory */
61 /* Packet descriptor Q reserved memory */
64 /* Packet descriptor Q reserved memory */
67 /* Packet descriptor Q reserved memory */
70 /* Packet descriptor Q reserved memory */
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/linux/Documentation/devicetree/bindings/watchdog/
H A Dti,rti-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/ti,rti-wd
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
H A Dnv40.c39 #define nv40_instobj(p) container_of((p), struct nv40_instobj, base.memory)
48 nv40_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data) in nv40_instobj_wr32() argument
50 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_wr32()
51 iowrite32_native(data, iobj->imem->iomem + iobj->node->offset + offset); in nv40_instobj_wr32()
55 nv40_instobj_rd32(struct nvkm_memory *memory, u64 offset) in nv40_instobj_rd32() argument
57 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_rd32()
58 return ioread32_native(iobj->imem->iomem + iobj->node->offset + offset); in nv40_instobj_rd32()
68 nv40_instobj_release(struct nvkm_memory *memory) in nv40_instobj_release() argument
74 nv40_instobj_acquire(struct nvkm_memory *memory) in nv40_instobj_acquire() argument
76 struct nv40_instobj *iobj = nv40_instobj(memory); in nv40_instobj_acquire()
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/linux/Documentation/devicetree/bindings/reserved-memory/
H A Dnvidia,tegra264-bpmp-shmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved
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H A Dxen,shared-memory.txt1 * Xen hypervisor reserved-memory binding
3 Expose one or more memory regions as reserved-memory to the guest
5 to be a shared memory area across multiple virtual machines for
8 For each of these pre-shared memory regions, a range is exposed under
9 the /reserved-memory node as a child node. Each range sub-node is named
10 xen-shmem@<address> and has the following properties:
12 - compatible:
13 compatible = "xen,shared-memory-v1"
15 - reg:
16 the base guest physical address and size of the shared memory region
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H A Dqcom,cmd-db.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/qcom,cmd-db.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 is stored in a shared memory region and is loaded by the remote processor.
17 remote processor and made available in the shared memory.
20 - Bjorn Andersson <bjorn.andersson@linaro.org>
23 - $ref: reserved-memory.yaml
27 const: qcom,cmd-db
30 - reg
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H A Dramoops.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/ramoops.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 recovered after a reboot. This is a child-node of "/reserved-memory", and
16 as kernel log messages, or for optional ECC error-correction data. The total
17 size of these optional buffers must fit in the reserved region.
23 At least one of "record-size", "console-size", "ftrace-size", or "pmsg-size"
24 must be set non-zero, but are otherwise optional as listed below.
27 - Kees Cook <keescook@chromium.org>
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H A Dgoogle,open-dice.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/google,open-dice.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This binding represents a reserved memory region containing data
13 See https://pigweed.googlesource.com/open-dice/
16 - David Brazdil <dbrazdil@google.com>
19 - $ref: reserved-memory.yaml
23 const: google,open-dice
26 description: page-aligned region of memory containing DICE data
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/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_ringbuf.c1 // SPDX-License-Identifier: GPL-2.0
20 /* reserve 8 byte ringbuf memory */ \ in ringbuf_invalid_reservation_offset_1()
22 *(u64*)(r10 - 8) = r1; \ in ringbuf_invalid_reservation_offset_1()
27 /* store a pointer to the reserved memory in R6 */\ in ringbuf_invalid_reservation_offset_1()
32 *(u64*)(r10 - 8) = r6; \ in ringbuf_invalid_reservation_offset_1()
34 r7 = *(u64*)(r10 - 8); \ in ringbuf_invalid_reservation_offset_1()
38 /* submit the reserved ringbuf memory */ \ in ringbuf_invalid_reservation_offset_1()
40 /* add invalid offset to reserved ringbuf memory */\ in ringbuf_invalid_reservation_offset_1()
55 __failure __msg("R7 min value is outside of the allowed memory range")
60 /* reserve 8 byte ringbuf memory */ \ in ringbuf_invalid_reservation_offset_2()
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/linux/arch/alpha/include/asm/
H A Dcore_irongate.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * IRONGATE is the internal name for the AMD-751 K7 core logic chipset
10 * which provides memory controller and PCI access for NAUTILUS-based
21 * The 21264 supports, and internally recognizes, a 44-bit physical
22 * address space that is divided equally between memory address space
23 * and I/O address space. Memory address space resides in the lower
30 * through the routines given is 32-bit.
38 igcsr32 dev_vendor; /* 0x00 - device ID, vendor ID */
39 igcsr32 stat_cmd; /* 0x04 - status, command */
40 igcsr32 class; /* 0x08 - class code, rev ID */
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/linux/include/uapi/drm/
H A Dexynos_drm.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
8 * Seung-Woo Kim <sw0312.kim@samsung.com>
26 * User-desired buffer creation information structure.
28 * @size: user-desired memory allocation size.
29 * - this size value would be page-aligned internally.
30 * @flags: user request for setting memory type or cache attributes.
32 * - this handle will be set by gem module of kernel side.
41 * A structure for getting a fake-offset that can be used with mmap.
44 * @reserved: just padding to be 64-bit aligned.
45 * @offset: a fake-offset of gem object.
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