| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | samsung,aries-wm8994.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/samsung,aries-wm8994.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jonathan Bakker <xc-racer2@live.ca> 13 - $ref: sound-card-common.yaml# 19 - samsung,aries-wm8994 21 - samsung,fascinate4g-wm8994 27 sound-dai: 34 - sound-dai [all …]
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| H A D | samsung,midas-audio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/samsung,midas-audio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 - $ref: sound-card-common.yaml# 17 const: samsung,midas-audio 23 sound-dai: 27 - sound-dai 33 sound-dai: [all …]
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| /linux/include/dt-bindings/pinctrl/ |
| H A D | pinctrl-tegra.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 15 * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain, 16 * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
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| /linux/sound/soc/codecs/ |
| H A D | max98090.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * max98090.c -- MAX98090 ALSA SoC Audio driver 5 * Copyright 2011-2012 Maxim Integrated Products 83 { 0x37, 0x00 }, /* 37 Rcv/Line OutL Mixer */ 84 { 0x38, 0x00 }, /* 38 Rcv/Line OutL Control */ 85 { 0x39, 0x15 }, /* 39 Rcv/Line OutL Volume */ 279 /* Reset the codec by writing to this write-only reset register */ in max98090_reset() 280 ret = regmap_write(max98090->regmap, M98090_REG_SOFTWARE_RESET, in max98090_reset() 283 dev_err(max98090->component->dev, in max98090_reset() 300 -600, 600, 0); [all …]
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | nvidia,tegra114-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra114-pinmux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 const: nvidia,tegra114-pinmux 19 - description: pad control registers 20 - description: mux registers 23 "^pinmux(-[a-z0-9-_]+)?$": [all …]
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| H A D | nvidia,tegra124-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 14 Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and 15 nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a 21 - const: nvidia,tegra124-pinmux 22 - items: [all …]
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| H A D | nvidia,tegra-pinmux-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 14 Please refer to pinctrl-bindings.txt in this directory for details of the 22 pin configuration parameters, such as pull-up, tristate, drive strength, 46 $ref: /schemas/types.yaml#/definitions/string-array 57 description: Pull-down/up setting to apply to the pin. [all …]
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | s5pv210-fascinate4g.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 6 #include "s5pv210-aries.dtsi" 9 model = "Samsung Galaxy S Fascinate 4G (SGH-T959P) based on S5PV210"; 11 chassis-type = "handset"; 14 stdout-path = &uart2; 17 gpio-keys { 18 compatible = "gpio-keys"; [all …]
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| H A D | s5pv210-galaxys.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 6 #include "s5pv210-aries.dtsi" 9 model = "Samsung Galaxy S1 (GT-I9000) based on S5PV210"; 11 chassis-type = "handset"; 14 stdout-path = &uart2; 17 nand_pwrseq: nand-pwrseq { 18 compatible = "mmc-pwrseq-simple"; [all …]
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| H A D | exynos4212-tab3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include "exynos4412-ppmu-common.dtsi" 12 #include "exynos-mfc-reserved-memory.dtsi" 13 #include <dt-bindings/clock/samsung,s2mps11.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/leds/common.h> 16 #include <dt-bindings/input/gpio-keys.h> 17 #include <dt-bindings/input/input.h> 18 #include <dt-bindings/interrupt-controller/irq.h> [all …]
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| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra124-nyan-blaze.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra124-nyan.dtsi" 6 #include "tegra124-nyan-blaze-emc.dtsi" 10 compatible = "google,nyan-blaze-rev10", "google,nyan-blaze-rev9", 11 "google,nyan-blaze-rev8", "google,nyan-blaze-rev7", 12 "google,nyan-blaze-rev6", "google,nyan-blaze-rev5", 13 "google,nyan-blaze-rev4", "google,nyan-blaze-rev3", 14 "google,nyan-blaze-rev2", "google,nyan-blaze-rev1", 15 "google,nyan-blaze-rev0", "google,nyan-blaze", [all …]
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| H A D | tegra124-nyan-big.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra124-nyan.dtsi" 6 #include "tegra124-nyan-big-emc.dtsi" 9 model = "Acer Chromebook 13 CB5-311"; 10 compatible = "google,nyan-big-rev7", "google,nyan-big-rev6", 11 "google,nyan-big-rev5", "google,nyan-big-rev4", 12 "google,nyan-big-rev3", "google,nyan-big-rev2", 13 "google,nyan-big-rev1", "google,nyan-big-rev0", 14 "google,nyan-big", "google,nyan", "nvidia,tegra124"; [all …]
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| H A D | tegra124-apalis-v1.2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright 2016-2018 Toradex AG 7 #include "tegra124-apalis-emc.dtsi" 21 avddio-pex-supply = <®_1v05_vdd>; 22 avdd-pex-pll-supply = <®_1v05_vdd>; 23 avdd-pll-erefe-supply = <®_1v05_avdd>; 24 dvddio-pex-supply = <®_1v05_vdd>; 25 hvdd-pex-pll-e-supply = <®_module_3v3>; 26 hvdd-pex-supply = <®_module_3v3>; 27 vddio-pex-ctl-supply = <®_module_3v3>; [all …]
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| H A D | tegra124-jetson-tk1.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 7 #include "tegra124-jetson-tk1-emc.dtsi" 11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124"; 17 /* This order keeps the mapping DB9 connector <-> ttyS0 */ 24 stdout-path = "serial0:115200n8"; 34 avddio-pex-supply = <&vdd_1v05_run>; 35 dvddio-pex-supply = <&vdd_1v05_run>; 36 avdd-pex-pll-supply = <&vdd_1v05_run>; [all …]
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| H A D | tegra124-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Copyright 2016-2019 Toradex AG 7 #include "tegra124-apalis-emc.dtsi" 20 avddio-pex-supply = <®_1v05_vdd>; 21 avdd-pex-pll-supply = <®_1v05_vdd>; 22 avdd-pll-erefe-supply = <®_1v05_avdd>; 23 dvddio-pex-supply = <®_1v05_vdd>; 24 hvdd-pex-pll-e-supply = <®_module_3v3>; 25 hvdd-pex-supply = <®_module_3v3>; 26 vddio-pex-ctl-supply = <®_module_3v3>; [all …]
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| H A D | tegra114-roth.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 15 linux,initrd-start = <0x82000000>; 16 linux,initrd-end = <0x82800000>; 24 trusted-foundations { 25 compatible = "tlm,trusted-foundations"; 26 tlm,version-major = <2>; 27 tlm,version-minor = <8>; 40 avdd-dsi-csi-supply = <&vdd_1v2_ap>; [all …]
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| H A D | tegra124-venice2.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>; [all …]
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| H A D | tegra114-dalmore.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/input/input.h> 23 stdout-path = "serial0:115200n8"; 34 hdmi-supply = <&vdd_5v0_hdmi>; 35 vdd-supply = <&vdd_hdmi_reg>; 36 pll-supply = <&palmas_smps3_reg>; 38 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 39 nvidia,hpd-gpio = 46 avdd-dsi-csi-supply = <&avdd_1v2_reg>; [all …]
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| /linux/include/net/ |
| H A D | dsa.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * include/net/dsa.h - Driver for Distributed Switch Architecture switch chips 4 * Copyright (c) 2008-2009 Marvell Semiconductor 100 struct sk_buff *(*rcv)(struct sk_buff *skb, struct net_device *dev); 131 /* Notifier chain for switch-wide events */ 140 /* Maps offloaded LAG netdevs to a zero-base 96 struct sk_buff *(*rcv)(struct sk_buff *skb, struct net_device *dev); global() member 255 struct sk_buff *(*rcv)(struct sk_buff *skb, struct net_device *dev); global() member [all...] |
| H A D | ipv6.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 34 #define NEXTHDR_HOP 0 /* Hop-by-hop option header. */ 55 /* Limits on Hop-by-Hop and Destination options. 58 * Hop-b 292 int sel; global() member [all...] |
| /linux/net/tipc/ |
| H A D | node.c | 4 * Copyright (c) 2000-2006, 2012-2016, Ericsson AB 5 * Copyright (c) 2005-2006, 2010-2014, Wind River Systems 83 * struct tipc_node - TIPC node structure 103 * @peer_id: 128-bit ID of peer 195 static struct tipc_link *node_active_link(struct tipc_node *n, int sel) in node_active_link() argument 197 int bearer_id = n->active_links[sel & 1]; in node_active_link() 202 return n->links[bearer_id].link; in node_active_link() 205 int tipc_node_get_mtu(struct net *net, u32 addr, u32 sel, bool connected) in tipc_node_get_mtu() argument 218 if (n->peer_net && connected) { in tipc_node_get_mtu() 223 bearer_id = n->active_links[sel & 1]; in tipc_node_get_mtu() [all …]
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| /linux/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra132-norrin.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 30 vdd-supply = <&vdd_3v3_hdmi>; 31 pll-supply = <&vdd_hdmi_pll>; 32 hdmi-supply = <&vdd_5v0_hdmi>; 34 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 35 nvidia,hpd-gpio = 42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>; [all …]
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| /linux/drivers/infiniband/hw/hfi1/ |
| H A D | chip.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Copyright(c) 2015 - 2020 Intel Corporation. 32 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)"); 58 uint rcv_intr_dynamic = 1; /* enable dynamic mode for rcv int mitigation*/ 78 #define SEC_SC_HALTED 0x4 /* per-context only */ 79 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */ 87 * 0 - User Fecn Handling 88 * 1 - Vnic 89 * 2 - AIP 90 * 3 - Verbs [all …]
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