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Searched +full:rcar +full:- +full:gen2 +full:- +full:cmt1 (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/timer/
H A Drenesas,cmt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
26 - items:
27 - enum:
28 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
29 - renesas,r8a7740-cmt1 # 48-bit CMT1 on R-Mobile A1
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/linux/arch/arm/boot/dts/renesas/
H A Dr8a77470.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11 #include <dt-bindings/power/r8a77470-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-a7";
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/linux/drivers/clocksource/
H A Dsh_cmt.c1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH Timer Support - CMT
39 * 16B 32B 32B-F 48B R-Car Gen2
40 * -----------------------------------------------------------------------------
46 * The r8a73a4 / R-Car Gen2 version has a per-channel start/stop register
50 * Channels are indexed from 0 to N-1 in the documentation. The channel index
55 * CMT0 on r8a7740, which is a 32-bit variant with a single channel numbered 0
59 * Similarly CMT0 on r8a73a4, r8a7790 and r8a7791, while implementing 32-bit
60 * channels only, is a 48-bit gen2 CMT with the 48-bit channels unavailable.
239 #define CMCLKE 0x1000 /* CLK Enable Register (R-Car Gen2) */
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/linux/drivers/clk/renesas/
H A Dr8a7792-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
84 DEF_MOD("2d-dmac", 115, R8A7792_CLK_ZS),
93 DEF_MOD("sys-dmac1", 218, R8A7792_CLK_ZS),
94 DEF_MOD("sys-dmac0", 219, R8A7792_CLK_ZS),
97 DEF_MOD("cmt1", 329, R8A7792_CLK_R),
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H A Dr8a7794-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
93 DEF_MOD("2d-dmac", 115, R8A7794_CLK_ZS),
94 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS),
109 DEF_MOD("sys-dmac1", 218, R8A7794_CLK_ZS),
110 DEF_MOD("sys-dmac0", 219, R8A7794_CLK_ZS),
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H A Dr8a7791-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Glider bvba
7 * Based on clk-rcar-gen2.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen2-cpg.h"
96 DEF_MOD("2d-dmac", 115, R8A7791_CLK_ZS),
97 DEF_MOD("fdp1-1", 118, R8A7791_CLK_ZS),
98 DEF_MOD("fdp1-0", 119, R8A7791_CLK_ZS),
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H A Dr8a7790-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
101 DEF_MOD("2d-dmac", 115, R8A7790_CLK_ZS),
102 DEF_MOD("fdp1-2", 117, R8A7790_CLK_ZS),
103 DEF_MOD("fdp1-1", 118, R8A7790_CLK_ZS),
104 DEF_MOD("fdp1-0", 119, R8A7790_CLK_ZS),
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H A Dr8a77470-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
82 DEF_MOD("2d-dmac", 115, R8A77470_CLK_ZS),
83 DEF_MOD("fdp1-0", 119, R8A77470_CLK_ZS),
91 DEF_MOD("sys-dmac1", 218, R8A77470_CLK_ZS),
92 DEF_MOD("sys-dmac0", 219, R8A77470_CLK_ZS),
96 DEF_MOD("usbhs-dmac0-ch1", 326, R8A77470_CLK_HP),
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H A Dr8a7745-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
86 DEF_MOD("2d-dmac", 115, R8A7745_CLK_ZS),
87 DEF_MOD("fdp1-0", 119, R8A7745_CLK_ZS),
102 DEF_MOD("sys-dmac1", 218, R8A7745_CLK_ZS),
103 DEF_MOD("sys-dmac0", 219, R8A7745_CLK_ZS),
111 DEF_MOD("cmt1", 329, R8A7745_CLK_R),
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H A Dr8a7742-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
90 DEF_MOD("2d-dmac", 115, R8A7742_CLK_ZS),
91 DEF_MOD("fdp1-2", 117, R8A7742_CLK_ZS),
92 DEF_MOD("fdp1-1", 118, R8A7742_CLK_ZS),
93 DEF_MOD("fdp1-0", 119, R8A7742_CLK_ZS),
111 DEF_MOD("sys-dmac1", 218, R8A7742_CLK_ZS),
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H A Dr8a7743-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/soc/renesas/rcar-rst.h>
14 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
16 #include "renesas-cpg-mssr.h"
17 #include "rcar-gen2-cpg.h"
86 DEF_MOD("2d-dmac", 115, R8A7743_CLK_ZS),
87 DEF_MOD("fdp1-1", 118, R8A7743_CLK_ZS),
88 DEF_MOD("fdp1-0", 119, R8A7743_CLK_ZS),
104 DEF_MOD("sys-dmac1", 218, R8A7743_CLK_ZS),
105 DEF_MOD("sys-dmac0", 219, R8A7743_CLK_ZS),
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