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/linux/Documentation/arch/arm/pxa/
H A Dmfp.rst2 MFP Configuration for PXA2xx/PXA3xx Processors
7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
14 Unlike the GPIO alternate function settings on PXA25x and PXA27x, a new MFP
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
21 +--------+
22 | |--(GPIO19)--+
23 | GPIO | |
24 | |--(GPIO...) |
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/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa3xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /* The pxa3xx skeleton simply augments the 2xx version */
5 #define MFP_PIN_PXA300(gpio) \ argument
6 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
11 #define MFP_PIN_PXA300_2(gpio) \ argument
12 ((gpio <= 1) ? (0x674 + 4 * gpio) : \
13 (gpio <= 6) ? (0x2dc + 4 * gpio) : \
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H A Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "pxa3xx.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
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H A Dpxa300-raumfeld-connector.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
6 #include "pxa300-raumfeld-tuneable-clock.dtsi"
9 model = "Raumfeld Connector (PXA3xx)";
10 compatible = "raumfeld,raumfeld-connector-pxa303", "marvell,pxa300";
13 compatible = "simple-audio-card";
14 simple-audio-card,name = "Raumfeld Connector";
15 #address-cells = <1>;
16 #size-cells = <0>;
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H A Dpxa300-raumfeld-speaker-one.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
8 model = "Raumfeld Speaker One (PXA3xx)";
9 compatible = "raumfeld,raumfeld-speaker-one-pxa303", "marvell,pxa300";
13 #sound-dai-cells = <0>;
14 Vdd-supply = <&reg_3v3>;
15 Vdda-supply = <&reg_va_5v0>;
18 xo_11mhz: oscillator-11mhz {
19 compatible = "fixed-clock";
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H A Dpxa27x.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /* The pxa3xx skeleton simply augments the 2xx version */
4 #include "dt-bindings/clock/pxa-clock.h"
11 pdma: dma-controller@40000000 {
12 compatible = "marvell,pdma-1.0";
15 #dma-cells = <2>;
17 #dma-channels = <32>;
18 dma-channels = <32>;
19 #dma-requests = <75>;
20 dma-requests = <75>;
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H A Dpxa300-raumfeld-controller.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
8 model = "Raumfeld Controller (PXA3xx)";
9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300";
11 reg_vbatt: regulator-vbatt {
12 compatible = "regulator-fixed";
13 regulator-name = "vbatt-fixed-supply";
14 regulator-min-microvolt = <3700000>;
15 regulator-max-microvolt = <3700000>;
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/linux/drivers/clk/pxa/
H A Dclk-pxa3xx.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Heavily inspired from former arch/arm/mach-pxa/pxa3xx.c
9 * For non-devicetree platforms. Once pxa is fully converted to devicetree, this
14 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/pxa-clock.h>
22 #include "clk-pxa.h"
44 #define ACCR_HSS_MASK (0x3 << 14) /* System Bus-Clock Frequency Select */
46 #define ACCR_XN_MASK (0x7 << 8) /* Core PLL Turbo-Mode-to-Run-Mode Ratio */
47 #define ACCR_XL_MASK (0x1f) /* Core PLL Run-Mode-to-Oscillator Ratio */
91 #define CKEN_GPIO 39 /* < GPIO clock enable */
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/linux/Documentation/devicetree/bindings/gpio/
H A Dmrvl-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell PXA GPIO controller
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <bgolaszewski@baylibre.com>
12 - Rob Herring <robh@kernel.org>
15 - if:
20 - intel,pxa25x-gpio
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/linux/Documentation/devicetree/bindings/sound/
H A Dmarvell,pxa2xx-ac97.txt3 This descriptions matches the AC97 controller found in pxa2xx and pxa3xx series.
6 - compatible: should be one of the following:
7 "marvell,pxa250-ac97"
8 "marvell,pxa270-ac97"
9 "marvell,pxa300-ac97"
10 - reg: device MMIO address space
11 - interrupts: single interrupt generated by AC97 IP
12 - clocks: input clock of the AC97 IP, refer to clock-bindings.txt
15 - pinctrl-names, pinctrl-0: refer to pinctrl-bindings.txt
16 - reset-gpios: gpio used for AC97 reset, refer to gpio.txt
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/linux/arch/arm/mach-pxa/
H A Dpxa3xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/pxa3xx.c
5 * code specific to pxa3xx aka Monahans
9 * 2007-09-02: eric miao <eric.miao@marvell.com>
13 #include <linux/dma/pxa-dma.h>
17 #include <linux/gpio-pxa.h>
25 #include <linux/platform_data/i2c-pxa.h>
32 #include "pxa3xx-regs.h"
34 #include <linux/platform_data/usb-ohci-pxa27x.h>
36 #include "addr-map.h"
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H A Dirqs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-pxa/include/mach/irqs.h
20 #define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI,PXA27x) */
23 #define IRQ_ACIPC0 PXA_IRQ(5) /* AP-CP Communication (PXA930) */
26 #define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */
29 #define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */
33 #define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request (PXA3xx) */
42 #define IRQ_ACIPC2 PXA_IRQ(19) /* AP-CP Communication (PXA930) */
63 #define IRQ_GCU PXA_IRQ(39) /* Graphics Controller (PXA3xx) */
64 #define IRQ_ACIPC1 PXA_IRQ(40) /* AP-CP Communication (PXA930) */
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H A Dpxa3xx-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
5 * PXA3xx specific register definitions
13 #include "pxa-regs.h"
30 #define PWER __REG(0x40F50010) /* Power Manager Wake-up Enable Register */
31 #define PWSR __REG(0x40F50014) /* Power Manager Wake-up Status Register */
33 #define DCDCSR __REG(0x40F50080) /* DC-DC Controller Status Register */
42 #define AD3ER __REG(0x40f40008) /* Application Subsystem Wake-Up from D3 Enable */
43 #define AD3SR __REG(0x40f4000c) /* Application Subsystem Wake-Up from D3 Status */
44 #define AD2D0ER __REG(0x40f40010) /* Application Subsystem Wake-Up from D2 to D0 Enable */
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H A Dgeneric.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/generic.c
16 #include <linux/gpio.h>
25 #include <asm/mach-types.h>
27 #include "addr-map.h"
31 #include "pxa3xx-regs.h"
47 * For non device-tree builds, keep legacy timer init
97 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
H A Dpxa25x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/pxa25x.c
17 #include <linux/dma/pxa-dma.h>
18 #include <linux/gpio.h>
19 #include <linux/gpio-pxa.h>
38 #include "addr-map.h"
122 int gpio = pxa_irq_to_gpio(d->irq); in pxa25x_set_wake() local
125 if (gpio >= 0 && gpio < 85) in pxa25x_set_wake()
126 return gpio_set_wake(gpio, on); in pxa25x_set_wake()
128 if (d->irq == IRQ_RTCAlrm) { in pxa25x_set_wake()
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H A Dpxa27x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/pxa27x.c
12 #include <linux/dma/pxa-dma.h>
13 #include <linux/gpio.h>
14 #include <linux/gpio-pxa.h>
24 #include <linux/platform_data/i2c-pxa.h>
36 #include <linux/platform_data/usb-ohci-pxa27x.h>
37 #include <linux/platform_data/asoc-pxa.h>
39 #include "addr-map.h"
44 #include <linux/clk-provider.h>
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H A Dmfp-pxa2xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/mfp-pxa2xx.c
9 * on PXA3xx, what's more important, the low power pin state and
12 #include <linux/gpio.h>
13 #include <linux/gpio-pxa.h>
21 #include "pxa2xx-regs.h"
22 #include "mfp-pxa2xx.h"
23 #include "mfp-pxa27x.h"
32 #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
46 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
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H A Dmfp-pxa320.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-pxa/include/mach/mfp-pxa320.h
8 * 2007-08-21: eric miao <eric.miao@marvell.com>
15 #include "mfp-pxa3xx.h"
17 /* GPIO */
232 /* 1-Wire */
/linux/Documentation/devicetree/bindings/spi/
H A Dmarvell,mmp2-ssp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Lubomir Rintel <lkundrak@v3.sk>
16 - marvell,mmp2-ssp
17 - mrvl,ce4100-ssp
18 - mvrl,pxa168-ssp
19 - mrvl,pxa25x-ssp
20 - mvrl,pxa25x-nssp
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/linux/drivers/input/keyboard/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
24 board-specific setup logic must also provide a configuration data
38 be called adp5520-keys.
51 module will be called adp5588-keys.
61 module will be called adp5589-keys.
126 Say Y here if you have a PA-RISC machine and want to use an AT or
128 PA-RISC keyboards.
138 built-in keyboard (as opposed to an external keyboard).
152 in the left-hand column will be interpreted as the corresponding key
153 in the right-hand column.
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/linux/drivers/gpio/
H A Dgpio-pxa.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/plat-pxa/gpio.c
5 * Generic PXA GPIO handling
14 #include <linux/gpio/driver.h>
15 #include <linux/gpio-pxa.h>
33 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
34 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
35 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
37 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
38 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
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/linux/drivers/mtd/nand/raw/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
126 include NAND flash controllers with built-in hardware ECC
155 depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \
161 - PXA3xx processors (NFCv1)
162 - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2)
163 - 64-bit Aramda platforms (7k, 8k, ac5) (NFCv2)
229 Controller Module with built-in hardware ECC capabilities.
240 with built-in hardware ECC capabilities.
250 processor localbus with User-Programmable Machine support.
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/linux/sound/arm/
H A Dpxa2xx-ac97-lib.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on sound/arm/pxa2xx-ac97.c and sound/soc/pxa/pxa2xx-ac97.c
18 #include <linux/gpio.h>
22 #include <sound/pxa2xx-lib.h>
24 #include <linux/platform_data/asoc-pxa.h>
26 #include "pxa2xx-ac97-regs.h"
48 int val = -ENODEV; in pxa2xx_ac97_read()
52 return -ENODEV; in pxa2xx_ac97_read()
75 val = -ETIMEDOUT; in pxa2xx_ac97_read()
114 ret = -EIO; in pxa2xx_ac97_write()
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/linux/drivers/video/fbdev/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 a well-defined interface, so the software doesn't need to know
15 anything about the low-level (hardware register) stuff.
21 On several non-X86 architectures, the frame buffer device is the
29 and the Framebuffer-HOWTO at
30 <http://www.munted.org.uk/programming/Framebuffer-HOWTO-1.3.html> for more
40 are compiling a kernel for a non-x86 architecture.
46 device-aware may cause unexpected results. If unsure, say N.
57 Common utility functions useful to fbdev drivers of VGA-based
82 If you have a PCI-based system, this enables support for these
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/linux/drivers/pinctrl/
H A Dpinctrl-lantiq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinctrl-lantiq.c
4 * based on linux/drivers/pinctrl/pinctrl-pxa3xx.c
17 #include "pinctrl-lantiq.h"
22 return info->num_grps; in ltq_get_group_count()
29 if (selector >= info->num_grps) in ltq_get_group_name()
31 return info->grps[selector].name; in ltq_get_group_name()
40 if (selector >= info->num_grps) in ltq_get_group_pins()
41 return -EINVAL; in ltq_get_group_pins()
42 *pins = info->grps[selector].pins; in ltq_get_group_pins()
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