1f882846cSLubomir Rintel# SPDX-License-Identifier: GPL-2.0-only 2f882846cSLubomir Rintel%YAML 1.2 3f882846cSLubomir Rintel--- 4f882846cSLubomir Rintel$id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml# 5f882846cSLubomir Rintel$schema: http://devicetree.org/meta-schemas/core.yaml# 6f882846cSLubomir Rintel 7f882846cSLubomir Rinteltitle: Marvell PXA GPIO controller 8f882846cSLubomir Rintel 9f882846cSLubomir Rintelmaintainers: 10f882846cSLubomir Rintel - Linus Walleij <linus.walleij@linaro.org> 11f882846cSLubomir Rintel - Bartosz Golaszewski <bgolaszewski@baylibre.com> 12*442fd190SRob Herring - Rob Herring <robh@kernel.org> 13f882846cSLubomir Rintel 14f882846cSLubomir RintelallOf: 15f882846cSLubomir Rintel - if: 16f882846cSLubomir Rintel properties: 17f882846cSLubomir Rintel compatible: 18f882846cSLubomir Rintel contains: 19f882846cSLubomir Rintel enum: 20f882846cSLubomir Rintel - intel,pxa25x-gpio 21f882846cSLubomir Rintel - intel,pxa26x-gpio 22f882846cSLubomir Rintel - intel,pxa27x-gpio 23f882846cSLubomir Rintel - intel,pxa3xx-gpio 24f882846cSLubomir Rintel then: 25f882846cSLubomir Rintel properties: 26f882846cSLubomir Rintel interrupts: 27f882846cSLubomir Rintel minItems: 3 28f882846cSLubomir Rintel maxItems: 3 29f882846cSLubomir Rintel interrupt-names: 30f882846cSLubomir Rintel items: 31f882846cSLubomir Rintel - const: gpio0 32f882846cSLubomir Rintel - const: gpio1 33f882846cSLubomir Rintel - const: gpio_mux 34f882846cSLubomir Rintel - if: 35f882846cSLubomir Rintel properties: 36f882846cSLubomir Rintel compatible: 37f882846cSLubomir Rintel contains: 38f882846cSLubomir Rintel enum: 39f882846cSLubomir Rintel - marvell,mmp-gpio 40f882846cSLubomir Rintel - marvell,mmp2-gpio 41f882846cSLubomir Rintel then: 42f882846cSLubomir Rintel properties: 43f882846cSLubomir Rintel interrupts: 44f882846cSLubomir Rintel maxItems: 1 45f882846cSLubomir Rintel interrupt-names: 46f882846cSLubomir Rintel items: 47f882846cSLubomir Rintel - const: gpio_mux 48f882846cSLubomir Rintel 49f882846cSLubomir Rintelproperties: 50f882846cSLubomir Rintel $nodename: 51f882846cSLubomir Rintel pattern: '^gpio@[0-9a-f]+$' 52f882846cSLubomir Rintel 53f882846cSLubomir Rintel compatible: 54f882846cSLubomir Rintel enum: 55f882846cSLubomir Rintel - intel,pxa25x-gpio 56f882846cSLubomir Rintel - intel,pxa26x-gpio 57f882846cSLubomir Rintel - intel,pxa27x-gpio 58f882846cSLubomir Rintel - intel,pxa3xx-gpio 59f882846cSLubomir Rintel - marvell,mmp-gpio 60f882846cSLubomir Rintel - marvell,mmp2-gpio 61f882846cSLubomir Rintel - marvell,pxa93x-gpio 62f882846cSLubomir Rintel 63f882846cSLubomir Rintel reg: 64f882846cSLubomir Rintel maxItems: 1 65f882846cSLubomir Rintel 66f882846cSLubomir Rintel clocks: 67f882846cSLubomir Rintel maxItems: 1 68f882846cSLubomir Rintel 69f882846cSLubomir Rintel resets: 70f882846cSLubomir Rintel maxItems: 1 71f882846cSLubomir Rintel 72f882846cSLubomir Rintel ranges: true 73f882846cSLubomir Rintel 74f882846cSLubomir Rintel '#address-cells': 75f882846cSLubomir Rintel const: 1 76f882846cSLubomir Rintel 77f882846cSLubomir Rintel '#size-cells': 78f882846cSLubomir Rintel const: 1 79f882846cSLubomir Rintel 80f882846cSLubomir Rintel gpio-controller: true 81f882846cSLubomir Rintel 82f882846cSLubomir Rintel '#gpio-cells': 83f882846cSLubomir Rintel const: 2 84f882846cSLubomir Rintel 851adacc49SLubomir Rintel gpio-ranges: true 86f882846cSLubomir Rintel 87f882846cSLubomir Rintel interrupts: true 88f882846cSLubomir Rintel 89f882846cSLubomir Rintel interrupt-names: true 90f882846cSLubomir Rintel 91f882846cSLubomir Rintel interrupt-controller: true 92f882846cSLubomir Rintel 93f882846cSLubomir Rintel '#interrupt-cells': 94f882846cSLubomir Rintel const: 2 95f882846cSLubomir Rintel 96f882846cSLubomir RintelpatternProperties: 97f882846cSLubomir Rintel '^gpio@[0-9a-f]*$': 98f882846cSLubomir Rintel type: object 99f882846cSLubomir Rintel properties: 100f882846cSLubomir Rintel reg: 101f882846cSLubomir Rintel maxItems: 1 102f882846cSLubomir Rintel 103f882846cSLubomir Rintel required: 104f882846cSLubomir Rintel - reg 105f882846cSLubomir Rintel 106f882846cSLubomir Rintel additionalProperties: false 107f882846cSLubomir Rintel 108f882846cSLubomir Rintelrequired: 109f882846cSLubomir Rintel - compatible 110f882846cSLubomir Rintel - '#address-cells' 111f882846cSLubomir Rintel - '#size-cells' 112f882846cSLubomir Rintel - reg 113f882846cSLubomir Rintel - gpio-controller 114f882846cSLubomir Rintel - '#gpio-cells' 115f882846cSLubomir Rintel - interrupts 116f882846cSLubomir Rintel - interrupt-names 117f882846cSLubomir Rintel - interrupt-controller 118f882846cSLubomir Rintel - '#interrupt-cells' 119f882846cSLubomir Rintel 120f882846cSLubomir RinteladditionalProperties: false 121f882846cSLubomir Rintel 122f882846cSLubomir Rintelexamples: 123f882846cSLubomir Rintel - | 124f882846cSLubomir Rintel #include <dt-bindings/clock/pxa-clock.h> 125f882846cSLubomir Rintel gpio@40e00000 { 126f882846cSLubomir Rintel compatible = "intel,pxa3xx-gpio"; 127f882846cSLubomir Rintel #address-cells = <1>; 128f882846cSLubomir Rintel #size-cells = <1>; 129f882846cSLubomir Rintel reg = <0x40e00000 0x10000>; 130f882846cSLubomir Rintel gpio-controller; 131f882846cSLubomir Rintel #gpio-cells = <2>; 132f882846cSLubomir Rintel interrupts = <8>, <9>, <10>; 133f882846cSLubomir Rintel interrupt-names = "gpio0", "gpio1", "gpio_mux"; 134f882846cSLubomir Rintel clocks = <&clks CLK_GPIO>; 135f882846cSLubomir Rintel interrupt-controller; 136f882846cSLubomir Rintel #interrupt-cells = <2>; 137f882846cSLubomir Rintel }; 138f882846cSLubomir Rintel - | 139f882846cSLubomir Rintel #include <dt-bindings/clock/marvell,pxa910.h> 140f882846cSLubomir Rintel gpio@d4019000 { 141f882846cSLubomir Rintel compatible = "marvell,mmp-gpio"; 142f882846cSLubomir Rintel #address-cells = <1>; 143f882846cSLubomir Rintel #size-cells = <1>; 144f882846cSLubomir Rintel reg = <0xd4019000 0x1000>; 145f882846cSLubomir Rintel gpio-controller; 146f882846cSLubomir Rintel #gpio-cells = <2>; 147f882846cSLubomir Rintel interrupts = <49>; 148f882846cSLubomir Rintel interrupt-names = "gpio_mux"; 149f882846cSLubomir Rintel clocks = <&soc_clocks PXA910_CLK_GPIO>; 150f882846cSLubomir Rintel resets = <&soc_clocks PXA910_CLK_GPIO>; 151f882846cSLubomir Rintel interrupt-controller; 152f882846cSLubomir Rintel #interrupt-cells = <2>; 153f882846cSLubomir Rintel ranges; 154f882846cSLubomir Rintel 155f882846cSLubomir Rintel gpio@d4019000 { 156f882846cSLubomir Rintel reg = <0xd4019000 0x4>; 157f882846cSLubomir Rintel }; 158f882846cSLubomir Rintel 159f882846cSLubomir Rintel gpio@d4019004 { 160f882846cSLubomir Rintel reg = <0xd4019004 0x4>; 161f882846cSLubomir Rintel }; 162f882846cSLubomir Rintel 163f882846cSLubomir Rintel gpio@d4019008 { 164f882846cSLubomir Rintel reg = <0xd4019008 0x4>; 165f882846cSLubomir Rintel }; 166f882846cSLubomir Rintel 167f882846cSLubomir Rintel gpio@d4019100 { 168f882846cSLubomir Rintel reg = <0xd4019100 0x4>; 169f882846cSLubomir Rintel }; 170f882846cSLubomir Rintel }; 171f882846cSLubomir Rintel 172f882846cSLubomir Rintel... 173