| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | px30.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/px30-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gi 261 power: power-controller { global() label [all...] |
| H A D | px30-firefly-jd4-core-mb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/leds/common.h> 9 #include "px30-firefly-jd4-core.dtsi" 12 compatible = "firefly,px30-jd4-core-mb", "firefly,px30-jd4-core", 13 "rockchip,px30"; 14 model = "Firefly Core-PX30-JD4 on MB-JD4-PX30 baseboard"; 24 stdout-path = "serial2:115200n8"; 27 dc_12v: dc-12v-regulator { [all …]
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| H A D | px30-engicam-px30-core-ctouch2-of10.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "px30.dtsi" 10 #include "px30-engicam-ctouch2.dtsi" 11 #include "px30-engicam-px30-core.dtsi" 14 model = "Engicam PX30.Core C.TOUCH 2.0 10.1\" Open Frame"; 15 compatible = "engicam,px30-core-ctouch2-of10", "engicam,px30-core", 16 "rockchip,px30"; 19 compatible = "pwm-backlight"; 24 stdout-path = "serial2:115200n8"; [all …]
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| H A D | px30-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include "px30.dtsi" 13 model = "Rockchip PX30 EVB"; 14 compatible = "rockchip,px30 [all...] |
| H A D | px30-firefly-jd4-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include "px30.dtsi" 11 compatible = "firefly,px30-jd4-core", "rockchip,px30"; 13 emmc_pwrseq: emmc-pwrseq { 14 compatible = "mmc-pwrseq-emmc"; 15 pinctrl-0 = <&emmc_reset>; 16 pinctrl-names = "default"; 17 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; [all …]
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| H A D | px30-engicam-edimm2.2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "px30-engicam-common.dtsi" 11 compatible = "pwm-backlight"; 16 compatible = "yes-optoelectronics,ytc700tlag-05-201c"; 18 data-mapping = "vesa-24"; 19 power-supply = <&vcc3v3_lcd>; 23 remote-endpoint = <&lvds_out_panel>; 46 remote-endpoint = <&panel_in_lvds>;
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| H A D | px30-engicam-px30-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 13 compatible = "engicam,px30-core", "rockchip,px30"; 21 cpu-supply = <&vdd_arm>; 25 cpu-supply = <&vdd_arm>; 29 cpu-supply = <&vdd_arm>; 33 cpu-supply = <&vdd_arm>; 37 cap-mmc-highspeed; 38 mmc-hs200-1_8v; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/soc/rockchip/ |
| H A D | power_domain.txt | 1 * Rockchip Power Domains 3 Rockchip processors include support for multiple power domains which can be 4 powered up/down by software based on different application scenes to save power. 6 Required properties for power domain controller: 7 - compatible: Should be one of the following. 8 "rockchip,px30-power-controller" - for PX30 SoCs. 9 "rockchip,rk3036-power-controller" - for RK3036 SoCs. 10 "rockchip,rk3066-power-controller" - for RK3066 SoCs. 11 "rockchip,rk3128-power-controller" - for RK3128 SoCs. 12 "rockchip,rk3188-power-controller" - for RK3188 SoCs. [all …]
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| H A D | grf.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - items: 16 - enum: 17 - rockchip,rk3288-sgrf 18 - rockchip,rk3566-pipe-grf 19 - rockchip,rk3568-pcie3-phy-grf 20 - rockchip,rk3568-pipe-grf [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | rockchip-isp1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Helen Koike <helen.koike@collabora.com> 19 - fsl,imx8mp-isp 20 - rockchip,px30-cif-isp 21 - rockchip,rk3399-cif-isp 30 interrupt-names: 32 - const: isp [all …]
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| H A D | rockchip-vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ezequiel Garcia <ezequiel@collabora.com> 19 - enum: 20 - rockchip,rk3036-vpu 21 - rockchip,rk3066-vpu 22 - rockchip,rk3288-vpu 23 - rockchip,rk3328-vpu [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | rockchip,px30-dsi-dphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,px30-ds [all...] |
| H A D | rockchip-inno-csi-dphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip-inn [all...] |
| H A D | phy-rockchip-inno-usb2.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,px30-usb2phy 16 - rockchip,rk3128-usb2phy 17 - rockchip,rk3228-usb2phy 18 - rockchip,rk3308-usb2phy 19 - rockchip,rk3328-usb2phy [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/rockchip/ |
| H A D | rockchip-lvds.txt | 5 - compatible: matching the soc type, one of 6 - "rockchip,rk3288-lvds"; 7 - "rockchip,px30-lvds"; 9 - reg: physical base address of the controller and length 11 - clocks: must include clock specifiers corresponding to entries in the 12 clock-names property. 13 - clock-names: must contain "pclk_lvds" 15 - avdd1v0-supply: regulator phandle for 1.0V analog power 16 - avdd1v8-supply: regulator phandle for 1.8V analog power 17 - avdd3v3-supply: regulator phandle for 3.3V analog power [all …]
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| H A D | rockchip-vop.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Sandy Huang <hjc@rock-chip [all...] |
| H A D | rockchip,lvds.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip low-voltage differential signal (LVDS) transmitter 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 16 - rockchip,px30-lvds 17 - rockchip,rk3288-lvds 25 clock-names: 28 avdd1v0-supply: [all …]
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| H A D | rockchip,dw-mipi-dsi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 16 - enum: 17 - rockchip,px30-mipi-dsi 18 - rockchip,rk3128-mipi-dsi 19 - rockchip,rk3288-mipi-dsi [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/power/ |
| H A D | rockchip-io-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 29 should have power or not have power 42 to report their voltage. The IO Voltage Domain for any non-specified 48 - rockchip,px30-io-voltage-domain 49 - rockchip,px30-pmu-io-voltage-domain 50 - rockchip,rk3188-io-voltage-domain [all …]
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| H A D | rockchip-io-domain.txt | 2 ------------------------------------- 9 - If the regulator hooked up to a pin like SDMMC0_VDD is 3.3V then 18 - any logic for deciding what voltage we should set regulators to 19 - any logic for deciding whether regulators (or internal SoC blocks) 20 should have power or not have power 33 - compatible: should be one of: 34 - "rockchip,px30-io-voltage-domain" for px30 35 - "rockchip,px30-pmu-io-voltage-domain" for px30 pmu-domains 36 - "rockchip,rk3188-io-voltage-domain" for rk3188 37 - "rockchip,rk3228-io-voltage-domain" for rk3228 [all …]
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| H A D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Domains 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 Rockchip processors include support for multiple power domains 16 application scenarios to save power. 18 Power domains contained within power-controller node are [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | rockchip-sfc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/rockchip-sf [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/arm/rockchip/ |
| H A D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Management Unit (PMU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 The PMU is used to turn on and off different power domains of the SoCs. 15 This includes the power to the CPU cores. 22 - rockchip,px30-pmu 23 - rockchip,rk3066-pmu [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | rockchip,nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - $ref: nand-controller.yaml# 13 - Heiko Stuebner <heiko@sntech.de> 18 - const: rockchip,px30-nfc 19 - const: rockchip,rk2928-nfc 20 - const: rockchip,rv1108-nfc 21 - items: [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/gpu/ |
| H A D | arm,mali-bifrost.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 14 pattern: '^gpu@[a-f0-9]+$' 18 - items: 19 - enum: 20 - amlogic,meson-g12a-mali 21 - mediatek,mt8183-mali [all …]
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