Lines Matching +full:px30 +full:- +full:power

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15   - Sandy Huang <hjc@rock-chips.com>
16   - Heiko Stuebner <heiko@sntech.de>
21       - rockchip,px30-vop-big
22       - rockchip,px30-vop-lit
23       - rockchip,rk3036-vop
24       - rockchip,rk3066-vop
25       - rockchip,rk3126-vop
26       - rockchip,rk3188-vop
27       - rockchip,rk3228-vop
28       - rockchip,rk3288-vop
29       - rockchip,rk3328-vop
30       - rockchip,rk3366-vop
31       - rockchip,rk3368-vop
32       - rockchip,rk3399-vop-big
33       - rockchip,rk3399-vop-lit
34       - rockchip,rv1126-vop
39       - description:
42       - description:
54       - description: Clock for ddr buffer transfer.
55       - description: Pixel clock.
56       - description: Clock for the ahb bus to R/W the phy regs.
58   clock-names:
60       - const: aclk_vop
61       - const: dclk_vop
62       - const: hclk_vop
67   reset-names:
69       - const: axi
70       - const: ahb
71       - const: dclk
76   assigned-clocks:
79   assigned-clock-rates:
85   power-domains:
89   - compatible
90   - reg
91   - interrupts
92   - clocks
93   - clock-names
94   - resets
95   - reset-names
96   - port
101   - |
102     #include <dt-bindings/clock/rk3288-cru.h>
103     #include <dt-bindings/interrupt-controller/arm-gic.h>
104     #include <dt-bindings/power/rk3288-power.h>
106       compatible = "rockchip,rk3288-vop";
113       clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
114       power-domains = <&power RK3288_PD_VIO>;
118       reset-names = "axi", "ahb", "dclk";
121         #address-cells = <1>;
122         #size-cells = <0>;
125           remote-endpoint = <&edp_in_vopb>;
129           remote-endpoint = <&hdmi_in_vopb>;