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/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm.txt1 Specifying PWM information for devices
4 1) PWM user nodes
7 PWM users should specify a list of PWM devices that they want to use
8 with a property containing a 'pwm-list':
10 pwm-list ::= <single-pwm> [pwm-list]
11 single-pwm ::= <pwm-phandle> <pwm-specifier>
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
18 An optional property "pwm-names" may contain a list of strings to label
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H A Drenesas,pwm-rcar.yaml4 $id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
7 title: Renesas R-Car PWM Timer Controller
16 - renesas,pwm-r8a7742 # RZ/G1H
17 - renesas,pwm-r8a7743 # RZ/G1M
18 - renesas,pwm-r8a7744 # RZ/G1N
19 - renesas,pwm-r8a7745 # RZ/G1E
20 - renesas,pwm-r8a77470 # RZ/G1C
21 - renesas,pwm-r8a774a1 # RZ/G2M
22 - renesas,pwm-r8a774b1 # RZ/G2N
23 - renesas,pwm-r8a774c0 # RZ/G2E
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H A Dimx-pwm.yaml4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
7 title: Freescale i.MX PWM controller
13 - $ref: pwm.yaml#
16 "#pwm-cells":
19 PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags.
25 - fsl,imx1-pwm
26 - fsl,imx27-pwm
29 - fsl,imx25-pwm
30 - fsl,imx31-pwm
31 - fsl,imx50-pwm
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H A Dmediatek,mt2712-pwm.yaml4 $id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml#
7 title: MediaTek PWM Controller
13 - $ref: pwm.yaml#
19 - mediatek,mt2712-pwm
20 - mediatek,mt6795-pwm
21 - mediatek,mt6991-pwm
22 - mediatek,mt7622-pwm
23 - mediatek,mt7623-pwm
24 - mediatek,mt7628-pwm
25 - mediatek,mt7629-pwm
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H A Dmediatek,pwm-disp.yaml4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
13 - $ref: pwm.yaml#
19 - mediatek,mt2701-disp-pwm
20 - mediatek,mt6595-disp-pwm
21 - mediatek,mt8173-disp-pwm
22 - mediatek,mt8183-disp-pwm
25 - mediatek,mt6795-disp-pwm
26 - mediatek,mt8167-disp-pwm
27 - const: mediatek,mt8173-disp-pwm
30 - mediatek,mt6893-disp-pwm
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H A Datmel,at91sam-pwm.yaml5 $id: http://devicetree.org/schemas/pwm/atmel,at91sam-pwm.yaml#
8 title: Atmel/Microchip PWM controller
14 - $ref: pwm.yaml#
21 - atmel,at91sam9rl-pwm
22 - atmel,sama5d3-pwm
23 - atmel,sama5d2-pwm
24 - microchip,sam9x60-pwm
27 - microchip,sama7d65-pwm
28 - microchip,sama7g5-pwm
29 - const: atmel,sama5d2-pwm
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H A Dpwm-lp3943.txt1 TI/National Semiconductor LP3943 PWM controller
4 - compatible: "ti,lp3943-pwm"
5 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a
9 - ti,pwm0 or ti,pwm1: Output pin number(s) for PWM channel 0 or 1.
17 PWM 0 is for RGB LED brightness control
18 PWM 1 is for brightness control of LP8557 backlight device
26 * PWM 0 : output 8, 9 and 10
27 * PWM 1 : output 15
29 pwm3943: pwm {
30 compatible = "ti,lp3943-pwm";
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H A Dpwm.yaml4 $id: http://devicetree.org/schemas/pwm/pwm.yaml#
7 title: PWM controllers (providers)
16 pattern: "^pwm(@.*|-([0-9]|[1-9][0-9]+))?$"
18 "#pwm-cells":
20 Number of cells in a PWM specifier. Typically the cells represent, in
21 order: the chip-relative PWM number, the PWM period in nanoseconds and
22 optionally a number of flags (defined in <dt-bindings/pwm/pwm.h>).
25 - "#pwm-cells"
31 pwm: pwm@1c20e00 {
32 compatible = "allwinner,sun7i-a20-pwm";
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H A Dmxs-pwm.yaml4 $id: http://devicetree.org/schemas/pwm/mxs-pwm.yaml#
7 title: Freescale MXS PWM controller
13 - $ref: pwm.yaml#
18 - const: fsl,imx23-pwm
21 - fsl,imx28-pwm
22 - const: fsl,imx23-pwm
30 "#pwm-cells":
33 fsl,pwm-number:
35 description: u32 value representing the number of PWM devices
41 - fsl,pwm-number
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H A Dopencores,pwm.yaml4 $id: http://devicetree.org/schemas/pwm/opencores,pwm.yaml#
7 title: OpenCores PWM controller
13 The OpenCores PTC ip core contains a PWM controller. When operating in PWM
18 - $ref: pwm.yaml#
24 - starfive,jh7100-pwm
25 - starfive,jh7110-pwm
26 - starfive,jh8100-pwm
27 - const: opencores,pwm-v1
38 "#pwm-cells":
50 pwm@12490000 {
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H A Dcirrus,ep9301-pwm.yaml4 $id: http://devicetree.org/schemas/pwm/cirrus,ep9301-pwm.yaml#
7 title: Cirrus Logic ep93xx PWM controller
14 - $ref: pwm.yaml#
19 - const: cirrus,ep9301-pwm
22 - cirrus,ep9302-pwm
23 - cirrus,ep9307-pwm
24 - cirrus,ep9312-pwm
25 - cirrus,ep9315-pwm
26 - const: cirrus,ep9301-pwm
33 - description: SoC PWM clock
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H A Dloongson,ls7a-pwm.yaml4 $id: http://devicetree.org/schemas/pwm/loongson,ls7a-pwm.yaml#
7 title: Loongson PWM Controller
13 The Loongson PWM has one pulse width output signal and one pulse input
18 - $ref: pwm.yaml#
23 - const: loongson,ls7a-pwm
26 - loongson,ls2k0500-pwm
27 - loongson,ls2k1000-pwm
28 - loongson,ls2k2000-pwm
29 - const: loongson,ls7a-pwm
40 '#pwm-cells':
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H A Dimg-pwm.txt1 *Imagination Technologies PWM DAC driver
4 - compatible: Should be "img,pistachio-pwm"
5 - reg: Should contain physical base address and length of pwm registers.
9 - pwm: PWM operating clock.
10 - sys: PWM system interface clock.
11 - #pwm-cells: Should be 2. See pwm.yaml in this directory for the
14 syscon node which contains PWM control registers.
17 pwm: pwm@18101300 {
18 compatible = "img,pistachio-pwm";
21 clock-names = "pwm", "sys";
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/linux/Documentation/driver-api/
H A Dpwm.rst2 Pulse Width Modulation (PWM) interface
5 This provides an overview about the Linux PWM interface
9 the Linux PWM API (although they could). However, PWMs are often
12 this kind of flexibility the generic PWM API exists.
17 Users of the legacy PWM API use unique IDs to refer to PWM devices.
19 Instead of referring to a PWM device via its unique ID, board setup code
20 should instead register a static mapping that can be used to match PWM
24 PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL,
39 consumer name. pwm_put() is used to free the PWM device. Managed variants of
42 After being requested, a PWM has to be configured using::
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/linux/Documentation/ABI/testing/
H A Dsysfs-class-pwm1 What: /sys/class/pwm/
6 The pwm/ class sub-directory belongs to the Generic PWM
7 Framework and provides a sysfs interface for using PWM
10 What: /sys/class/pwm/pwmchip<N>/
15 A /sys/class/pwm/pwmchipN directory is created for each
16 probed PWM controller/chip where N is the base of the
17 PWM chip.
19 What: /sys/class/pwm/pwmchip<N>/npwm
24 The number of PWM channels supported by the PWM chip.
26 What: /sys/class/pwm/pwmchip<N>/export
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/linux/drivers/pwm/
H A Dpwm-vt8500.c3 * drivers/pwm/pwm-vt8500.c
15 #include <linux/pwm.h>
27 #define REG_CTRL(pwm) (((pwm) << 4) + 0x00) argument
28 #define REG_SCALAR(pwm) (((pwm) << 4) + 0x04) argument
29 #define REG_PERIOD(pwm) (((pwm) << 4) + 0x08) argument
30 #define REG_DUTY(pwm) (((pwm) << 4) + 0x0C) argument
71 static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, in vt8500_pwm_config() argument
107 writel(prescale, vt8500->base + REG_SCALAR(pwm->hwpwm)); in vt8500_pwm_config()
108 vt8500_pwm_busy_wait(chip, pwm->hwpwm, STATUS_SCALAR_UPDATE); in vt8500_pwm_config()
110 writel(pv, vt8500->base + REG_PERIOD(pwm->hwpwm)); in vt8500_pwm_config()
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H A Dpwm-sunplus.c3 * PWM device driver for SUNPLUS SP7021 SoC
9 * Reference Manual(PWM module):
10 * https://sunplus.atlassian.net/wiki/spaces/doc/pages/461144198/12.+Pulse+Width+Modulation+PWM
14 * - It output low when PWM channel disabled.
17 * - In .apply() PWM output need to write register FREQ and DUTY. When first write FREQ
28 #include <linux/pwm.h>
54 static int sunplus_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, in sunplus_pwm_apply() argument
61 if (state->polarity != pwm->state.polarity) in sunplus_pwm_apply()
65 /* disable pwm channel output */ in sunplus_pwm_apply()
67 mode0 &= ~SP7021_PWM_MODE0_PWMEN(pwm->hwpwm); in sunplus_pwm_apply()
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H A Dpwm-sprd.c12 #include <linux/pwm.h>
45 * The list of clocks required by PWM channels, and each channel has 2 clocks:
46 * enable clock and pwm clock.
70 static int sprd_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, in sprd_pwm_get_state() argument
74 struct sprd_pwm_chn *chn = &spc->chn[pwm->hwpwm]; in sprd_pwm_get_state()
80 * The clocks to PWM channel has to be enabled first before in sprd_pwm_get_state()
85 dev_err(pwmchip_parent(chip), "failed to enable pwm%u clocks\n", in sprd_pwm_get_state()
86 pwm->hwpwm); in sprd_pwm_get_state()
90 val = sprd_pwm_read(spc, pwm->hwpwm, SPRD_PWM_ENABLE); in sprd_pwm_get_state()
104 val = sprd_pwm_read(spc, pwm->hwpwm, SPRD_PWM_PRESCALE); in sprd_pwm_get_state()
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H A Dpwm-lpc18xx-sct.c18 * global to all the channels, thus PWM driver will refuse setting different
27 #include <linux/pwm.h>
124 struct pwm_device *pwm, in lpc18xx_pwm_set_conflict_res() argument
135 val &= ~LPC18XX_PWM_RES_MASK(pwm->hwpwm); in lpc18xx_pwm_set_conflict_res()
136 val |= LPC18XX_PWM_RES(pwm->hwpwm, action); in lpc18xx_pwm_set_conflict_res()
163 struct pwm_device *pwm, u64 duty_ns) in lpc18xx_pwm_config_duty() argument
166 struct lpc18xx_pwm_data *lpc18xx_data = &lpc18xx_pwm->channeldata[pwm->hwpwm]; in lpc18xx_pwm_config_duty()
184 static int lpc18xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, in lpc18xx_pwm_config() argument
200 * The PWM supports only a single period for all PWM channels. in lpc18xx_pwm_config()
206 dev_err(pwmchip_parent(chip), "conflicting period requested for PWM %u\n", in lpc18xx_pwm_config()
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H A Dpwm-dwc-core.c3 * DesignWare PWM Controller driver core
20 #include <linux/pwm.h>
22 #include "pwm-dwc.h"
24 static void __dwc_pwm_set_enable(struct dwc_pwm *dwc, int pwm, int enabled) in __dwc_pwm_set_enable() argument
28 reg = dwc_pwm_readl(dwc, DWC_TIM_CTRL(pwm)); in __dwc_pwm_set_enable()
35 dwc_pwm_writel(dwc, reg, DWC_TIM_CTRL(pwm)); in __dwc_pwm_set_enable()
39 struct pwm_device *pwm, in __dwc_pwm_configure_timer() argument
70 __dwc_pwm_set_enable(dwc, pwm->hwpwm, false); in __dwc_pwm_configure_timer()
78 dwc_pwm_writel(dwc, low, DWC_TIM_LD_CNT(pwm->hwpwm)); in __dwc_pwm_configure_timer()
79 dwc_pwm_writel(dwc, high, DWC_TIM_LD_CNT2(pwm->hwpwm)); in __dwc_pwm_configure_timer()
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/linux/Documentation/hwmon/
H A Dadt7470.rst25 There are four (4) PWM outputs that can be used to control fan speed.
27 A sophisticated control system for the PWM outputs is designed into the ADT7470
29 temperature sensors. Each PWM output is individually adjustable and
30 programmable. Once configured, the ADT7470 will adjust the PWM outputs in
32 feature can also be disabled for manual control of the PWM's.
40 automatic fan pwm control to set the fan speed. The driver will not read the
51 determining an optimal configuration for the automatic PWM control.
58 * PWM Control
60 * pwm#_auto_point1_pwm and pwm#_auto_point1_temp and
61 * pwm#_auto_point2_pwm and pwm#_auto_point2_temp -
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H A Ddme1737.rst47 and PWM output control functions. Using this parameter
66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
69 For the DME1737, A8000 and SCH5027, fan[1-2] and pwm[1-2] are always present.
70 Fan[3-6] and pwm[3,5-6] are optional features and their availability depends on
74 For the SCH311x and SCH5127, fan[1-3] and pwm[1-3] are always present and
75 fan[4-6] and pwm[5-6] don't exist.
170 PWM Output Control
173 This chip features 5 PWM outputs. PWM outputs 1-3 are associated with fan
174 inputs 1-3 and PWM outputs 5-6 are associated with fan inputs 5-6. PWM outputs
176 the appropriate enable attribute accordingly. PWM outputs 5-6 can only operate
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H A Dpwm-fan.rst1 Kernel driver pwm-fan
4 This driver enables the use of a PWM module to drive a fan. It uses the
5 generic PWM interface thus it is hardware independent. It can be used on
6 many SoCs, as long as the SoC supplies a PWM line driver that exposes
7 the generic PWM API.
15 a PWM output. It uses the generic PWM interface, thus it can be used with
27 0 -> disable pwm and regulator
28 1 -> enable pwm; if pwm==0, disable pwm, keep regulator enabled
29 2 -> enable pwm; if pwm==0, keep pwm and regulator enabled
30 3 -> enable pwm; if pwm==0, disable pwm and regulator
/linux/arch/loongarch/boot/dts/
H A Dloongson-2k0500.dtsi185 pwm@1ff5c000 {
186 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
191 #pwm-cells = <3>;
195 pwm@1ff5c010 {
196 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
201 #pwm-cells = <3>;
205 pwm@1ff5c020 {
206 compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
211 #pwm-cells = <3>;
215 pwm@1ff5c030 {
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/linux/drivers/input/keyboard/
H A Dlm8323.c46 #define LM8323_CMD_PWM_WRITE 0x95 /* Write PWM script. */
47 #define LM8323_CMD_START_PWM 0x96 /* Start PWM engine. */
48 #define LM8323_CMD_STOP_PWM 0x97 /* Stop PWM engine. */
88 /* Commands for PWM engine; feed in with PWM_WRITE. */
127 /* pwm lock */
148 struct lm8323_pwm pwm[LM8323_NUM_PWMS]; member
352 static void pwm_done(struct lm8323_pwm *pwm) in pwm_done() argument
354 guard(mutex)(&pwm->lock); in pwm_done()
356 pwm->running = false; in pwm_done()
357 if (pwm->desired_brightness != pwm->brightness) in pwm_done()
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