| /freebsd/share/man/man4/man4.arm/ |
| H A D | bcm283x_pwm.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause
4 .\" Copyright (c) 2017 Poul-Henning Kamp <phk@FreeBSD.org>
32 .Nd bcm283x_pwm - driver for Raspberry Pi 2/3 PWM
39 driver provides access to the PWM engine on GPIO12 of Raspberry Pi 2 and 3 hardware.
41 The PWM hardware is controlled via the
44 .Bd -literal
45 dev.pwm.0.mode: 1
46 dev.pwm.0.mode2: 1
47 dev.pwm.0.freq: 125000000
48 dev.pwm.0.ratio: 2500
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| /freebsd/sys/contrib/device-tree/Bindings/pwm/ |
| H A D | pwm-samsung.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5 $schema: http://devicetree.org/meta-schema
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| H A D | pwm-mediatek.txt | 1 MediaTek PWM controller
4 - compatible: should be "mediatek,<name>-pwm":
5 - "mediatek,mt2712-pwm": found on mt2712 SoC.
6 - "mediatek,mt6795-pwm": found on mt6795 SoC.
7 - "mediatek,mt7622-pwm": found on mt7622 SoC.
8 - "mediatek,mt7623-pwm": found on mt7623 SoC.
9 - "mediatek,mt7628-pwm": found on mt7628 SoC.
10 - "mediatek,mt7629-pwm": found on mt7629 SoC.
11 - "mediatek,mt8183-pwm": found on mt8183 SoC.
12 - "mediatek,mt8195-pwm", "mediatek,mt8183-pwm": found on mt8195 SoC.
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| H A D | renesas,pwm-rcar.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car PWM Timer Controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,pwm-r8a7742 # RZ/G1H
17 - renesas,pwm-r8a7743 # RZ/G1M
18 - renesas,pwm-r8a7744 # RZ/G1N
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| H A D | allwinner,sun4i-a10-pwm.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 PWM
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#pwm-cells":
19 - const: allwinner,sun4i-a10-pwm
20 - const: allwinner,sun5i-a10s-pwm
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| H A D | pwm.txt | 1 Specifying PWM information for devices
4 1) PWM user nodes
5 -----------------
7 PWM users should specify a list of PWM devices that they want to use
8 with a property containing a 'pwm-list':
10 pwm-list ::= <single-pwm> [pwm-list]
11 single-pwm ::= <pwm-phandle> <pwm-specifier>
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
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| H A D | nvidia,tegra20-pwm.txt | 4 - compatible: Must be:
5 - "nvidia,tegra20-pwm": for Tegra20
6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
11 - "nvidia,tegra186-pwm": for Tegra186
12 - "nvidia,tegra194-pwm": for Tegra194
13 - reg: physical base address and length of the controller's registers
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| H A D | pwm-lp3943.txt | 1 TI/National Semiconductor LP3943 PWM controller
4 - compatible: "ti,lp3943-pwm"
5 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a
9 - ti,pwm0 or ti,pwm1: Output pin number(s) for PWM channel 0 or 1.
10 0 = output 0
17 PWM 0 is for RGB LED brightness control
18 PWM 1 is for brightness control of LP8557 backlight device
23 reg = <0x60>;
26 * PWM 0 : output 8, 9 and 10
27 * PWM 1 : output 15
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| H A D | pwm-mtk-disp.txt | 1 MediaTek display PWM controller
4 - compatible: should be "mediatek,<name>-disp-pwm":
5 - "mediatek,mt2701-disp-pwm": found on mt2701 SoC.
6 - "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
7 - "mediatek,mt8167-disp-pwm", "mediatek,mt8173-disp-pwm": found on mt8167 SoC.
8 - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
9 - "mediatek,mt8183-disp-pwm": found on mt8183 SoC.$
10 - reg: physical base address and length of the controller's registers.
11 - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
13 - clocks: phandle and clock specifier of the PWM reference clock.
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| H A D | pwm-sifive.txt | 1 SiFive PWM controller
3 Unlike most other PWM controllers, the SiFive PWM controller currently only
4 supports one period for all channels in the PWM. All PWMs need to run at
7 PWM RTL that corresponds to the IP block version numbers can be found
10 https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
13 - compatible: Should be "sifive,<chip>-pwm" and "sifive,pwm<version>".
14 Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive
15 PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
16 SiFive PWM v0 IP block with no chip integration tweaks.
17 Please refer to sifive-blocks-ip-versioning.txt for details.
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| H A D | imx-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/im
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| H A D | nvidia,tegra20-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-pwm
18 - nvidia,tegra186-pwm
20 - items:
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| H A D | pwm-rockchip.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schema
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| H A D | google,cros-ec-pwm.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/google,cros-ec-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PWM controlled by ChromeOS EC
10 - Thierry Reding <thierry.reding@gmail.com>
11 - '"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>'
14 Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller
15 (EC) and controlled via a host-command interface.
16 An EC PWM node should be only found as a sub-node of the EC node (see
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| H A D | pxa-pwm.txt | 1 Marvell PWM controller
4 - compatible: should be one or more of:
5 - "marvell,pxa250-pwm"
6 - "marvell,pxa270-pwm"
7 - "marvell,pxa168-pwm"
8 - "marvell,pxa910-pwm"
9 - reg: Physical base address and length of the registers used by the PWM channel
10 Note that one device instance must be created for each PWM that is used, so the
11 length covers only the register window for one PWM output, not that of the
12 entire PWM controller. Currently length is 0x10 for all supported devices.
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| H A D | pwm-amlogic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-amlogic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic PWM
10 - Heiner Kallweit <hkallweit1@gmail.com>
13 - $ref: pwm.yaml#
18 - enum:
19 - amlogic,meson8b-pwm
20 - amlogic,meson-gxbb-pwm
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| H A D | pwm-meson.txt | 1 Amlogic Meson PWM Controller
5 - compatible: Shall contain "amlogic,meson8b-pwm"
6 or "amlogic,meson-gxbb-pwm"
7 or "amlogic,meson-gxbb-ao-pwm"
8 or "amlogic,meson-axg-ee-pwm"
9 or "amlogic,meson-axg-ao-pwm"
10 or "amlogic,meson-g12a-ee-pwm"
11 or "amlogic,meson-g12a-ao-pwm-ab"
12 or "amlogic,meson-g12a-ao-pwm-cd"
13 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
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| H A D | pwm-st.txt | 1 STMicroelectronics PWM driver bindings
2 --------------------------------------
5 - compatible : "st,pwm"
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
8 second cell is the period in nanoseconds - fixed to 2
10 - reg : Physical base address and length of the controller's
12 - pinctrl-names: Set to "default".
13 - pinctrl-0: List of phandles pointing to pin configuration nodes
14 for PWM module.
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| /freebsd/sys/contrib/device-tree/Bindings/leds/backlight/ |
| H A D | pwm-backlight.txt | 1 pwm-backlight bindings
4 - compatible: "pwm-backlight"
5 - pwms: OF device-tree PWM specification (see PWM binding[0])
6 - power-supply: regulator for supply voltage
9 - pwm-names: a list of names for the PWM devices specified in the
10 "pwms" property (see PWM binding[0])
11 - enable-gpios: contains a single GPIO specifier for the GPIO which enables
13 - post-pwm-on-delay-ms: Delay in ms between setting an initial (non-zero) PWM
15 - pwm-off-delay-ms: Delay in ms between disabling the backlight using GPIO
16 and setting PWM value to 0.
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| H A D | pwm-backlight.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/pwm-backlight.yaml#
5 $schema: http://devicetree.org/meta-schema
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | nvidia,tegra124-dfll.txt | 4 Documentation/devicetree/bindings/clock/clock-bindings.txt
7 the fast CPU cluster. It consists of a free-running voltage controlled
10 communicating with an off-chip PMIC either via an I2C bus or via PWM signals.
13 - compatible : should be one of:
14 - "nvidia,tegra124-dfll": for Tegra124
15 - "nvidia,tegra210-dfll": for Tegra210
16 - reg : Defines the following set of registers, in the order listed:
17 - registers for the DFLL control logic.
18 - registers for the I2C output logic.
19 - registers for the integrated I2C master controller.
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| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | pwm-vibrator.txt | 1 * PWM vibrator device tree bindings
3 Registers a PWM device as vibrator. It is expected, that the vibrator's
4 strength increases based on the duty cycle of the enable PWM channel
5 (100% duty cycle meaning strongest vibration, 0% meaning no vibration).
7 The binding supports an optional direction PWM channel, that can be
12 - compatible: should contain "pwm-vibrator"
13 - pwm-names: Should contain "enable" and optionally "direction"
14 - pwms: Should contain a PWM handle for each entry in pwm-names
17 - vcc-supply: Phandle for the regulator supplying power
18 - direction-duty-cycle-ns: Duty cycle of the direction PWM channel in
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| /freebsd/sys/contrib/device-tree/Bindings/hwmon/ |
| H A D | npcm750-pwm-fan.txt | 1 Nuvoton NPCM PWM and Fan Tacho controller device
3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
9 Required properties for pwm-fan node
10 - #address-cells : should be 1.
11 - #siz
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| H A D | aspeed-pwm-tacho.txt | 1 ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver
3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho
6 There can be upto 8 fans supported. Each fan can have one PWM output and
9 Required properties for pwm-tacho node:
10 - #address-cells : should be 1.
12 - #size-cell
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| /freebsd/sys/contrib/device-tree/Bindings/leds/ |
| H A D | leds-pwm.txt | 1 LED connected to PWM
4 - compatible : should be "pwm-leds".
6 Each LED is represented as a sub-node of the pwm-leds device. Each
9 LED sub-node properties:
10 - pwms : PWM property to point to the PWM device (phandle)/port (id) and to
12 - pwm-names : (optional) Name to be used by the PWM subsystem for the PWM device
13 For the pwms and pwm-names property please refer to:
14 Documentation/devicetree/bindings/pwm/pwm.txt
15 - max-brightness : Maximum brightness possible for the LED
16 - active-low : (optional) For PWMs where the LED is wired to supply
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