Lines Matching +full:pwm +full:- +full:0

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC PWM timers
10   - Thierry Reding <thierry.reding@gmail.com>
11   - Krzysztof Kozlowski <krzk@kernel.org>
14   Samsung SoCs contain PWM timer blocks which can be used for system clock source
15   and clock event timers, as well as to drive SoC outputs with PWM signal. Each
16   PWM timer block provides 5 PWM channels (not all of them can drive physical
17   outputs - see SoC and board manual).
24       - enum:
25           - samsung,s3c2410-pwm             # 16-bit, S3C24xx
26           - samsung,s3c6400-pwm             # 32-bit, S3C64xx
27           - samsung,s5p6440-pwm             # 32-bit, S5P64x0
28           - samsung,s5pc100-pwm             # 32-bit, S5PC100, S5PV210, Exynos4210 rev0 SoCs
29           - samsung,exynos4210-pwm          # 32-bit, Exynos
30       - items:
31           - enum:
32               - samsung,exynos5433-pwm
33               - samsung,exynos7-pwm
34               - samsung,exynosautov9-pwm
35               - samsung,exynosautov920-pwm
36               - tesla,fsd-pwm
37           - const: samsung,exynos4210-pwm
46   clock-names:
49       - "timers" - PWM base clock used to generate PWM signals,
51       - "pwm-tclk0" - first external PWM clock source,
52       - "pwm-tclk1" - second external PWM clock source.
57       - items:
58           - const: timers
59       - items:
60           - const: timers
61           - const: pwm-tclk0
62       - items:
63           - const: timers
64           - const: pwm-tclk1
65       - items:
66           - const: timers
67           - const: pwm-tclk0
68           - const: pwm-tclk1
72       One interrupt per timer, starting at timer 0. Necessary only for SoCs which
73       use PWM clocksource.
77   "#pwm-cells":
83   samsung,pwm-outputs:
85       A list of PWM channels used as PWM outputs on particular platform.
86       It is an array of up to 5 elements being indices of PWM channels
87       (from 0 to 4), the order does not matter.
88     $ref: /schemas/types.yaml#/definitions/uint32-array
91       minimum: 0
95   - clocks
96   - clock-names
97   - compatible
98   - reg
103   - $ref: pwm.yaml#
105   - if:
110               - samsung,s3c2410-pwm
111               - samsung,s3c6400-pwm
112               - samsung,s5p6440-pwm
113               - samsung,s5pc100-pwm
116         - interrupts
119   - |
120     pwm@7f006000 {
121         compatible = "samsung,s3c6400-pwm";
122         reg = <0x7f006000 0x1000>;
123         interrupt-parent = <&vic0>;
126         clock-names = "timers";
127         samsung,pwm-outputs = <0>, <1>;
128         #pwm-cells = <3>;