/linux/drivers/hwmon/ |
H A D | bt1-pvt.c | 34 #include "bt1-pvt.h" 51 * to PVT data and vice-versa are following: 128 * Baikal-T1 PVT mode can be updated only when the controller is disabled. 134 static inline void pvt_set_mode(struct pvt_hwmon *pvt, u32 mode) in pvt_set_mode() argument 140 old = pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0); in pvt_set_mode() 141 pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_MODE_MASK | PVT_CTRL_EN, in pvt_set_mode() 152 static inline void pvt_set_trim(struct pvt_hwmon *pvt, u32 trim) in pvt_set_trim() argument 158 old = pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_EN, 0); in pvt_set_trim() 159 pvt_update(pvt->regs + PVT_CTRL, PVT_CTRL_TRIM_MASK | PVT_CTRL_EN, in pvt_set_trim() 163 static inline void pvt_set_tout(struct pvt_hwmon *pvt, u32 tout) in pvt_set_tout() argument [all …]
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H A D | mr75203.c | 5 * This driver is a hardware monitoring driver for PVT controller 25 /* PVT Common register */ 188 struct pvt_device *pvt = file->private_data; in pvt_ts_coeff_j_read() local 192 len = scnprintf(buf, sizeof(buf), "%d\n", pvt->ts_coeff.j); in pvt_ts_coeff_j_read() 201 struct pvt_device *pvt = file->private_data; in pvt_ts_coeff_j_write() local 204 ret = kstrtos32_from_user(user_buf, count, 0, &pvt->ts_coeff.j); in pvt_ts_coeff_j_write() 221 struct pvt_device *pvt = (struct pvt_device *)data; in devm_pvt_ts_dbgfs_remove() local 223 debugfs_remove_recursive(pvt->dbgfs_dir); in devm_pvt_ts_dbgfs_remove() 224 pvt->dbgfs_dir = NULL; in devm_pvt_ts_dbgfs_remove() 227 static int pvt_ts_dbgfs_create(struct pvt_device *pvt, struct device *dev) in pvt_ts_dbgfs_create() argument [all …]
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H A D | bt1-pvt.h | 17 /* Baikal-T1 PVT registers and their bitfields */ 61 * PVT sensors-related limits and default values 68 * @PVT_DATA_MIN: Minimal PVT raw data value. 69 * @PVT_DATA_MAX: Maximal PVT raw data value. 78 * activated the PVT IRQ is enabled to be raised after each 105 * enum pvt_sensor_type - Baikal-T1 PVT sensor types (correspond to each PVT 108 * @PVT_TEMP: PVT Temperature sensor. 109 * @PVT_VOLT: PVT Voltage sensor. 110 * @PVT_LVT: PVT Low-Voltage threshold sensor. 111 * @PVT_HVT: PVT High-Voltage threshold sensor. [all …]
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/linux/drivers/edac/ |
H A D | amd64_edac.c | 17 static inline u32 get_umc_reg(struct amd64_pvt *pvt, u32 reg) in get_umc_reg() argument 19 if (!pvt->flags.zn_regs_v2) in get_umc_reg() 102 static void f15h_select_dct(struct amd64_pvt *pvt, u8 dct) in f15h_select_dct() argument 106 amd64_read_pci_cfg(pvt->F1, DCT_CFG_SEL, ®); in f15h_select_dct() 107 reg &= (pvt->model == 0x30) ? ~3 : ~1; in f15h_select_dct() 109 amd64_write_pci_cfg(pvt->F1, DCT_CFG_SEL, reg); in f15h_select_dct() 126 static inline int amd64_read_dct_pci_cfg(struct amd64_pvt *pvt, u8 dct, in amd64_read_dct_pci_cfg() argument 129 switch (pvt->fam) { in amd64_read_dct_pci_cfg() 142 if (dct_ganging_enabled(pvt)) in amd64_read_dct_pci_cfg() 154 dct = (dct && pvt->model == 0x30) ? 3 : dct; in amd64_read_dct_pci_cfg() [all …]
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H A D | dmc520_edac.c | 178 static u32 dmc520_read_reg(struct dmc520_edac *pvt, u32 offset) in dmc520_read_reg() argument 180 return readl(pvt->reg_base + offset); in dmc520_read_reg() 183 static void dmc520_write_reg(struct dmc520_edac *pvt, u32 val, u32 offset) in dmc520_write_reg() argument 185 writel(val, pvt->reg_base + offset); in dmc520_write_reg() 200 static u32 dmc520_get_dram_ecc_error_count(struct dmc520_edac *pvt, in dmc520_get_dram_ecc_error_count() argument 212 err_low = dmc520_read_reg(pvt, reg_offset_low); in dmc520_get_dram_ecc_error_count() 213 err_high = dmc520_read_reg(pvt, reg_offset_high); in dmc520_get_dram_ecc_error_count() 215 dmc520_write_reg(pvt, 0, reg_offset_low); in dmc520_get_dram_ecc_error_count() 216 dmc520_write_reg(pvt, 0, reg_offset_high); in dmc520_get_dram_ecc_error_count() 224 static void dmc520_get_dram_ecc_error_info(struct dmc520_edac *pvt, in dmc520_get_dram_ecc_error_info() argument [all …]
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H A D | sb_edac.c | 320 u64 (*get_tolm)(struct sbridge_pvt *pvt); 321 u64 (*get_tohm)(struct sbridge_pvt *pvt); 330 u8 (*get_node_id)(struct sbridge_pvt *pvt); 332 enum mem_type (*get_memory_type)(struct sbridge_pvt *pvt); 333 enum dev_type (*get_width)(struct sbridge_pvt *pvt, u32 mtr); 802 static u64 sbridge_get_tolm(struct sbridge_pvt *pvt) in sbridge_get_tolm() argument 807 pci_read_config_dword(pvt->pci_sad1, TOLM, ®); in sbridge_get_tolm() 811 static u64 sbridge_get_tohm(struct sbridge_pvt *pvt) in sbridge_get_tohm() argument 815 pci_read_config_dword(pvt->pci_sad1, TOHM, ®); in sbridge_get_tohm() 819 static u64 ibridge_get_tolm(struct sbridge_pvt *pvt) in ibridge_get_tolm() argument [all …]
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H A D | i7core_edac.c | 396 #define CH_ACTIVE(pvt, ch) ((pvt)->info.mc_control & (1 << (8 + ch))) argument 397 #define ECCx8(pvt) ((pvt)->info.mc_control & (1 << 1)) argument 400 #define ECC_ENABLED(pvt) ((pvt)->info.mc_status & (1 << 4)) argument 401 #define CH_DISABLED(pvt, ch) ((pvt)->info.mc_status & (1 << ch)) argument 489 struct i7core_pvt *pvt = mci->pvt_info; in get_dimm_config() local 497 pdev = pvt->pci_mcr[0]; in get_dimm_config() 502 pci_read_config_dword(pdev, MC_CONTROL, &pvt->info.mc_control); in get_dimm_config() 503 pci_read_config_dword(pdev, MC_STATUS, &pvt->info.mc_status); in get_dimm_config() 504 pci_read_config_dword(pdev, MC_MAX_DOD, &pvt->info.max_dod); in get_dimm_config() 505 pci_read_config_dword(pdev, MC_CHANNEL_MAPPER, &pvt->info.ch_map); in get_dimm_config() [all …]
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H A D | amd64_edac.h | 135 #define dram_rw(pvt, i) ((u8)(pvt->ranges[i].base.lo & 0x3)) argument 136 #define dram_intlv_sel(pvt, i) ((u8)((pvt->ranges[i].lim.lo >> 8) & 0x7)) argument 137 #define dram_dst_node(pvt, i) ((u8)(pvt->ranges[i].lim.lo & 0x7)) argument 140 #define dhar_mem_hoist_valid(pvt) ((pvt)->dhar & BIT(1)) argument 141 #define dhar_base(pvt) ((pvt)->dhar & 0xff000000) argument 142 #define k8_dhar_offset(pvt) (((pvt)->dhar & 0x0000ff00) << 16) argument 145 #define f10_dhar_offset(pvt) (((pvt)->dhar & 0x0000ff80) << 16) argument 166 #define csrow_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases[(i)] & DCSB_CS_ENABLE) argument 167 #define csrow_sec_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases_sec[(i)] & DCSB_CS_ENABLE) argument 189 #define dct_high_range_enabled(pvt) ((pvt)->dct_sel_lo & BIT(0)) argument [all …]
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H A D | i7300_edac.c | 353 struct i7300_pvt *pvt; in i7300_process_error_global() local 359 pvt = mci->pvt_info; in i7300_process_error_global() 362 pci_read_config_dword(pvt->pci_dev_16_2_fsb_err_regs, in i7300_process_error_global() 372 pci_write_config_dword(pvt->pci_dev_16_2_fsb_err_regs, in i7300_process_error_global() 378 pci_read_config_dword(pvt->pci_dev_16_2_fsb_err_regs, in i7300_process_error_global() 388 pci_write_config_dword(pvt->pci_dev_16_2_fsb_err_regs, in i7300_process_error_global() 408 struct i7300_pvt *pvt; in i7300_process_fbd_error() local 418 pvt = mci->pvt_info; in i7300_process_fbd_error() 421 pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, in i7300_process_fbd_error() 430 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, in i7300_process_fbd_error() [all …]
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H A D | i5400_edac.c | 439 struct i5400_pvt *pvt; in i5400_get_error_info() local 442 pvt = mci->pvt_info; in i5400_get_error_info() 445 pci_read_config_dword(pvt->branchmap_werrors, FERR_FAT_FBD, &value); in i5400_get_error_info() 458 pci_read_config_dword(pvt->branchmap_werrors, in i5400_get_error_info() 460 pci_read_config_word(pvt->branchmap_werrors, in i5400_get_error_info() 462 pci_read_config_dword(pvt->branchmap_werrors, in i5400_get_error_info() 466 pci_write_config_dword(pvt->branchmap_werrors, in i5400_get_error_info() 476 pci_read_config_dword(pvt->branchmap_werrors, FERR_NF_FBD, &value); in i5400_get_error_info() 484 pci_read_config_dword(pvt->branchmap_werrors, in i5400_get_error_info() 486 pci_read_config_word(pvt->branchmap_werrors, in i5400_get_error_info() [all …]
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H A D | i5000_edac.c | 388 struct i5000_pvt *pvt; in i5000_get_error_info() local 391 pvt = mci->pvt_info; in i5000_get_error_info() 394 pci_read_config_dword(pvt->branchmap_werrors, FERR_FAT_FBD, &value); in i5000_get_error_info() 406 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info() 408 pci_read_config_word(pvt->branchmap_werrors, in i5000_get_error_info() 410 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info() 414 pci_write_config_dword(pvt->branchmap_werrors, in i5000_get_error_info() 424 pci_read_config_dword(pvt->branchmap_werrors, FERR_NF_FBD, &value); in i5000_get_error_info() 432 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info() 434 pci_read_config_word(pvt->branchmap_werrors, in i5000_get_error_info() [all …]
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H A D | e752x_edac.c | 308 struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info; in ctl_page_to_phys() local 312 if (page < pvt->tolm) in ctl_page_to_phys() 315 if ((page >= 0x100000) && (page < pvt->remapbase)) in ctl_page_to_phys() 318 remap = (page - pvt->tolm) + pvt->remapbase; in ctl_page_to_phys() 320 if (remap < pvt->remaplimit) in ctl_page_to_phys() 324 return pvt->tolm - 1; in ctl_page_to_phys() 334 struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info; in do_process_ce() local 342 if (pvt->mc_symmetric) { in do_process_ce() 347 pvt->map[0], pvt->map[1], pvt->map[2], pvt->map[3], in do_process_ce() 348 pvt->map[4], pvt->map[5], pvt->map[6], in do_process_ce() [all …]
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H A D | e7xxx_edac.c | 186 struct e7xxx_pvt *pvt = (struct e7xxx_pvt *)mci->pvt_info; in ctl_page_to_phys() local 190 if ((page < pvt->tolm) || in ctl_page_to_phys() 191 ((page >= 0x100000) && (page < pvt->remapbase))) in ctl_page_to_phys() 194 remap = (page - pvt->tolm) + pvt->remapbase; in ctl_page_to_phys() 196 if (remap < pvt->remaplimit) in ctl_page_to_phys() 200 return pvt->tolm - 1; in ctl_page_to_phys() 259 struct e7xxx_pvt *pvt; in e7xxx_get_error_info() local 261 pvt = (struct e7xxx_pvt *)mci->pvt_info; in e7xxx_get_error_info() 262 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_FERR, &info->dram_ferr); in e7xxx_get_error_info() 263 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_NERR, &info->dram_nerr); in e7xxx_get_error_info() [all …]
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H A D | octeon_edac-lmc.c | 73 struct octeon_lmc_pvt *pvt = mci->pvt_info; in octeon_lmc_edac_poll_o2() local 78 if (!pvt->inject) in octeon_lmc_edac_poll_o2() 82 if (pvt->error_type == 1) in octeon_lmc_edac_poll_o2() 84 if (pvt->error_type == 2) in octeon_lmc_edac_poll_o2() 90 if (likely(!pvt->inject)) in octeon_lmc_edac_poll_o2() 93 fadr.cn61xx.fdimm = pvt->dimm; in octeon_lmc_edac_poll_o2() 94 fadr.cn61xx.fbunk = pvt->rank; in octeon_lmc_edac_poll_o2() 95 fadr.cn61xx.fbank = pvt->bank; in octeon_lmc_edac_poll_o2() 96 fadr.cn61xx.frow = pvt->row; in octeon_lmc_edac_poll_o2() 97 fadr.cn61xx.fcol = pvt->col; in octeon_lmc_edac_poll_o2() [all …]
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H A D | ghes_edac.c | 277 struct ghes_pvt *pvt; in ghes_edac_report_mem_error() local 291 pvt = ghes_pvt; in ghes_edac_report_mem_error() 292 if (!pvt) in ghes_edac_report_mem_error() 295 mci = pvt->mci; in ghes_edac_report_mem_error() 302 e->msg = pvt->msg; in ghes_edac_report_mem_error() 303 e->other_detail = pvt->other_detail; in ghes_edac_report_mem_error() 307 *pvt->other_detail = '\0'; in ghes_edac_report_mem_error() 308 *pvt->msg = '\0'; in ghes_edac_report_mem_error() 332 p = pvt->msg; in ghes_edac_report_mem_error() 333 p += snprintf(p, sizeof(pvt->msg), "%s", cper_mem_err_type_str(etype)); in ghes_edac_report_mem_error() [all …]
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H A D | i82875p_edac.c | 392 struct i82875p_pvt *pvt; in i82875p_probe1() local 412 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); in i82875p_probe1() 428 edac_dbg(3, "init pvt\n"); in i82875p_probe1() 429 pvt = (struct i82875p_pvt *)mci->pvt_info; in i82875p_probe1() 430 pvt->ovrfl_pdev = ovrfl_pdev; in i82875p_probe1() 431 pvt->ovrfl_window = ovrfl_window; in i82875p_probe1() 493 struct i82875p_pvt *pvt = NULL; in i82875p_remove_one() local 503 pvt = (struct i82875p_pvt *)mci->pvt_info; in i82875p_remove_one() 505 if (pvt->ovrfl_window) in i82875p_remove_one() 506 iounmap(pvt->ovrfl_window); in i82875p_remove_one() [all …]
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H A D | i82975x_edac.c | 3 * (C) 2007 aCarLab (India) Pvt. Ltd. (http://acarlab.com) 468 struct i82975x_pvt *pvt; in i82975x_probe1() local 546 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(*pvt)); in i82975x_probe1() 562 edac_dbg(3, "init pvt\n"); in i82975x_probe1() 563 pvt = (struct i82975x_pvt *) mci->pvt_info; in i82975x_probe1() 564 pvt->mch_window = mch_window; in i82975x_probe1() 610 struct i82975x_pvt *pvt; in i82975x_remove_one() local 618 pvt = mci->pvt_info; in i82975x_remove_one() 619 if (pvt->mch_window) in i82975x_remove_one() 620 iounmap( pvt->mch_window ); in i82975x_remove_one()
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/linux/Documentation/devicetree/bindings/hwmon/ |
H A D | baikal,bt1-pvt.yaml | 5 $id: http://devicetree.org/schemas/hwmon/baikal,bt1-pvt.yaml# 8 title: Baikal-T1 PVT Sensor 18 is based on the Analog Bits PVT sensor, but is equipped with a dedicated 25 Analog Bits core Bakal-T1 PVT control block 43 This bindings describes the external Baikal-T1 PVT control interfaces 50 const: baikal,bt1-pvt 60 - description: PVT reference clock 72 baikal,pvt-temp-offset-millicelsius: 93 pvt@1f200000 { 94 compatible = "baikal,bt1-pvt"; [all …]
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H A D | moortec,mr75203.yaml | 7 title: Moortec Semiconductor MR75203 PVT Controller 13 A Moortec PVT (Process, Voltage, Temperature) monitoring logic design can 44 - description: PVT common registers 45 - description: PVT temperature sensor registers 46 - description: PVT process detector registers 47 - description: PVT voltage monitor registers 58 PVT controller has 5 VM (voltage monitor) sensors. 149 pvt: pvt@e0680000 {
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H A D | microchip,lan966x.yaml | 22 - description: PVT registers 27 - const: pvt 50 reg-names = "pvt", "fan";
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/linux/drivers/s390/crypto/ |
H A D | zcrypt_cca_key.h | 170 struct cca_pvt_ext_crt_sec pvt; in zcrypt_type6_crt_key() member 202 key->pvt.section_identifier = CCA_PVT_EXT_CRT_SEC_ID_PVT; in zcrypt_type6_crt_key() 203 key->pvt.section_length = sizeof(key->pvt) + key_len; in zcrypt_type6_crt_key() 204 key->pvt.key_format = CCA_PVT_EXT_CRT_SEC_FMT_CL; in zcrypt_type6_crt_key() 205 key->pvt.key_use_flags[0] = CCA_PVT_USAGE_ALL; in zcrypt_type6_crt_key() 206 key->pvt.p_len = key->pvt.dp_len = key->pvt.u_len = long_len; in zcrypt_type6_crt_key() 207 key->pvt.q_len = key->pvt.dq_len = short_len; in zcrypt_type6_crt_key() 208 key->pvt.mod_len = crt->inputdatalength; in zcrypt_type6_crt_key() 209 key->pvt.pad_len = pad_len; in zcrypt_type6_crt_key()
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/linux/sound/pci/asihpi/ |
H A D | hpidspcd.c | 72 dsp_code->pvt = kmalloc(sizeof(*dsp_code->pvt), GFP_KERNEL); in hpi_dsp_code_open() 73 if (!dsp_code->pvt) { in hpi_dsp_code_open() 78 dsp_code->pvt->dev = dev; in hpi_dsp_code_open() 79 dsp_code->pvt->firmware = firmware; in hpi_dsp_code_open() 96 release_firmware(dsp_code->pvt->firmware); in hpi_dsp_code_close() 97 kfree(dsp_code->pvt); in hpi_dsp_code_close() 113 *pword = ((u32 *)(dsp_code->pvt->firmware->data))[dsp_code-> in hpi_dsp_code_read_word() 127 ((u32 *)(dsp_code->pvt->firmware->data)) + in hpi_dsp_code_read_block()
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/linux/Documentation/hwmon/ |
H A D | bt1-pvt.rst | 3 Kernel driver bt1-pvt 8 * Baikal-T1 PVT sensor (in SoC) 10 Prefix: 'bt1-pvt' 24 embedded into Baikal-T1 process, voltage and temperature sensors. PVT IP-core 28 for each sensor the PVT controller supports. The alarms functionality is made 38 design it's recommended to have them disabled to prevent the PVT IRQs being
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/linux/arch/s390/kernel/ |
H A D | cache.c | 151 unsigned int level, idx, pvt; in populate_cache_leaves() local 160 pvt = (ct.ci[level].scope == CACHE_SCOPE_PRIVATE) ? 1 : 0; in populate_cache_leaves() 163 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_DATA, level, cpu); in populate_cache_leaves() 164 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_INST, level, cpu); in populate_cache_leaves() 166 ci_leaf_init(this_leaf++, pvt, ctype, level, cpu); in populate_cache_leaves()
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/linux/Documentation/devicetree/bindings/thermal/ |
H A D | socionext,uniphier-thermal.yaml | 11 PVT(Process, Voltage and Temperature) monitoring unit implemented on 37 A pair of calibrated values referred from PVT, in case that the values
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