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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmicrochip,lan937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - UNGLinuxDriver@microchip.com
13 - $ref: dsa.yaml#/$defs/ethernet-ports
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
22 - microchip,lan9374
[all …]
H A Dvitesse,vsc73xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Vitesse DSA Switches were produced in the early-to-mid 2000s.
19 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
20 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
21 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
22 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
27 reside inside a SPI bus device tree node, see spi/spi-bus.txt
[all …]
/linux/drivers/usb/host/
H A Dehci-sched.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001-2004 by David Brownell
4 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
7 /* this file is part of ehci-hcd.c */
9 /*-------------------------------------------------------------------------*/
21 * pre-calculated schedule data to make appending to the queue be quick.
27 * periodic_next_shadow - return "next" pointer on shadow list
37 return &periodic->qh->qh_next; in periodic_next_shadow()
39 return &periodic->fstn->fstn_next; in periodic_next_shadow()
41 return &periodic->itd->itd_next; in periodic_next_shadow()
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
[all …]
H A Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
29 gpios-states = <0>;
[all …]
H A Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-dhcom-pdk2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK2 PCB number: 516-400 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
23 stdout-path = &uart1;
[all …]
H A Dfsl-lx2160a-bluebox3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2020-2021 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Sae <frank.sae@motor-comm.com>
13 - $ref: ethernet-phy.yaml#
18 - ethernet-phy-id4f51.e91a
19 - ethernet-phy-id4f51.e91b
21 rx-internal-delay-ps:
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
30 tx-internal-delay-ps:
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm47094-asus-rt-ac88u.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
8 #include "bcm47094-asus-rt-ac3100.dtsi"
11 compatible = "asus,rt-ac88u", "brcm,bcm47094", "brcm,bcm4708";
12 model = "ASUS RT-AC88U";
16 #nvmem-cell-cells = <1>;
22 mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
23 mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
24 reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
25 realtek,disable-leds;
[all …]
/linux/include/linux/phy/
H A Dphy-mipi-dphy.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
13 * MIPI D-PHY phy.
20 * Clock transitions and disable the Clock Lane HS-RX.
22 * Maximum value: 60000 ps
34 * Minimum value: 60000 ps + 52 * @hs_clk_rate period in ps
53 * Lane LP-00 Line state immediately before the HS-0 Line
56 * Minimum value: 38000 ps
57 * Maximum value: 95000 ps
68 * Minimum value: 95000 ps
[all …]
/linux/drivers/net/ethernet/amd/
H A Dau1000_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2001-2003, 2006 MontaVista Software Inc.
8 * Added ethtool/mii-tool support,
11 * or riemer@riemer-nt.de: fixed the link beat detection with
14 * converted to use linux-2.6.x's PHY framework
22 #include <linux/dma-mapping.h>
67 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
202 * make sure there's no out-of-order writes, and that all writes
207 * board-specific configurations
221 * needed in case of a dual-PHY accessible only through the MAC0's MII
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-jaguar-ethernet-switch.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * (manual: https://embedded.cherry.de/jaguar-ethernet-switch-user-manual/)
10 * two user controllable LEDs, and an M12 12-pin connector which exposes the
12 * - RS232/RS485 (max 250Kbps/500Kbps, RX pin1, TX pin2)
13 * - two digital inputs (pin4 routed to GPIO3_C5 on SoC, pin5 to GPIO4_B4)
14 * - two digital outputs (pin7 routed to GPIO3_D3 on SoC, pin8 to GPIO3_D1)
15 * - two analog inputs (pin10 to channel1 of ADS1015, pin11 to channel2)
17 * RK3588 Jaguar can be powered entirely through the adapter via the M8 3-pin
18 * connector (12-24V).
21 /dts-v1/;
[all …]
/linux/arch/microblaze/boot/dts/
H A Dsystem.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2007-2008 Xilinx, Inc.
6 * (C) Copyright 2007-2009 Michal Simek
13 * XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101
16 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
32 stdout-path = "/plb@0/serial@84000000";
35 #address-cells = <1>;
37 #size-cells = <0>;
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dport.c2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
43 int err = -ENOMEM; in mlx5_access_reg()
192 enum mlx5_port_status ps; in mlx5_toggle_port_link() local
194 mlx5_query_port_admin_status(dev, &ps); in mlx5_toggle_port_link()
196 if (ps == MLX5_PORT_UP) in mlx5_toggle_port_link()
315 return -EIO; in mlx5_query_module_id()
327 /* Addresses between 0-255 - page 00 */ in mlx5_qsfp_eeprom_page()
330 /* Addresses between 256 - 639 belongs to pages 01, 02 and 03 in mlx5_qsfp_eeprom_page()
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-sm1-h96-max.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
13 compatible = "haochuangyi,h96-max", "amlogic,sm1";
17 compatible = "amlogic,axg-sound-card";
18 model = "H96-MAX";
19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
29 assigned-clocks = <&clkc CLKID_MPLL2>,
[all …]
/linux/include/linux/platform_data/
H A Dpxa_sdhci.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * PXA Platform - SDHCI platform data definitions
17 /* card always wired to host, like on-chip emmc */
19 /* Board design supports 8-bit data on SD/SDIO BUS */
23 * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
26 * mmp2: each step is roughly 100ps, 5bits width
33 * @max_speed: the maximum speed supported
/linux/drivers/gpu/drm/radeon/
H A Dsi_dpm.c219 -1270850L,
492 -1270850L,
972 -1270850L,
1486 -1270850L,
1516 -1270850L,
1662 -1270850L,
1701 struct si_power_info *pi = rdev->pm.dpm.priv; in si_get_pi()
1717 t_slope = div64_s64(drm_int2fixp(coeff->t_slope), 100000000); in si_calculate_leakage_for_v_and_t_formula()
1718 t_intercept = div64_s64(drm_int2fixp(coeff->t_intercept), 100000000); in si_calculate_leakage_for_v_and_t_formula()
1719 av = div64_s64(drm_int2fixp(coeff->av), 100000000); in si_calculate_leakage_for_v_and_t_formula()
[all …]
/linux/drivers/video/fbdev/omap/
H A Dhwa742.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2004-2005 Nokia Corporation
139 hwa742.extif->set_bits_per_cycle(8); in hwa742_read_reg()
140 hwa742.extif->write_command(&reg, 1); in hwa742_read_reg()
141 hwa742.extif->read_data(&data, 1); in hwa742_read_reg()
148 hwa742.extif->set_bits_per_cycle(8); in hwa742_write_reg()
149 hwa742.extif->write_command(&reg, 1); in hwa742_write_reg()
150 hwa742.extif->write_data(&data, 1); in hwa742_write_reg()
158 x_end--; in set_window_regs()
159 y_end--; in set_window_regs()
[all …]
/linux/include/linux/
H A Dcdrom.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * -- <linux/cdrom.h>
4 * General header file for linux CD-ROM drivers
9 * 1998-2002 Jens Axboe, axboe@suse.de
45 void *handle; /* driver-dependent data */
48 int speed; /* maximum speed for reading data */ member
50 /* device-related storage */
57 /* per-device flags */
186 __u8 ps : 1; member
204 __u8 ps : 1;
[all …]
/linux/Documentation/admin-guide/blockdev/
H A Dfloppy.rst19 Example: If your kernel is called linux-2.6.9, type the following line
22 linux-2.6.9 floppy=thinkpad
25 of linux-2.6.9::
31 linux-2.6.9 floppy=daring floppy=two_fdc
67 certain controllers. This may speed up certain operations.
96 and is thus harder to find, whereas non-dma buffers may be
104 If you have a FIFO-able FDC, the floppy driver automatically
105 falls back on non DMA mode if no DMA-able memory can be found.
130 using 'floppycontrol --messages'. Then access a floppy
131 disk. If you get a huge amount of "Over/Underrun - retrying"
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_prototype.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
350 * i40e_virtchnl_link_speed - Convert AdminQ link_speed to virtchnl definition
351 * @link_speed: the speed to convert
355 * talking to virtchnl devices. If we can't represent the link speed properly,
423 #define i40e_aq_set_phy_register(hw, ps, da, pc, ra, rv, cd) \ argument
424 i40e_aq_set_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd)
425 #define i40e_aq_get_phy_register(hw, ps, da, pc, ra, rv, cd) \ argument
426 i40e_aq_get_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd)
470 return (hw->aq.api_maj_ver > maj || in i40e_is_aq_api_ver_ge()
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d3_ksz9477_evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 /dts-v1/;
9 model = "EVB-KSZ9477";
10 compatible = "microchip,sama5d3-ksz9477-evb", "atmel,sama5d36",
14 stdout-path = &dbgu;
17 reg_3v3: regulator-3v3 {
18 compatible = "regulator-fixed";
19 regulator-name = "3v3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
[all …]
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-meson8b.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/clk-provider.h>
60 /* An internal counter based on the "timing-adjustment" clock. The counter is
74 * Each step is 200ps. These bits are used with external RGMII PHYs
112 data = readl(dwmac->regs + reg); in meson8b_dwmac_mask_bits()
116 writel(data, dwmac->regs + reg); in meson8b_dwmac_mask_bits()
129 snprintf(clk_name, sizeof(clk_name), "%s#%s", dev_name(dwmac->dev), in meson8b_dwmac_register_clk()
138 hw->init = &init; in meson8b_dwmac_register_clk()
140 return devm_clk_register(dwmac->dev, hw); in meson8b_dwmac_register_clk()
146 struct device *dev = dwmac->dev; in meson8b_init_rgmii_tx_clk()
[all …]
/linux/drivers/input/mouse/
H A Dtrackpoint.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * IBM TrackPoint PS/2 mouse driver
66 #define TP_SPEED 0x60 /* Speed of TP Cursor */
67 #define TP_REACH 0x57 /* Backup for Z-axis press */
70 /* with Z-axis pressed) */
75 #define TP_THRESH 0x5C /* Minimum value for a Z-axis press */
76 #define TP_UP_THRESH 0x5A /* Used to generate a 'click' on Z-axis */
148 u8 sensitivity, speed, inertia, reach; member

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