Lines Matching +full:ps +full:- +full:speed
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
20 The SMI "Simple Management Interface" is a two-wire protocol using
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
23 SMI-based Realtek devices. The realtek-smi driver is a platform driver
26 The MDIO-connected switches use MDIO protocol to access their registers.
27 The realtek-mdio driver is an MDIO driver and it must be inserted inside
40 - realtek,rtl8365mb
41 - realtek,rtl8366rb
44 Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB,
45 RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S,
50 mdc-gpios:
54 mdio-gpios:
58 reset-gpios:
65 realtek,disable-leds:
72 interrupt-controller:
85 interrupt-controller: true
92 '#address-cells':
95 '#interrupt-cells':
99 - interrupt-controller
100 - '#address-cells'
101 - '#interrupt-cells'
109 const: realtek,smi-mdio
113 - reg
116 $ref: /schemas/spi/spi-peripheral-props.yaml#
119 - mdc-gpios
120 - mdio-gpios
121 - mdio
124 mdc-gpios: false
125 mdio-gpios: false
130 - mdc-gpios
131 - mdio-gpios
132 - mdio
135 - compatible
137 # - mdc-gpios
138 # - mdio-gpios
139 # - reset-gpios
140 # - mdio
145 - |
146 #include <dt-bindings/gpio/gpio.h>
147 #include <dt-bindings/interrupt-controller/irq.h>
153 mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
154 mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
155 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
157 switch_intc1: interrupt-controller {
159 interrupt-parent = <&gpio0>;
161 interrupt-controller;
162 #address-cells = <0>;
163 #interrupt-cells = <1>;
167 #address-cells = <1>;
168 #size-cells = <0>;
172 phy-handle = <&phy0>;
177 phy-handle = <&phy1>;
182 phy-handle = <&phy2>;
187 phy-handle = <&phy3>;
192 phy-handle = <&phy4>;
197 phy-mode = "rgmii";
198 fixed-link {
199 speed = <1000>;
200 full-duplex;
206 compatible = "realtek,smi-mdio";
207 #address-cells = <1>;
208 #size-cells = <0>;
210 phy0: ethernet-phy@0 {
212 interrupt-parent = <&switch_intc1>;
215 phy1: ethernet-phy@1 {
217 interrupt-parent = <&switch_intc1>;
220 phy2: ethernet-phy@2 {
222 interrupt-parent = <&switch_intc1>;
225 phy3: ethernet-phy@3 {
227 interrupt-parent = <&switch_intc1>;
230 phy4: ethernet-phy@4 {
232 interrupt-parent = <&switch_intc1>;
239 - |
240 #include <dt-bindings/gpio/gpio.h>
241 #include <dt-bindings/interrupt-controller/irq.h>
246 mdc-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
247 mdio-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
248 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
250 switch_intc2: interrupt-controller {
251 interrupt-parent = <&gpio5>;
253 interrupt-controller;
254 #address-cells = <0>;
255 #interrupt-cells = <1>;
259 #address-cells = <1>;
260 #size-cells = <0>;
264 phy-handle = <ðphy0>;
269 phy-handle = <ðphy1>;
274 phy-handle = <ðphy2>;
279 phy-handle = <ðphy3>;
284 phy-mode = "rgmii";
285 tx-internal-delay-ps = <2000>;
286 rx-internal-delay-ps = <2000>;
288 fixed-link {
289 speed = <1000>;
290 full-duplex;
297 compatible = "realtek,smi-mdio";
298 #address-cells = <1>;
299 #size-cells = <0>;
301 ethphy0: ethernet-phy@0 {
303 interrupt-parent = <&switch_intc2>;
306 ethphy1: ethernet-phy@1 {
308 interrupt-parent = <&switch_intc2>;
311 ethphy2: ethernet-phy@2 {
313 interrupt-parent = <&switch_intc2>;
316 ethphy3: ethernet-phy@3 {
318 interrupt-parent = <&switch_intc2>;
325 - |
326 #include <dt-bindings/gpio/gpio.h>
327 #include <dt-bindings/interrupt-controller/irq.h>
330 #address-cells = <1>;
331 #size-cells = <0>;
337 reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
339 switch_intc3: interrupt-controller {
340 interrupt-parent = <&gpio0>;
342 interrupt-controller;
343 #address-cells = <0>;
344 #interrupt-cells = <1>;
348 #address-cells = <1>;
349 #size-cells = <0>;
379 phy-mode = "rgmii";
380 tx-internal-delay-ps = <2000>;
381 rx-internal-delay-ps = <0>;
383 fixed-link {
384 speed = <1000>;
385 full-duplex;