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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
15 clocks, resets and power domains.
18 '#clock-cells':
21 '#reset-cells':
24 '#power-domain-cells':
30 protected-clocks:
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H A Dqcom,sar2130p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sar2130p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
13 Qualcomm global clock control module provides the clocks, resets and
16 See also: include/dt-bindings/clock/qcom,sar2130p-gcc.h
20 const: qcom,sar2130p-gcc
22 clocks:
24 - description: XO reference clock
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H A Dqcom,sa8775p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
13 Qualcomm global clock control module provides the clocks, resets and
16 See also:: include/dt-bindings/clock/qcom,sa8775p-gcc.h
20 const: qcom,sa8775p-gcc
22 clocks:
24 - description: XO reference clock
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H A Dqcom,gcc-sc8280xp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 Qualcomm global clock control module provides the clocks, resets and
16 See also:: include/dt-bindings/clock/qcom,gcc-sc8280xp.h
20 const: qcom,gcc-sc8280xp
22 clocks:
24 - description: XO reference clock
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/linux/drivers/clk/qcom/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
10 #include <linux/clk-provider.h>
11 #include <linux/interconnect-clk.h>
12 #include <linux/reset-controller.h>
16 #include "clk-rcg.h"
17 #include "clk-regmap.h"
33 if (!f->freq) in qcom_find_freq()
36 for (; f->freq; f++) in qcom_find_freq()
37 if (rate <= f->freq) in qcom_find_freq()
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
24 clocks:
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8953-xiaomi-daisy.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 /dts-v1/;
11 /delete-node/ &adsp_fw_mem;
12 /delete-node/ &qseecom_mem;
13 /delete-node/ &wcnss_fw_mem;
18 chassis-type = "handset";
19 qcom,msm-id = <293 0>;
20 qcom,board-id = <0x1000b 0x9>;
23 #address-cells = <2>;
24 #size-cells = <2>;
[all …]
H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
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H A Dqcs404-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
19 stdout-path = "serial0";
22 vph_pwr: vph-pwr-regulator {
23 compatible = "regulator-fixed";
24 regulator-name = "vph_pwr";
25 regulator-always-on;
26 regulator-boot-on;
[all …]
H A Dsdm845-samsung-starqltechn.dts1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 Samsung S9 (SM-G9600) (starqltechn / star2qltechn) common device tree source
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 chassis-type = "handset";
16 model = "Samsung Galaxy S9 SM-G9600";
20 #address-cells = <2>;
21 #size-cells = <2>;
24 compatible = "simple-framebuffer";
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H A Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <3700000>;
[all …]
H A Dsdm850-lenovo-yoga-c630.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
24 /delete-node/ &ipa_fw_mem;
25 /delete-node/ &ipa_gsi_mem;
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H A Dsdm845-xiaomi-beryllium-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
8 #include <dt-bindings/sound/qcom,q6afe.h>
9 #include <dt-bindings/sound/qcom,q6asm.h>
11 #include "sdm845-wcd9340.dtsi"
19 /delete-node/ &tz_mem;
20 /delete-node/ &adsp_mem;
[all …]
H A Dsdm845-lg-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 /delete-node/ &adsp_mem;
17 /delete-node/ &cdsp_mem;
18 /delete-node/ &gpu_mem;
19 /delete-node/ &ipa_fw_mem;
20 /delete-node/ &mba_region;
21 /delete-node/ &mpss_region;
[all …]
/linux/sound/pci/echoaudio/
H A Dechoaudio.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
34 +-----------+
35 record | |<-------------------- Inputs
36 <-------| | |
39 ------->| | +-------+
40 play | |--->|monitor|-------> Outputs
41 +-----------+ | mixer |
[all …]
/linux/Documentation/driver-api/
H A Dclk.rst22 clk which unifies the framework-level accounting and infrastructure that
28 The second half of the interface is comprised of the hardware-specific
30 hardware-specific structures needed to model a particular clock. For
32 clk_ops, such as .enable or .set_rate, implies the hardware-specific
35 hardware-specific bits for the hypothetical "foo" hardware.
62 api itself defines several driver-facing functions which operate on
66 clk_ops pointer in struct clk_core to perform the hardware-specific parts of
67 the operations defined in clk-provider.h::
107 which abstract the details of struct clk from the hardware-specific bits, and
109 drivers/clk/clk-gate.c::
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/linux/include/drm/
H A Ddrm_connector.h58 DRM_FORCE_ON_DIGITAL, /* for DVI-I use digital connector */
62 * enum drm_connector_status - status for a &drm_connector
77 * nothing there. It is driver-dependent whether a connector with this
84 * flicker (like load-detection when the connector is in use), or when a
85 * hardware resource isn't available (like when load-detection needs a
95 * enum drm_connector_registration_state - userspace registration status for
128 * - An unregistered connector may only have its DPMS changed from
129 * On->Off. Once DPMS is changed to Off, it may not be switched back
131 * - Modesets are not allowed on unregistered connectors, unless they
135 * - Removing a CRTC from an unregistered connector is OK, but new
[all …]
/linux/drivers/clk/
H A Dclk.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
116 if (!core->rpm_enabled) in clk_pm_runtime_get()
119 return pm_runtime_resume_and_get(core->dev); in clk_pm_runtime_get()
124 if (!core->rpm_enabled) in clk_pm_runtime_put()
127 pm_runtime_put_sync(core->dev); in clk_pm_runtime_put()
[all …]
H A Dclk-stm32h7.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/stm32h7-clks.h>
139 /* Micro-controller output clock parent */
178 bit_status = !(readl(gate->reg) & BIT(rgate->bit_rdy)); in ready_gate_clk_enable()
183 } while (bit_status && --timeout); in ready_gate_clk_enable()
201 bit_status = !!(readl(gate->reg) & BIT(rgate->bit_rdy)); in ready_gate_clk_disable()
206 } while (bit_status && --timeout); in ready_gate_clk_disable()
227 return ERR_PTR(-ENOMEM); in clk_register_ready_gate()
235 rgate->bit_rdy = bit_rdy; in clk_register_ready_gate()
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-b1x5pv2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 // Copyright 2018-2021 General Electric Company
7 // Copyright 2018-2021 Collabora
9 #include <dt-bindings/input/input.h>
10 #include "imx6dl-qmx6.dtsi"
14 stdout-path = &uart3;
20 operating-points = <
25 fsl,soc-operating-points = <
26 /* ARM kHz SOC-PU uV */
33 operating-points = <
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_dpll.c1 // SPDX-License-Identifier: MIT
197 * the range value for them is (actual_value - 2).
267 * These are based on the data rate limits (measured in fast clocks)
283 * These are based on the data rate limits (measured in fast clocks)
309 * Platform specific helpers to calculate the port PLL loopback- (clock.m),
310 * and post-divider (clock.p) values, pre- (clock.vco) and post-divided fast
314 * divided-down version of it.
319 clock->m = clock->m2 + 2; in pnv_calc_dpll_params()
320 clock->p = clock->p1 * clock->p2; in pnv_calc_dpll_params()
322 clock->vco = clock->n == 0 ? 0 : in pnv_calc_dpll_params()
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dradeon.h32 * - surface allocator & initializer : (bit like scratch reg) should
35 * - WB : write back stuff (do it bit like scratch reg things)
36 * - Vblank : look at Jesse's rework and what we should do
37 * - r600/r700: gart & cp
38 * - cs : clean cs ioctl use bitmap & things like that.
39 * - power management stuff
40 * - Barrier in gart code
41 * - Unmappabled vram ?
42 * - TESTING, TESTING, TESTING
70 #include <linux/dma-fence.h>
[all …]
/linux/include/linux/
H A Dti_wilink_st.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * and also serves the sub-modules of the shared transport driver.
8 * Copyright (C) 2009-2010 Texas Instruments
18 * enum proto-type - The protocol on WiLink chips which share a
29 * struct st_proto_s - Per Protocol structure from BT/FM/GPS to ST
94 * struct st_data_s - ST core internal structure
104 * This needs to be protected, hence the lock inside wakeup func.
152 * wrapper around tty->ops->write_room to check
157 * st_int_write -
158 * point this to tty->driver->write or tty->ops->write
[all …]
/linux/kernel/time/
H A Dposix-cpu-timers.c1 // SPDX-License-Identifier: GPL-2.0
3 * Implement CPU time clocks for the POSIX clock interface.
8 #include <linux/posix-timers.h>
20 #include "posix-timers.h"
28 pct->bases[CPUCLOCK_PROF].nextevt = cpu_limit * NSEC_PER_SEC; in posix_cputimers_group_init()
29 pct->timers_active = true; in posix_cputimers_group_init()
35 * tsk->signal->posix_cputimers.bases[clock].nextevt expiration cache if
39 * Returns 0 on success, -ESRCH on failure. Can fail if the task is exiting and
48 return -ESRCH; in update_rlimit_cpu()
102 ret = pid_for_clock(clock, false) ? 0 : -EINVAL; in validate_clock_permissions()
[all …]
/linux/include/ufs/
H A Dufshcd.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
16 #include <linux/blk-crypto-profile.h>
17 #include <linux/blk-mq.h>
19 #include <linux/fault-inject.h>
23 #include <linux/dma-direction.h>
68 * struct uic_command - UIC command structure
92 /* Host <-> Device UniPro Link state */
100 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
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