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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
15 clocks, resets and power domains.
18 '#clock-cells':
21 '#reset-cells':
24 '#power-domain-cells':
30 protected-clocks:
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H A Dqcom,sar2130p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sar2130p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
13 Qualcomm global clock control module provides the clocks, resets and
16 See also: include/dt-bindings/clock/qcom,sar2130p-gcc.h
20 const: qcom,sar2130p-gcc
22 clocks:
24 - description: XO reference clock
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/linux/drivers/clk/qcom/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
10 #include <linux/clk-provider.h>
11 #include <linux/interconnect-clk.h>
13 #include <linux/reset-controller.h>
17 #include "clk-alpha-pll.h"
18 #include "clk-branch.h"
19 #include "clk-rcg.h"
20 #include "clk-regmap.h"
37 if (!f->freq) in qcom_find_freq()
[all …]
/linux/sound/pci/echoaudio/
H A Dechoaudio.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
34 +-----------+
35 record | |<-------------------- Inputs
36 <-------| | |
39 ------->| | +-------+
40 play | |--->|monitor|-------> Outputs
41 +-----------+ | mixer |
[all …]
/linux/Documentation/driver-api/
H A Dclk.rst22 clk which unifies the framework-level accounting and infrastructure that
28 The second half of the interface is comprised of the hardware-specific
30 hardware-specific structures needed to model a particular clock. For
32 clk_ops, such as .enable or .set_rate, implies the hardware-specific
35 hardware-specific bits for the hypothetical "foo" hardware.
62 api itself defines several driver-facing functions which operate on
66 clk_ops pointer in struct clk_core to perform the hardware-specific parts of
67 the operations defined in clk-provider.h::
107 which abstract the details of struct clk from the hardware-specific bits, and
109 drivers/clk/clk-gate.c::
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/linux/arch/arm64/boot/dts/qcom/
H A Dqcs404-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
19 stdout-path = "serial0";
22 vph_pwr: vph-pwr-regulator {
23 compatible = "regulator-fixed";
24 regulator-name = "vph_pwr";
25 regulator-always-on;
26 regulator-boot-on;
[all …]
H A Dqcm6490-shift-otter.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
12 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
13 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &rmtfs_mem;
28 chassis-type = "handset";
36 #address-cells = <2>;
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H A Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <3700000>;
[all …]
H A Dsdm845-lg-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 /delete-node/ &adsp_mem;
17 /delete-node/ &cdsp_mem;
18 /delete-node/ &gpu_mem;
19 /delete-node/ &ipa_fw_mem;
20 /delete-node/ &mba_region;
21 /delete-node/ &mpss_region;
[all …]
H A Dsdm845-samsung-starqltechn.dts1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 Samsung S9 (SM-G9600) (starqltechn / star2qltechn) common device tree source
8 /dts-v1/;
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include <dt-bindings/sound/qcom,q6afe.h>
15 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include <dt-bindings/sound/qcom,wcd934x.h>
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H A Dx1-asus-zenbook-a14.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/gpio-keys.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include "hamoa-pmics.dtsi"
17 chassis-type = "laptop";
24 wcd938x: audio-codec {
[all …]
H A Dsdm845-xiaomi-beryllium-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/arm/qcom,ids.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/sound/qcom,q6afe.h>
10 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include "sdm845-wcd9340.dtsi"
20 /delete-node/ &tz_mem;
[all …]
H A Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/arm/qcom,ids.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
15 #include "sdm845-wcd9340.dtsi"
22 qcom,msm-id = <QCOM_ID_SDA845 0x20001>;
[all …]
H A Dsdm850-huawei-matebook-e-2019.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 #include <dt-bindings/sound/qcom,q6afe.h>
16 #include <dt-bindings/sound/qcom,q6asm.h>
17 #include <dt-bindings/sound/qcom,wcd934x.h>
[all …]
H A Dsdm850-lenovo-yoga-c630.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
24 /delete-node/ &ipa_fw_mem;
25 /delete-node/ &ipa_gsi_mem;
[all …]
H A Dsdm670-google-sargo.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree,
4 * xiaomi-lavender device tree, and oneplus-common device tree.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/power/qcom-rpmpd.h>
20 /delete-node/ &mpss_region;
[all …]
H A Dsdm850-samsung-w737.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include <dt-bindings/sound/qcom,q6afe.h>
15 #include <dt-bindings/sound/qcom,q6asm.h>
17 #include "sdm845-wcd9340.dtsi"
24 /delete-node/ &qseecom_mem;
[all …]
/linux/drivers/clk/
H A Dclk.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
9 #include <linux/clk/clk-conf.h>
12 #include <linux/clk-provider.h>
123 if (!core->rpm_enabled) in clk_pm_runtime_get()
126 return pm_runtime_resume_and_get(core->dev); in clk_pm_runtime_get()
131 if (!core->rpm_enabled) in clk_pm_runtime_put()
134 pm_runtime_put_sync(core->dev); in clk_pm_runtime_put()
[all …]
H A Dclk-stm32h7.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/stm32h7-clks.h>
139 /* Micro-controller output clock parent */
178 bit_status = !(readl(gate->reg) & BIT(rgate->bit_rdy)); in ready_gate_clk_enable()
183 } while (bit_status && --timeout); in ready_gate_clk_enable()
201 bit_status = !!(readl(gate->reg) & BIT(rgate->bit_rdy)); in ready_gate_clk_disable()
206 } while (bit_status && --timeout); in ready_gate_clk_disable()
227 return ERR_PTR(-ENOMEM); in clk_register_ready_gate()
235 rgate->bit_rdy = bit_rdy; in clk_register_ready_gate()
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-b1x5pv2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 // Copyright 2018-2021 General Electric Company
7 // Copyright 2018-2021 Collabora
9 #include <dt-bindings/input/input.h>
10 #include "imx6dl-qmx6.dtsi"
14 stdout-path = &uart3;
20 operating-points = <
25 fsl,soc-operating-points = <
26 /* ARM kHz SOC-PU uV */
33 operating-points = <
[all …]
/linux/drivers/gpu/drm/msm/adreno/
H A Da2xx_gpu.c1 // SPDX-License-Identifier: GPL-2.0
15 struct msm_ringbuffer *ring = submit->ring; in a2xx_submit()
18 for (i = 0; i < submit->nr_cmds; i++) { in a2xx_submit()
19 switch (submit->cmd[i].type) { in a2xx_submit()
21 /* ignore IB-targets */ in a2xx_submit()
25 if (ring->cur_ctx_seqno == submit->queue->ctx->seqno) in a2xx_submit()
30 OUT_RING(ring, lower_32_bits(submit->cmd[i].iova)); in a2xx_submit()
31 OUT_RING(ring, submit->cmd[i].size); in a2xx_submit()
38 OUT_RING(ring, submit->seqno); in a2xx_submit()
47 OUT_RING(ring, submit->seqno); in a2xx_submit()
[all …]
/linux/include/linux/
H A Dti_wilink_st.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * and also serves the sub-modules of the shared transport driver.
8 * Copyright (C) 2009-2010 Texas Instruments
18 * enum proto-type - The protocol on WiLink chips which share a
29 * struct st_proto_s - Per Protocol structure from BT/FM/GPS to ST
94 * struct st_data_s - ST core internal structure
104 * This needs to be protected, hence the lock inside wakeup func.
152 * wrapper around tty->ops->write_room to check
157 * st_int_write -
158 * point this to tty->driver->write or tty->ops->write
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/linux/kernel/time/
H A Dtimekeeping.c1 // SPDX-License-Identifier: GPL-2.0
31 #include "tick-internal.h"
67 return ktime_get_aux_ts64(CLOCK_AUX + tkid - TIMEKEEPER_AUX_FIRST, ts); in tk_get_aux_ts64()
72 return tk->id >= TIMEKEEPER_AUX_FIRST && tk->id <= TIMEKEEPER_AUX_LAST; in tk_is_aux()
88 tk->offs_aux = offs; in tk_update_aux_offs()
89 tk->monotonic_to_aux = ktime_to_timespec64(offs); in tk_update_aux_offs()
96 * struct tk_fast - NMI safe timekeeper
109 /* Suspend-time cycles value for halted fast timekeeper. */
174 * Multigrain timestamps require tracking the latest fine-grained timestamp
175 * that has been issued, and never returning a coarse-grained timestamp that is
[all …]
H A Dposix-timers.c1 // SPDX-License-Identifier: GPL-2.0+
3 * 2002-10-15 Posix Clocks & timers
7 * 2004-06-01 Fix CLOCK_REALTIME clock/timer TIMER_ABSTIME bug.
10 * These are all the functions necessary to implement POSIX clocks & timers
20 #include <linux/posix-clock.h>
21 #include <linux/posix-timers.h>
31 #include "posix-timers.h"
73 __cond_lock(&__timr->it_lock, __timr = __lock_timer(tid)); \
80 spin_unlock_irq(&timr->it_lock); in unlock_timer()
84 scoped_cond_guard(lock_timer, return -EINVAL, _id)
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/linux/drivers/clk/bcm/
H A Dclk-kona.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include "clk-kona.h"
12 #include <linux/clk-provider.h>
16 * "Policies" affect the frequencies of bus clocks provided by a
28 /* Produces a mask of set bits covering a range of a 32-bit value */
31 return ((1 << width) - 1) << shift; in bitfield_mask()
53 return (u64)reg_div + ((u64)1 << div->u.s.frac_width); in scaled_div_value()
61 return (u64)div->u.fixed; in scaled_div_min()
72 return (u64)div->u.fixed; in scaled_div_max()
74 reg_div = ((u32)1 << div->u.s.width) - 1; in scaled_div_max()
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