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/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A D	cache.json	5 …"BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another c… 6 …"PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another … 11 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi… 12 …"PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another ch… 17 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different… 18 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a differen… 23 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a demand … 24 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either o… 35 …"BriefDescription": "The processor's data cache was reloaded from a localtion other than the local… 36 …"PublicDescription": "The processor's data cache was reloaded from a localtion other than the loca… [all …]
H A D	frontend.json	89 …"BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from an… 90 …"PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from a… 95 …"BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from anot… 96 …"PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from ano… 101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di… 102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d… 107 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on … 108 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on… 113 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 due to an… 114 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 due to e… [all …]
H A D	other.json	383 …"BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another c… 384 …"PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another … 389 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi… 390 …"PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another ch… 395 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different… 396 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a differen… 401 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam… 402 …"PublicDescription": "The processor's data cache was reloaded from another chip's memory on the sa… 407 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 due to either de… 408 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either o… [all …]
/freebsd/contrib/llvm-project/clang/lib/Basic/
H A D	TargetID.cpp	39 llvm::StringRef Processor) { in getAllPossibleTargetIDFeatures() argument 42 return getAllPossibleAMDGPUTargetIDFeatures(T, Processor); in getAllPossibleTargetIDFeatures() 46 /// Returns canonical processor name or empty string if \p Processor is invalid. 48 llvm::StringRef Processor) { in getCanonicalProcessorName() argument 50 return llvm::AMDGPU::getCanonicalArchName(T, Processor); in getCanonicalProcessorName() 51 return Processor; in getCanonicalProcessorName() 60 // Parse a target ID with format checking only. Do not check whether processor 61 // name or features are valid for the processor. 63 // A target ID is a processor name followed by a list of target features 69 llvm::StringRef Processor; in parseTargetIDWithFormatCheckingOnly() local [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/ivybridge/
H A D	uncore-cache.json	163 … "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.", 168 … "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.", 173 "BriefDescription": "An external snoop hits a modified line in some processor core.", 178 "PublicDescription": "An external snoop hits a modified line in some processor core.", 183 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 188 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 193 …cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.", 198 …cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.", 203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.", [all …]
H A D	uncore.json	7 "BriefDescription": "A snoop misses in some processor core.", 8 "PublicDescription": "A snoop misses in some processor core.", 19 "BriefDescription": "A snoop invalidates a non-modified line in some processor core.", 20 "PublicDescription": "A snoop invalidates a non-modified line in some processor core.", 31 "BriefDescription": "A snoop hits a non-modified line in some processor core.", 32 "PublicDescription": "A snoop hits a non-modified line in some processor core.", 43 "BriefDescription": "A snoop hits a modified line in some processor core.", 44 "PublicDescription": "A snoop hits a modified line in some processor core.", 55 "BriefDescription": "A snoop invalidates a modified line in some processor core.", 56 "PublicDescription": "A snoop invalidates a modified line in some processor core.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/sandybridge/
H A D	uncore-cache.json	163 … "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.", 168 … "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.", 173 "BriefDescription": "An external snoop hits a modified line in some processor core.", 178 "PublicDescription": "An external snoop hits a modified line in some processor core.", 183 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 188 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 193 …cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.", 198 …cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.", 203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.", [all …]
H A D	uncore.json	7 "BriefDescription": "A snoop misses in some processor core.", 8 "PublicDescription": "A snoop misses in some processor core.", 19 "BriefDescription": "A snoop invalidates a non-modified line in some processor core.", 20 "PublicDescription": "A snoop invalidates a non-modified line in some processor core.", 31 "BriefDescription": "A snoop hits a non-modified line in some processor core.", 32 "PublicDescription": "A snoop hits a non-modified line in some processor core.", 43 "BriefDescription": "A snoop hits a modified line in some processor core.", 44 "PublicDescription": "A snoop hits a modified line in some processor core.", 55 "BriefDescription": "A snoop invalidates a modified line in some processor core.", 56 "PublicDescription": "A snoop invalidates a modified line in some processor core.", [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/haswell/
H A D	uncore-cache.json	163 … "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.", 168 … "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.", 173 "BriefDescription": "An external snoop hits a modified line in some processor core.", 178 "PublicDescription": "An external snoop hits a modified line in some processor core.", 183 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 188 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 193 …cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.", 198 …cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.", 203 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 208 "PublicDescription": "An external snoop hits a non-modified line in some processor core.", [all …]
H A D	uncore.json	7 "BriefDescription": "An external snoop misses in some processor core.", 8 "PublicDescription": "An external snoop misses in some processor core.", 19 …ross-core snoop initiated by this Cbox due to processor core memory request which misses in some p… 20 …ross-core snoop initiated by this Cbox due to processor core memory request which misses in some p… 31 …fDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.", 32 …cDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.", 43 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 44 "PublicDescription": "An external snoop hits a non-modified line in some processor core.", 55 … snoop initiated by this Cbox due to processor core memory request which hits a non-modified line … 56 … snoop initiated by this Cbox due to processor core memory request which hits a non-modified line … [all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/
H A D	qcom,smsm.txt	4 information between the processors in a Qualcomm SoC. Each processor is 5 assigned 32 bits of state that can be modified. A processor can through a 7 certain bit owned by a certain remote processor. 19 signaling the N:th remote processor 27 Definition: identifier of the local processor in the list of hosts, or 29 matrix representing the local processor 43 Each processor's state bits are described by a subnode of the smsm device node. 45 processor's state bits or the local processors bits. The node names are not 63 to belong to a remote processor 73 Definition: one entry specifying remote IRQ used by the remote processor [all …]
H A D	qcom,smsm.yaml	16 information between the processors in a Qualcomm SoC. Each processor is 17 assigned 32 bits of state that can be modified. A processor can through a 19 certain bit owned by a certain remote processor. 32 Identifier of the local processor in the list of hosts, or in other words 34 processor. 41 this client. Each entry represents the N:th remote processor by index 57 remote processor. 63 Each processor's state bits are described by a subnode of the SMSM device 65 remote processor's state bits or the local processors bits. The node 75 belong to a remote processor. [all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A D	ResourceManager.h	10 /// The classes here represent processor resource units and their management 27 /// Used to notify the internal state of a processor resource. 29 /// A processor resource is available if it is not reserved, and there are 30 /// available slots in the buffer. A processor resource is unavailable if it 31 /// is either reserved, or the associated buffer is full. A processor resource 55 /// Selects a processor resource unit from a ReadyMask. 58 /// Called by the ResourceManager when a processor resource group, or a 59 /// processor resource with multiple units has become unavailable. 65 /// Default resource allocation strategy used by processor resource groups and 66 /// processor resource [all...]
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A D	ti,omap-remoteproc.yaml	13 The OMAP family of SoCs usually have one or more slave processor sub-systems 14 that are used to offload some of the processor-intensive tasks, or to manage 17 The processor cores in the sub-system are usually behind an IOMMU, and may 21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor 22 sub-system. The DSP processor sub-system can contain any of the TI's C64x, 23 C66x or C67x family of DSP cores as the main execution unit. The IPU processor 27 Each remote processor sub-system is represented as a single DT node. Each node 29 the host processor (MPU) to perform the device management of the remote 30 processor an [all...]
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A D	fsl,mu-msi.yaml	`16 for one processor (A side) to signal the other processor (B side) using 23 registers (Processor A-side, Processor B-side). 45 - const: processor-a-side 46 - const: processor-b-side 62 - const: processor-a-side 63 - const: processor-b-side 94 reg-names = "processor-a-side", "processor-b-side"; 98 power-domain-names = "processor-a-side", "processor-b-side";`
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A D	R600Processors.td	`1 //===-- R600Processors.td - R600 Processor definitions --------------------===// 70 def : Processor<"r600", R600_VLIW5_Itin, 74 def : Processor<"r630", R600_VLIW5_Itin, 78 def : Processor<"rs880", R600_VLIW5_Itin, 82 def : Processor<"rv670", R600_VLIW5_Itin, 90 def : Processor<"rv710", R600_VLIW5_Itin, 94 def : Processor<"rv730", R600_VLIW5_Itin, 98 def : Processor<"rv770", R600_VLIW5_Itin, 106 def : Processor<"cedar", R600_VLIW5_Itin, 111 def : Processor<"cypress", R600_VLIW5_Itin, [all …]`
/freebsd/contrib/opencsd/decoder/include/common/
H A D	ocsd_dcd_mngr_i.h	`64 //!attach error logger to ptk-processor, or both of pkt processor and pkt decoder pair 77 // pkt processor only 78 …//! attach a raw packet monitor to pkt processor (solo pkt processor, or pkt processor part of pai… 81 //! attach a packet indexer to pkt processor (solo pkt processor, or pkt processor part of pair) 84 …/! attach a packet data sink to pkt processor output (solo pkt processor only - instead of decoder… 88 //! get raw data input interface from packet processor`
H A D	ocsd_dcd_mngr.h	65 // pkt processor 113 // always need a packet processor in createDecoder() 150 // associate decoder with packet processor in createDecoder() 152 // the associated component is the connected packet processor. in createDecoder() 155 // connect packet processor and decoder in createDecoder() 183 …pComponent->getAssocComponent() == 0) // no associated component - so this is a packet processor in attachInstrDecoder() 201 …pComponent->getAssocComponent() == 0) // no associated component - so this is a packet processor in attachMemAccessor() 219 …pComponent->getAssocComponent() == 0) // no associated component - so this is a packet processor in attachOutputSink() 234 // find the packet processor in getDataInputI() 251 // find the packet processor in attachPktMonitor() [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/goldmont/
H A D	cache.json	80 …processor) in the system, one of those caching agents indicated that they had a dirty copy of the … 264 …demand & prefetch) that miss the L2 cache with a snoop hit in the other processor module, data for… 272 …demand & prefetch) that miss the L2 cache with a snoop hit in the other processor module, data for… 277 …demand & prefetch) that miss the L2 cache with a snoop hit in the other processor module, no data … 285 …demand & prefetch) that miss the L2 cache with a snoop hit in the other processor module, no data … 290 …mand & prefetch) that true miss for the L2 cache with a snoop miss in the other processor module.", 298 …refetch) that true miss for the L2 cache with a snoop miss in the other processor module. Require… 329 … or L2 prefetchers that miss the L2 cache with a snoop hit in the other processor module, data for… 337 … or L2 prefetchers that miss the L2 cache with a snoop hit in the other processor module, data for… 342 … or L2 prefetchers that miss the L2 cache with a snoop hit in the other processor module, no data … [all …]
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A D	TargetID.h	20 /// Get all feature strings that can be used in target ID for \p Processor. 21 /// Target ID is a processor name with optional feature strings 23 /// gfx908:xnack+:sramecc-. Each processor have a limited 27 llvm::StringRef Processor); 29 /// Get processor name from target ID. 30 /// Returns canonical processor name or empty if the processor name is invalid. 34 /// Parse a target ID to get processor and feature map. 35 /// Returns canonicalized processor name or std::nullopt if the target ID is 45 /// Returns canonical target ID, assuming \p Processor is canonical and all 47 std::string getCanonicalTargetID(llvm::StringRef Processor,
/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A D	uncore.json	7 …ross-core snoop initiated by this Cbox due to processor core memory request which misses in some p… 8 …ross-core snoop initiated by this Cbox due to processor core memory request which misses in some p… 19 …fDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.", 20 …cDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.", 31 … snoop initiated by this Cbox due to processor core memory request which hits a non-modified line … 32 … snoop initiated by this Cbox due to processor core memory request which hits a non-modified line … 43 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 44 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 235 …. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, o… 236 …. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, o…
/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A D	tsan_rtl_proc.cpp	`20 Processor ProcCreate() { in ProcCreate() 21 void mem = InternalAlloc(sizeof(Processor)); in ProcCreate() 22 internal_memset(mem, 0, sizeof(Processor)); in ProcCreate() 23 Processor proc = new(mem) Processor; in ProcCreate() 33 void ProcDestroy(Processor proc) { in ProcDestroy() 41 proc->~Processor(); in ProcDestroy() 45 void ProcWire(Processor proc, ThreadState thr) { in ProcWire() 52 void ProcUnwire(Processor proc, ThreadState thr) { in ProcUnwire()`
/freebsd/contrib/opencsd/decoder/source/c_api/
H A D	ocsd_c_api_custom_obj.h	`61 //!attach error logger to ptk-processor, or both of pkt processor and pkt decoder pair 74 // pkt processor only 75 …//! attach a raw packet monitor to pkt processor (solo pkt processor, or pkt processor part of pai… 78 //! attach a packet indexer to pkt processor (solo pkt processor, or pkt processor part of pair) 81 …/! attach a packet data sink to pkt processor output (solo pkt processor only - instead of decoder… 85 //! get raw data input interface from packet processor`
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/
H A D	uncore.json	7 …ross-core snoop initiated by this Cbox due to processor core memory request which misses in some p… 8 …ross-core snoop initiated by this Cbox due to processor core memory request which misses in some p… 19 …fDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.", 20 …cDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.", 31 … snoop initiated by this Cbox due to processor core memory request which hits a non-modified line … 32 … snoop initiated by this Cbox due to processor core memory request which hits a non-modified line … 43 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 44 …re snoop initiated by this Cbox due to processor core memory request which hits a modified line in… 259 …. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, o… 260 …. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, o…
/freebsd/contrib/llvm-project/llvm/include/llvm/BinaryFormat/
H A D	ELF.h	9 // This header contains common, non-processor-specific data structures and 70 Elf32_Word e_flags; // Processor-specific flags 123 ET_LOPROC = 0xff00, // Beginning of processor-specific codes 124 ET_HIPROC = 0xffff // Processor-specific 167 EM_IA_64 = 50, // Intel IA-64 processor architecture 173 EM_NCPU = 56, // Sony nCPU embedded RISC processor 175 EM_STARCORE = 58, // Motorola Star*Core processor 176 EM_ME16 = 59, // Toyota ME16 processor 177 EM_ST100 = 60, // STMicroelectronics ST100 processor 178 EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family [all …]

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