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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dmax77620.txt1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
18 IRQ numbers for different interrupt source of MAX77620
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/freebsd/sys/contrib/device-tree/Bindings/connector/
H A Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
20 - enum:
21 - usb-a-connector
22 - usb-b-connector
23 - usb-c-connector
25 - items:
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A De5500_power_isa.dtsi2 * e5500 Power ISA Device Tree Source (include)
6 * Redistribution and use in source and binary forms, with or without
8 * * Redistributions of source code must retain the above copyright
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
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H A De500mc_power_isa.dtsi2 * e500mc Power ISA Device Tree Source (include)
6 * Redistribution and use in source and binary forms, with or without
8 * * Redistributions of source code must retain the above copyright
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
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H A De6500_power_isa.dtsi2 * e6500 Power ISA Device Tree Source (include)
6 * Redistribution and use in source and binary forms, with or without
8 * * Redistributions of source code must retain the above copyright
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
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H A De500v2_power_isa.dtsi2 * e500v2 Power ISA Device Tree Source (include)
6 * Redistribution and use in source and binary forms, with or without
8 * * Redistributions of source code must retain the above copyright
37 power-isa-version = "2.03";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-e.le; // Embedded.Little-Endian
43 power-isa-e.pm; // Embedded.Performance Monitor
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H A De500v1_power_isa.dtsi2 * e500v1 Power ISA Device Tree Source (include)
6 * Redistribution and use in source and binary forms, with or without
8 * * Redistributions of source code must retain the above copyright
37 power-isa-version = "2.03";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-e.le; // Embedded.Little-Endian
43 power-isa-e.pm; // Embedded.Performance Monitor
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/freebsd/sys/contrib/dev/acpica/common/
H A Dahpredef.c3 * Module Name: ahpredef - Table of all known ACPI predefined names
11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
22 * copy of the source code appearing in this file ("Covered Code") an
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-binding
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-zc1751-xm015-dc1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 model = "ZynqMP zc1751-xm015-dc1 RevA";
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H A Dzynqmp-zc1751-xm019-dc5.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm019-dc5
5 * (C) Copyright 2015 - 2021, Xilinx, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm019-dc5 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
33 stdout-path = "serial0:115200n8";
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H A Dzynqmp-zc1751-xm016-dc2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm016-dc2 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
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H A Dzynqmp-sck-kv-g-revB.dts1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2021, Xilinx, Inc.
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
15 /dts-v1/;
18 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
19 #address-cells = <1>;
20 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,x1e80100-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,x1e80100-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rajendra Nayak <quic_rjendra@quicinc.com>
13 Qualcomm global clock control module provides the clocks, resets and power
16 See also: include/dt-bindings/clock/qcom,x1e80100-gcc.h
21 - items:
22 - const: qcom,x1p42100-gcc
23 - const: qcom,x1e80100-gcc
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H A Dqcom,gcc-sc7280.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
13 Qualcomm global clock control module provides the clocks, resets and power
16 See also: include/dt-bindings/clock/qcom,gcc-sc7280.h
20 const: qcom,gcc-sc7280
24 - description: Board XO source
25 - description: Board active XO source
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H A Dqcom,videocc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
13 Qualcomm video clock control module provides the clocks, resets and power
17 include/dt-bindings/clock/qcom,sm6350-videocc.h
18 include/dt-bindings/clock/qcom,videocc-sc7180.h
19 include/dt-bindings/clock/qcom,videocc-sc7280.h
20 include/dt-bindings/clock/qcom,videocc-sdm845.h
21 include/dt-bindings/clock/qcom,videocc-sm8150.h
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H A Dqcom,sa8775p-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
13 Qualcomm display clock control module provides the clocks, resets and power
16 See also: include/dt-bindings/clock/qcom,sa8775p-dispcc.h
21 - qcom,sa8775p-dispcc0
22 - qcom,sa8775p-dispcc1
26 - description: GCC AHB clock source
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H A Dqcom,sm8450-camcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
11 - Jagadeesh Kona <quic_jkona@quicinc.com>
14 Qualcomm camera clock control module provides the clocks, resets and power
18 include/dt-bindings/clock/qcom,sm8450-camcc.h
19 include/dt-bindings/clock/qcom,sm8550-camcc.h
20 include/dt-bindings/clock/qcom,sm8650-camcc.h
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dpinctrl-max77620.txt1 Pincontrol driver for MAX77620 Power management IC from Maxim Semiconductor.
6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
11 --------
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/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.txt1 NVIDIA Tegra Power Management Controller (PMC)
4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dnvidia,tegra210-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 const: nvidia,tegra210-xusb
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
24 - description: base and length of the XUSB IPFS registers
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H A Dnvidia,tegra194-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 const: nvidia,tegra194-xusb
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
25 reg-names:
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H A Dnvidia,tegra186-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 const: nvidia,tegra186-xusb
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
25 reg-names:
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/freebsd/usr.sbin/powerd/
H A Dpowerd.84 .\" Redistribution and use in source and binary forms, with or without
7 .\" 1. Redistributions of source code must retain the above copyright
30 .Nd "system power control utility"
43 .Op Fl s Ar source
48 utility monitors the system state and sets various power control options
50 It offers power-saving modes that can be
51 individually selected for operation on AC power or batteries.
52 .Bl -tag -width "hiadaptive"
58 Choose the lowest performance values to get the most power savings.
65 increased power savings.
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/freebsd/sys/contrib/device-tree/src/arm/xilinx/
H A Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
31 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
37 switch-14 {
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