| /freebsd/sys/contrib/device-tree/Bindings/power/ |
| H A D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediate
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| H A D | power_domain.txt | 4 used for power gating of selected IP blocks for power saving by reduced leakage
7 This device tree binding can be used to bind PM domain consumer devices with
8 their PM domains provided by PM domain providers. A PM domain provider can be
9 represented by any node in the device tree and can provide one or more PM
10 domains. A consumer node can refer to the provider by a phandle and a set of
11 phandle arguments (so called PM domain specifiers) of length specified by the
12 #power-domain-cells property in the PM domain provider node.
14 ==PM domain providers==
16 See power-domain.yaml.
18 ==PM domain consumers==
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| H A D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
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| H A D | renesas,sysc-rmobile.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/renesa
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| H A D | power-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain
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| H A D | renesas,sysc-rmobile.txt | 1 DT bindings for the Renesas R-Mobile System Controller
3 == System Controller Node ==
5 The R-Mobile System Controller provides the following functions:
6 - Boot mode management,
7 - Reset generation,
8 - Power management.
11 - compatible: Should be "renesas,sysc-<soctype>", "renesas,sysc-rmobile" as
14 - "renesas,sysc-r8a73a4" (R-Mobile APE6)
15 - "renesas,sysc-r8a7740" (R-Mobile A1)
16 - "renesas,sysc-sh73a0" (SH-Mobile AG5)
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| H A D | fsl,imx-gpcv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller v2
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
14 Control (PGC) for various power domains.
16 Power domains contained within GPC node are generic power domain
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
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| H A D | fsl,scu-pd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fs
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| H A D | apple,pmgr-pwrstate.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC PMGR Power States
10 - Hector Martin <marcan@marcan.st>
13 - $ref: power-domain.yaml#
16 Apple SoCs include PMGR blocks responsible for power management,
17 which can control various clocks, resets, power states, and
18 performance features. This binding describes the device power
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| H A D | xlnx,zynqmp-genpd.txt | 1 -----------------------------------------------------------
3 -----------------------------------------------------------
4 The binding for zynqmp-power-controller follow the common
5 generic PM domain binding[1].
7 [1] Documentation/devicetree/bindings/power/power-domain.yaml
9 == Zynq MPSoC Generic PM Domain Node ==
12 - Below property should be in zynqmp-firmware node.
13 - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1.
15 Power domain ID indexes are mentioned in
16 include/dt-bindings/power/xlnx-zynqmp-power.h.
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| H A D | amlogic,meson-gx-pwrc.txt | 1 Amlogic Meson Power Controller (deprecated)
4 The Amlogic Meson SoCs embeds an internal Power domain controller.
6 VPU Power Domain
7 ----------------
9 The Video Processing Unit power domain is controlled by this power controller,
10 but the domain requires some external resources to meet the correct power
12 The bindings must respect the power domain bindings as described in the file
13 power-domain.yaml
16 ---------------------
19 - compatible: should be one of the following :
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| /freebsd/sys/contrib/device-tree/Bindings/soc/rockchip/ |
| H A D | power_domain.txt | 1 * Rockchip Power Domains
3 Rockchip processors include support for multiple power domains which can be
4 powered up/down by software based on different application scenes to save power.
6 Required properties for power domain controller:
7 - compatible: Should be one of the following.
8 "rockchip,px30-power-controller" - for PX30 SoCs.
9 "rockchip,rk3036-power-controller" - for RK3036 SoCs.
10 "rockchip,rk3066-power-controller" - for RK3066 SoCs.
11 "rockchip,rk3128-power-controller" - for RK3128 SoCs.
12 "rockchip,rk3188-power-controller" - for RK3188 SoCs.
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| /freebsd/sys/contrib/device-tree/Bindings/soc/ti/ |
| H A D | sci-pm-domain.txt | 1 Texas Instruments TI-SCI Generic Power Domain
2 ---------------------------------------------
7 controller happens through a protocol known as TI-SCI [1].
11 PM Domain Node
13 The PM domain node represents the global PM domain managed by the PMMC, which
14 in this case is the implementation as documented by the generic PM domain
15 bindings in Documentation/devicetree/bindings/power/power-domain.yaml. Because
17 child of the pmmc node.
20 --------------------
21 - compatible: should be "ti,sci-pm-domain"
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| H A D | sci-pm-domain.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI generic power domain
10 - Nishanth Menon <nm@ti.com>
13 - $ref: /schemas/power/power-domain.yaml#
16 Some TI SoCs contain a system controller (like the Power Management Micro
20 through a protocol called TI System Control Interface (TI-SCI protocol).
22 This PM domain node represents the global PM domain managed by the TI-SCI
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| /freebsd/sys/contrib/device-tree/Bindings/soc/dove/ |
| H A D | pmu.txt | 4 - compatible: value should be "marvell,dove-pmu".
5 May also include "simple-bus" if there are child devices, in which
6 case the ranges node is required.
7 - reg: two base addresses and sizes of the PM controller and PMU.
8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
11 - #interrupt-cells: must be 1.
12 - #reset-cells: must be 1.
13 - domains: sub-node containing domain descriptions
16 - ranges: defines the address mapping for child devices, as per the
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| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | arm,scpi.txt | 1 System Control and Power Interface (SCPI) Message Protocol
2 ----------------------------------------------------------
6 by Linux to initiate various system control and power operations.
10 - compatible : should be
12 * "arm,scpi-pre-1.0" : For implementations complying to all
14 - mboxes: List of phandle and mailbox channel specifiers
17 - shmem : List of phandle pointing to the shared memory(SHM) area between the
27 ------------------------------------------------------------
31 Container Node
34 - compatible : should be "arm,scpi-clocks"
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| H A D | arm,scmi.txt | 2 ----------------------------------------------------------
5 that are provided by the hardware platform it is running on, including power
15 The scmi node with the following properties shall be under the /firmware/ node.
17 - compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
24 - #address-cells : should be '1' if the device has sub-nodes, maps to
25 protocol identifier for a given sub-node.
26 - #size-cells : should be '0' as 'reg' property doesn't have any size
28 - arm,smc-id : SMC id required when using smc or hvc transports
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| /freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-host1x.txt | 4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | renesas,r8a7778-cpg-clocks.txt | 5 The CPG also provides a Clock Domain for SoC devices, in combination with the
10 - compatible: Must be "renesas,r8a7778-cpg-clocks"
11 - reg: Base address and length of the memory resource used by the CPG
12 - #clock-cells: Must be 1
13 - clock-output-names: The names of the clocks. Supported clocks are
15 - #power-domain-cells: Must be 0
17 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
18 through an MSTP clock should refer to the CPG device node in their
19 "power-domains" property, as documented by the generic PM domain bindings in
20 Documentation/devicetree/bindings/power/power_domain.txt.
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| H A D | renesas,r8a7779-cpg-clocks.txt | 5 The CPG also provides a Clock Domain for SoC devices, in combination with the
10 - compatible: Must be "renesas,r8a7779-cpg-clocks"
11 - reg: Base address and length of the memory resource used by the CPG
13 - clocks: Reference to the parent clock
14 - #clock-cells: Must be 1
15 - clock-output-names: The names of the clocks. Supported clocks are "plla",
17 - #power-domain-cells: Must be 0
19 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
20 through an MSTP clock should refer to the CPG device node in their
21 "power-domains" property, as documented by the generic PM domain bindings in
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| H A D | renesas,rz-cpg-clocks.txt | 5 The CPG also provides a Clock Domain for SoC devices, in combination with the
10 - compatible: Must be one of
11 - "renesas,r7s72100-cpg-clocks" for the r7s72100 CPG
12 and "renesas,rz-cpg-clocks" as a fallback.
13 - reg: Base address and length of the memory resource used by the CPG
14 - clocks: References to possible parent clocks. Order must match clock modes
16 - #clock-cells: Must be 1
17 - clock-output-names: The names of the clocks. Supported clocks are "pll",
19 - #power-domain-cells: Must be 0
21 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
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| /freebsd/sys/contrib/device-tree/Bindings/firmware/ |
| H A D | nvidia,tegra186-bpmp.txt | 1 NVIDIA Tegra Boot and Power Management Processor (BPMP)
4 booting process handling and offloading the power management, clock
11 - compatible
14 - "nvidia,tegra186-bpmp"
15 - mboxes : The phandle of mailbox controller and the mailbox specifier.
16 - shmem : List of the phandle of the TX and RX shared memory area that
18 - #clock-cells : Should be 1.
19 - #power-domain-cells : Should be 1.
20 - #reset-cells : Should be 1.
22 This node is a mailbox consumer. See the following files for details of
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| H A D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpm
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| /freebsd/sys/contrib/device-tree/Bindings/arm/tegra/ |
| H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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| /freebsd/sys/contrib/device-tree/Bindings/soc/tegra/ |
| H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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