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/freebsd/sys/contrib/device-tree/Bindings/soc/rockchip/
H A Dpower_domain.txt1 * Rockchip Power Domains
3 Rockchip processors include support for multiple power domains which can be
4 powered up/down by software based on different application scenes to save power.
6 Required properties for power domain controller:
7 - compatible: Should be one of the following.
8 "rockchip,px30-power-controller" - for PX30 SoCs.
9 "rockchip,rk3036-power-controller" - for RK3036 SoCs.
10 "rockchip,rk3066-power-controller" - for RK3066 SoCs.
11 "rockchip,rk3128-power-controller" - for RK3128 SoCs.
12 "rockchip,rk3188-power-controller" - for RK3188 SoCs.
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/apple/
H A Dt8112-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8112 "M2" SoC
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
22 #power-domain-cells = <0>;
[all …]
H A Dt8103-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T8103 "M1" SoC
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
22 #power-domain-cells = <0>;
[all …]
H A Dt600x-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * PMGR Power domains for the Apple T6001 "M1 Max" SoC
9 DIE_NODE(ps_pms_bridge): power-controller@100 {
10 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 #power-domain-cells = <0>;
13 #reset-cells = <0>;
15 apple,always-on; /* Core device */
18 DIE_NODE(ps_aic): power-controller@108 {
19 compatible = "apple,t6000-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 #power-domain-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/power/
H A Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
[all …]
H A Dmediatek,power-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediate
[all...]
H A Dfsl,imx-gpcv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller v2
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
14 Control (PGC) for various power domains.
16 Power domains contained within GPC node are generic power domain
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
[all …]
H A Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dpower_domain.txt4 used for power gating of selected IP blocks for power saving by reduced leakage
12 #power-domain-cells property in the PM domain provider node.
16 See power-domain.yaml.
21 - power-domains : A list of PM domain specifiers, as defined by bindings of
22 the power controller that is the PM domain provider.
25 - power-domain-names : A list of power domain name strings sorted in the same
26 order as the power-domains property. Consumers drivers will use
27 power-domain-names to match power domains with power-domains
32 leaky-device@12350000 {
33 compatible = "foo,i-leak-current";
[all …]
H A Dapple,pmgr-pwrstate.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC PMGR Power States
10 - Hector Martin <marcan@marcan.st>
13 - $ref: power-domain.yaml#
16 Apple SoCs include PMGR blocks responsible for power management,
17 which can control various clocks, resets, power states, and
18 performance features. This binding describes the device power
[all …]
H A Dfsl,imx-gpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX General Power Controller
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
14 counters and Power Gating Control (PGC).
16 The power domains are generic power domain providers as documented in
17 Documentation/devicetree/bindings/power/power-domain.yaml. They are
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/mediatek/
H A Dscpsys.txt4 The System Control Processor System (SCPSYS) has several power management
7 The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power
11 power/power-domain.yaml. It provides the power domains defined in
12 - include/dt-bindings/power/mt8173-power.h
13 - include/dt-bindings/power/mt6797-power.h
14 - include/dt-bindings/power/mt6765-power.h
15 - include/dt-bindings/power/mt2701-power.h
16 - include/dt-bindings/power/mt2712-power.h
17 - include/dt-bindings/power/mt7622-power.h
20 - compatible: Should be one of:
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/
H A Dr92c_chan.c3 /*-
69 return (-1); in r92c_get_power_group()
72 KASSERT(0, ("wrong channel band (flags %08X)\n", c->ic_flags)); in r92c_get_power_group()
73 return (-1); in r92c_get_power_group()
82 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r92c_get_txpower()
84 struct r92c_softc *rs = sc->sc_priv; in r92c_get_txpower()
85 struct rtwn_r92c_txpwr *rt = rs->rs_txpwr; in r92c_get_txpower()
86 const struct rtwn_r92c_txagc *base = rs->rs_txagc; in r92c_get_txpower()
92 if (group == -1) { /* shouldn't happen */ in r92c_get_txpower()
93 device_printf(sc->sc_dev, "%s: incorrect channel\n", __func__); in r92c_get_txpower()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/arm/
H A Djuno-scmi.dtsi3 power-domains = <&scmi_devpd 8>;
7 power-domains = <&scmi_devpd 8>;
11 power-domains = <&scmi_devpd 8>;
15 power-domains = <&scmi_devpd 8>;
19 power-domain
[all...]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A De6500_power_isa.dtsi2 * e6500 Power ISA Device Tree Source (include)
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
44 power-isa-e.pd; // Embedded.External PID
45 power-isa-e.hv; // Embedded.Hypervisor
[all …]
H A De5500_power_isa.dtsi2 * e5500 Power ISA Device Tree Source (include)
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
44 power-isa-e.pd; // Embedded.External PID
45 power-isa-e.hv; // Embedded.Hypervisor
[all …]
H A De500mc_power_isa.dtsi2 * e500mc Power ISA Device Tree Source (include)
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
44 power-isa-e.pd; // Embedded.External PID
45 power-isa-e.hv; // Embedded.Hypervisor
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/apple/
H A Dapple,pmgr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC Power Manager (PMGR)
10 - Hector Martin <marcan@marcan.st>
13 Apple SoCs include PMGR blocks responsible for power management,
14 which can control various clocks, resets, power states, and
16 with sub-nodes representing individual features.
20 pattern: "^power-management@[0-9a-f]+$"
24 - enum:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,imx8mm-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the VPU peripherals
20 - const: fsl,imx8mm-vpu-blk-ctrl
21 - const: syscon
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dx-powers,axp152.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/x-powers,axp152.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: X-Powers AXP PMIC
10 - Che
[all...]
H A Dmax77620.txt1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
[all …]
H A Dtwl4030-power.txt1 Texas Instruments TWL family (twl4030) reset and power management module
3 The power management module inside the TWL family provides several facilities
4 to control the power resources, including power scripts. For now, the
8 - compatible : must be one of the following
9 "ti,twl4030-power"
10 "ti,twl4030-power-reset"
11 "ti,twl4030-power-idle"
12 "ti,twl4030-power-idle-osc-off"
14 The use of ti,twl4030-power-reset is recommended at least on
17 When using ti,twl4030-power-idle, the TI recommended configuration
[all …]
/freebsd/sys/contrib/device-tree/Bindings/gpu/
H A Darm,mali-bifrost.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
18 - items:
19 - enum:
20 - amlogic,meson-g12a-mali
21 - mediatek,mt8183-mali
[all …]
/freebsd/sys/dev/rtwn/rtl8812a/
H A Dr12a_chan.c1 /*-
64 struct ieee80211_channel *c, uint8_t power[RTWN_RIDX_COUNT]) in r12a_write_txpower_ht()
67 /* Write per-MCS Tx power. */ in r12a_write_txpower_ht()
69 SM(R12A_TXAGC_MCS0, power[RTWN_RIDX_HT_MCS(0)]) | in r12a_write_txpower_ht()
70 SM(R12A_TXAGC_MCS1, power[RTWN_RIDX_HT_MCS(1)]) | in r12a_write_txpower_ht()
71 SM(R12A_TXAGC_MCS2, power[RTWN_RIDX_HT_MCS(2)]) | in r12a_write_txpower_ht()
72 SM(R12A_TXAGC_MCS3, power[RTWN_RIDX_HT_MCS(3)])); in r12a_write_txpower_ht()
74 SM(R12A_TXAGC_MCS4, power[RTWN_RIDX_HT_MCS(4)]) | in r12a_write_txpower_ht()
75 SM(R12A_TXAGC_MCS5, power[RTWN_RIDX_HT_MCS(5)]) | in r12a_write_txpower_ht()
76 SM(R12A_TXAGC_MCS6, power[RTWN_RIDX_HT_MCS(6)]) | in r12a_write_txpower_ht()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
[all …]

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