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/linux/drivers/platform/x86/intel/int3472/
H A Ddiscrete.c58 const char *func, u32 polarity) in skl_int3472_fill_gpiod_lookup()
73 *table_entry = GPIO_LOOKUP(acpi_dev_name(adev), agpio->pin_table[0], func, polarity); in skl_int3472_fill_gpiod_lookup()
80 const char *func, u32 polarity)
90 agpio, func, polarity); in skl_int3472_map_gpio_to_sensor()
103 const char *func, u32 polarity)
114 ret = skl_int3472_fill_gpiod_lookup(&lookup->table[0], agpio, func, polarity); in skl_int3472_gpiod_get_from_temp_lookup()
125 static void int3472_get_func_and_polarity(u8 type, const char **func, u32 *polarity) in skl_int3472_gpiod_get_from_temp_lookup()
130 *polarity = GPIO_ACTIVE_LOW; in int3472_get_func_and_polarity()
134 *polarity = GPIO_ACTIVE_LOW; in int3472_get_func_and_polarity()
138 *polarity in int3472_get_func_and_polarity()
57 skl_int3472_fill_gpiod_lookup(struct gpiod_lookup * table_entry,struct acpi_resource_gpio * agpio,const char * func,u32 polarity) skl_int3472_fill_gpiod_lookup() argument
83 skl_int3472_map_gpio_to_sensor(struct int3472_discrete_device * int3472,struct acpi_resource_gpio * agpio,const char * func,u32 polarity) skl_int3472_map_gpio_to_sensor() argument
106 skl_int3472_gpiod_get_from_temp_lookup(struct int3472_discrete_device * int3472,struct acpi_resource_gpio * agpio,const char * func,u32 polarity) skl_int3472_gpiod_get_from_temp_lookup() argument
128 int3472_get_func_and_polarity(u8 type,const char ** func,u32 * polarity) int3472_get_func_and_polarity() argument
200 u32 polarity; skl_int3472_handle_gpio_resources() local
[all...]
/linux/Documentation/fb/
H A Dviafb.modes25 # Polarity negative negative
50 # Polarity negative negative
71 # Polarity negative negative
92 # Polarity positive positive
113 # Polarity positive positive
134 # Polarity positive positive
155 # Polarity positive positive
176 # Polarity positive positive
197 # Polarity positive positive
219 # Polarity positive positive
[all …]
/linux/drivers/media/platform/ti/omap3isp/
H A Domap3isp.h31 * @clk_pol: Pixel clock polarity
33 * @hs_pol: Horizontal synchronization polarity
35 * @vs_pol: Vertical synchronization polarity
37 * @fld_pol: Field signal polarity
39 * @data_pol: Data polarity
64 * struct isp_csiphy_lane: CCP2/CSI2 lane position and polarity
66 * @pol: polarity of the lane
88 * @strobe_clk_pol: Strobe/clock polarity
98 * @vp_clk_pol: Video port output clock polarity
/linux/include/media/i2c/
H A Dtvp7002.h20 *@clk_polarity: Clock polarity
23 *@hs_polarity: HSYNC polarity
25 *@vs_polarity: VSYNC Polarity
27 *@fid_polarity: Active-high Field ID polarity.
30 * 1 - Operation with polarity inverted.
31 *@sog_polarity: Active high Sync on Green output polarity.
32 * 0 - Normal operation, 1 - Operation with polarity inverted
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Duncore-io.json97 …ent from the ring stop.; Filters for the Counterclockwise and Even ring polarity on Virtual Ring 0…
107 …sent from the ring stop.; Filters for the Counterclockwise and Odd ring polarity on Virtual Ring 0…
117 …ent from the ring stop.; Filters for the Counterclockwise and Even ring polarity on Virtual Ring 1…
127 …sent from the ring stop.; Filters for the Counterclockwise and Odd ring polarity on Virtual Ring 1…
147 …being sent from the ring stop.; Filters for the Clockwise and Even ring polarity on Virtual Ring 0…
157 … being sent from the ring stop.; Filters for the Clockwise and Odd ring polarity on Virtual Ring 0…
167 …being sent from the ring stop.; Filters for the Clockwise and Even ring polarity on Virtual Ring 1…
177 … being sent from the ring stop.; Filters for the Clockwise and Odd ring polarity on Virtual Ring 1…
197 …ent from the ring stop.; Filters for the Counterclockwise and Even ring polarity on Virtual Ring 0…
207 …sent from the ring stop.; Filters for the Counterclockwise and Odd ring polarity on Virtual Ring 0…
[all …]
/linux/drivers/net/wireless/ath/ath5k/
H A Drfkill.c41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n", in ath5k_rfkill_disable()
42 ah->rf_kill.gpio, ah->rf_kill.polarity); in ath5k_rfkill_disable()
44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity); in ath5k_rfkill_disable()
50 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill enable (gpio:%d polarity:%d)\n", in ath5k_rfkill_enable()
51 ah->rf_kill.gpio, ah->rf_kill.polarity); in ath5k_rfkill_enable()
53 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, ah->rf_kill.polarity); in ath5k_rfkill_enable()
72 ah->rf_kill.polarity; in ath5k_is_rfkill_set()
91 ah->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol; in ath5k_rfkill_hw_start()
/linux/drivers/acpi/
H A Dirq.c51 * @polarity: polarity of the GSI to be mapped
57 int polarity) in acpi_register_gsi() argument
69 fwspec.param[1] = acpi_dev_get_irq_type(trigger, polarity); in acpi_register_gsi()
153 * @polarity: polarity attributes of hwirq
154 * @polarity: polarity attributes of hwirq
165 u8 polarity, u8 shareable, in acpi_irq_parse_one_match() argument
172 *ctx->res_flags = acpi_dev_irq_flags(triggering, polarity, shareable, wake_capable); in acpi_irq_parse_one_match()
175 ctx->fwspec->param[1] = acpi_dev_get_irq_type(triggering, polarity); in acpi_irq_parse_one_match()
214 irq->triggering, irq->polarity, in acpi_irq_parse_one_cb()
228 eirq->triggering, eirq->polarity, in acpi_irq_parse_one_cb()
H A Dresource.c337 * @polarity: Interrupt polarity as provided by ACPI.
341 unsigned long acpi_dev_irq_flags(u8 triggering, u8 polarity, u8 shareable, u8 wake_capable) in acpi_dev_irq_flags() argument
346 flags = polarity == ACPI_ACTIVE_LOW ? in acpi_dev_irq_flags()
349 flags = polarity == ACPI_ACTIVE_LOW ? in acpi_dev_irq_flags()
365 * @polarity: Interrupt polarity as provided by ACPI.
367 unsigned int acpi_dev_get_irq_type(int triggering, int polarity) in acpi_dev_get_irq_type() argument
369 switch (polarity) { in acpi_dev_get_irq_type()
698 unsigned char polarity; member
708 static bool acpi_dev_irq_override(u32 gsi, u8 triggering, u8 polarity, in acpi_dev_irq_override() argument
719 entry->polarity == polarity && in acpi_dev_irq_override()
[all …]
/linux/drivers/pwm/
H A Dpwm-imx-tpm.c9 * - Changes to polarity cannot be latched at the time of the
129 real_state->polarity = state->polarity; in pwm_imx_tpm_round_state()
154 /* get polarity */ in pwm_imx_tpm_get_state()
157 state->polarity = PWM_POLARITY_INVERSED; in pwm_imx_tpm_get_state()
161 * normal polarity. in pwm_imx_tpm_get_state()
163 state->polarity = PWM_POLARITY_NORMAL; in pwm_imx_tpm_get_state()
220 /* polarity is NOT allowed to be changed if PWM is active */ in pwm_imx_tpm_apply_hw()
221 if (c.enabled && c.polarity != state->polarity) in pwm_imx_tpm_apply_hw()
251 * polarity settings will enabled/disable output status in pwm_imx_tpm_apply_hw()
261 * set polarity (for edge-aligned PWM modes) in pwm_imx_tpm_apply_hw()
[all …]
H A Dpwm-renesas-tpu.c74 enum pwm_polarity polarity; member
113 tpd->polarity == PWM_POLARITY_INVERSED ? in tpu_pwm_set_pin()
118 tpd->polarity == PWM_POLARITY_INVERSED ? in tpu_pwm_set_pin()
123 tpd->polarity == PWM_POLARITY_INVERSED ? in tpu_pwm_set_pin()
173 * - Output 0 until TGRA, output 1 until TGRB (active low polarity) in tpu_pwm_timer_start()
174 * - Output 1 until TGRA, output 0 until TGRB (active high polarity in tpu_pwm_timer_start()
224 tpd->polarity = PWM_POLARITY_NORMAL; in tpu_pwm_request()
352 enum pwm_polarity polarity) in tpu_pwm_set_polarity() argument
357 tpd->polarity = polarity; in tpu_pwm_set_polarity()
402 if (state->polarity != pwm->state.polarity) { in tpu_pwm_apply()
[all …]
H A Dpwm-bcm-kona.c23 * 2) Changes to prescale, duty, period, and polarity do not take effect until
157 enum pwm_polarity polarity) in kona_pwmc_set_polarity() argument
174 if (polarity == PWM_POLARITY_NORMAL) in kona_pwmc_set_polarity()
231 if (state->polarity != pwm->state.polarity) { in kona_pwmc_apply()
237 err = kona_pwmc_set_polarity(chip, pwm, state->polarity); in kona_pwmc_apply()
241 pwm->state.polarity = state->polarity; in kona_pwmc_apply()
/linux/drivers/media/dvb-frontends/
H A Dm88ds3103.h52 * @ts_clk_pol: TS clk polarity. 1-active at falling edge; 0-active at rising
56 * @agc_inv: AGC polarity.
59 * @lnb_hv_pol: LNB H/V pin polarity. 0: pin high set to VOLTAGE_18, pin low to
61 * @lnb_en_pol: LNB enable pin polarity. 0: pin high to disable, pin low to
97 * @ts_clk_pol: TS clk polarity.Default: 0.
100 * @agc_inv: AGC polarity. Default: 0.
105 * @lnb_hv_pol: LNB H/V pin polarity. Default: 0. Values:
108 * @lnb_en_pol: LNB enable pin polarity. Default: 0. Values:
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmicrochip,pic32-evic.txt9 External interrupts have a software configurable edge polarity. Non external
10 interrupts have a type and polarity that is determined by the source of the
26 irq_type - is used to describe the type and polarity of an interrupt. For
29 IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.
34 polarity configuration. This array corresponds to the bits in the INTCON
49 and polarity.
/linux/include/linux/mfd/
H A Dstm32-timers.h76 #define TIM_CCER_CCxP(x) BIT(1 + 4 * ((x) - 1)) /* Capt/Comp x Polarity (x ∈ {1, .. 4}) */
78 #define TIM_CCER_CCxNP(x) BIT(3 + 4 * ((x) - 1)) /* Capt/Comp xN Polarity (x ∈ {1, .. 4}) */
80 #define TIM_CCER_CC1P TIM_CCER_CCxP(1) /* Capt/Comp 1 Polarity */
82 #define TIM_CCER_CC1NP TIM_CCER_CCxNP(1) /* Capt/Comp 1N Polarity */
84 #define TIM_CCER_CC2P TIM_CCER_CCxP(2) /* Capt/Comp 2 Polarity */
86 #define TIM_CCER_CC2NP TIM_CCER_CCxNP(2) /* Capt/Comp 2N Polarity */
88 #define TIM_CCER_CC3P TIM_CCER_CCxP(3) /* Capt/Comp 3 Polarity */
90 #define TIM_CCER_CC3NP TIM_CCER_CCxNP(3) /* Capt/Comp 3N Polarity */
92 #define TIM_CCER_CC4P TIM_CCER_CCxP(4) /* Capt/Comp 4 Polarity */
94 #define TIM_CCER_CC4NP TIM_CCER_CCxNP(4) /* Capt/Comp 4N Polarity */
[all …]
/linux/include/trace/events/
H A Dpwm.h22 __field(enum pwm_polarity, polarity)
32 __entry->polarity = state->polarity;
37 TP_printk("pwmchip%u.%u: period=%llu duty_cycle=%llu polarity=%d enabled=%d err=%d",
39 __entry->polarity, __entry->enabled, __entry->err)
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dtvp7002.txt10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
16 - pclk-sample: Clock polarity of the bus. Default value when this property is
24 - field-even-active: Active-high Field ID output polarity control of the bus.
28 1 = FID output polarity inverted
/linux/Documentation/devicetree/bindings/regulator/
H A Drichtek,rtmv20-regulator.yaml100 richtek,strobe-polarity-high:
101 description: Strobe pin active polarity control.
104 richtek,vsync-polarity-high:
105 description: Vsync pin active polarity control.
150 richtek,strobe-polarity-high;
151 richtek,vsync-polarity-high;
/linux/drivers/pnp/pnpacpi/
H A Drsparser.c19 u8 *polarity, u8 *shareable) in decode_irq_flags() argument
25 *polarity = ACPI_ACTIVE_LOW; in decode_irq_flags()
29 *polarity = ACPI_ACTIVE_HIGH; in decode_irq_flags()
33 *polarity = ACPI_ACTIVE_LOW; in decode_irq_flags()
37 *polarity = ACPI_ACTIVE_HIGH; in decode_irq_flags()
43 *polarity = ACPI_ACTIVE_HIGH; in decode_irq_flags()
208 gpio->polarity, in pnpacpi_allocated_resource()
319 flags = acpi_dev_irq_flags(p->triggering, p->polarity, p->shareable, p->wake_capable); in pnpacpi_parse_irq_option()
343 flags = acpi_dev_irq_flags(p->triggering, p->polarity, p->shareable, p->wake_capable); in pnpacpi_parse_ext_irq_option()
664 u8 triggering, polarity, shareable; in pnpacpi_encode_irq() local
[all …]
/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio.txt86 A gpio-specifier should contain a flag indicating the GPIO polarity; active-
90 The gpio-specifier's polarity flag should represent the physical level at the
97 When the device's signal polarity is configurable, the binding for the
100 a) Define a single static polarity for the signal, with the expectation that
102 that signal polarity.
104 The static choice of polarity may be either:
112 In particular, the polarity cannot be derived from the gpio-specifier, since
114 concepts of configurable signal polarity in the device, and possible board-
119 b) Pick a single option for device signal polarity, and document this choice
120 in the binding. The gpio-specifier should represent the polarity of the signal
[all …]
/linux/Documentation/devicetree/bindings/iio/addac/
H A Dadi,ad74115.yaml225 adi,ext1-burnout-current-polarity-sourcing:
228 When not present, the burnout current polarity for EXT1 is sinking.
229 When present, the burnout current polarity for EXT1 is sourcing.
240 adi,ext2-burnout-current-polarity-sourcing:
243 When not present, the burnout current polarity for EXT2 is sinking.
244 When present, the burnout current polarity for EXT2 is sourcing.
255 adi,viout-burnout-current-polarity-sourcing:
258 When not present, the burnout current polarity for VIOUT is sinking.
259 When present, the burnout current polarity for VIOUT is sourcing.
/linux/Documentation/driver-api/
H A Dpwm.rst84 period). struct pwm_args contains 2 fields (period and polarity) and should
125 polarity
126 Changes the polarity of the PWM signal (read/write).
128 the polarity.
153 When implementing polarity support in a PWM driver, make sure to respect the
154 signal conventions in the PWM framework. By definition, normal polarity
157 polarity starts low for the duration of the duty cycle and goes high for the
/linux/drivers/staging/greybus/
H A Dpwm.c114 u8 which, u8 polarity) in gb_pwm_set_polarity_operation() argument
122 request.polarity = polarity; in gb_pwm_set_polarity_operation()
198 /* Set polarity */ in gb_pwm_apply()
199 if (state->polarity != pwm->state.polarity) { in gb_pwm_apply()
204 err = gb_pwm_set_polarity_operation(chip, pwm->hwpwm, state->polarity); in gb_pwm_apply()
/linux/drivers/counter/
H A Dstm32-lptimer-cnt.c27 u32 polarity; member
100 /* Setup LP timer encoder/counter and polarity, without prescaler */ in stm32_lptim_setup()
105 val |= FIELD_PREP(STM32_LPTIM_CKPOL, enable ? priv->polarity : 0); in stm32_lptim_setup()
167 if (priv->polarity == STM32_LPTIM_CKPOL_BOTH_EDGES) { in stm32_lptim_cnt_function_read()
190 priv->polarity = STM32_LPTIM_CKPOL_BOTH_EDGES; in stm32_lptim_cnt_function_write()
295 switch (priv->polarity) { in stm32_lptim_cnt_action_read()
334 /* only set polarity when in counter mode (on input 1) */ in stm32_lptim_cnt_action_write()
341 priv->polarity = STM32_LPTIM_CKPOL_RISING_EDGE; in stm32_lptim_cnt_action_write()
344 priv->polarity = STM32_LPTIM_CKPOL_FALLING_EDGE; in stm32_lptim_cnt_action_write()
347 priv->polarity = STM32_LPTIM_CKPOL_BOTH_EDGES; in stm32_lptim_cnt_action_write()
/linux/drivers/gpio/
H A Dgpio-rockchip.c351 u32 data, data_old, polarity; in rockchip_irq_demux() local
359 polarity = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
362 polarity &= ~BIT(irq); in rockchip_irq_demux()
364 polarity |= BIT(irq); in rockchip_irq_demux()
365 writel(polarity, in rockchip_irq_demux()
388 u32 polarity; in rockchip_irq_set_type() local
409 polarity = rockchip_gpio_readl(bank, bank->gpio_regs->int_polarity); in rockchip_irq_set_type()
426 polarity &= ~mask; in rockchip_irq_set_type()
428 polarity |= mask; in rockchip_irq_set_type()
440 polarity |= mask; in rockchip_irq_set_type()
[all …]
/linux/Documentation/devicetree/bindings/hwmon/
H A Dti,ina2xx.yaml69 ti,alert-polarity-active-high:
70 description: Alert pin is asserted based on the value of Alert polarity Bit
74 the alert polarity to active-high.
99 ti,alert-polarity-active-high;

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