| /linux/Documentation/devicetree/bindings/soc/samsung/ |
| H A D | exynos-pmu.yaml | 4 $id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml#
7 title: Samsung Exynos SoC series Power Management Unit (PMU)
18 - google,gs101-pmu
19 - samsung,exynos3250-pmu
20 - samsung,exynos4210-pmu
21 - samsung,exynos4212-pmu
22 - samsung,exynos4412-pmu
23 - samsung,exynos5250-pmu
24 - samsung,exynos5260-pmu
25 - samsung,exynos5410-pmu
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| /linux/tools/perf/util/ |
| H A D | pmus.c | 18 #include "pmu.h"
26 * core_pmus: A PMU belongs to core_pmus if it's name is "cpu" or it's sysfs
28 * must have pmu->is_core=1. If there are more than one PMU in
31 * homogeneous PMU, and thus they are treated as homogeneous
34 * matter whether PMU is present per SMT-thread or outside of the
38 * must have pmu->is_core=0 but pmu->is_uncore could be 0 or 1.
83 * that S390's cpum_cf PMU doesn't match. in pmu_name_len_no_suffix()
113 struct perf_pmu *pmu, *tmp; in perf_pmus__destroy() local
115 list_for_each_entry_safe(pmu, tmp, &core_pmus, list) { in perf_pmus__destroy()
116 list_del(&pmu->list); in perf_pmus__destroy()
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| H A D | pmu.c | 22 #include "pmu.h"
28 #include <util/pmu-bison.h>
29 #include <util/pmu-flex.h>
43 /* An event loaded from /sys/bus/event_source/devices/<pmu>/events. */
48 * An event loaded from a /sys/bus/event_source/devices/<pmu>/identifier matched json
56 * pmu-events.c, created by parsing the pmu-events json files.
79 * differ from the PMU name as it won't have suffixes.
111 * PMU need to be checked. If they aren't supported they are marked
146 static int pmu_aliases_parse(struct perf_pmu *pmu);
189 static void perf_pmu_format__load(const struct perf_pmu *pmu, struct perf_pmu_format *format) in perf_pmu_format__load() argument
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| H A D | pmu.h | 12 #include "pmu-events/pmu-events.h"
42 /* A perf event syscall PMU. */
44 /* A perf tool provided DRM PMU. */
46 /* A perf tool provided HWMON PMU. */
48 /* Perf tool provided PMU for tool events like time. */
50 /* A testing PMU kind. */
69 /** @name: The name of the PMU such as "cpu". */
72 * @alias_name: Optional alternate name for the PMU determined in
77 * @id: Optional PMU identifier read from
87 * @selectable: Can the PMU name be selected as if it were an event?
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
| H A D | base.c | 32 struct nvkm_pmu *pmu = device->pmu; in nvkm_pmu_fan_controlled() local
34 /* Internal PMU FW does not currently control fans in any way, in nvkm_pmu_fan_controlled()
37 if (pmu && pmu->func->code.size) in nvkm_pmu_fan_controlled()
40 /* Default (board-loaded, or VBIOS PMU/PREOS) PMU FW on Fermi in nvkm_pmu_fan_controlled()
48 nvkm_pmu_pgob(struct nvkm_pmu *pmu, bool enable) in nvkm_pmu_pgob() argument
50 if (pmu && pmu->func->pgob) in nvkm_pmu_pgob()
51 pmu->func->pgob(pmu, enable); in nvkm_pmu_pgob()
57 struct nvkm_pmu *pmu = container_of(work, typeof(*pmu), recv.work); in nvkm_pmu_recv() local
58 return pmu->func->recv(pmu); in nvkm_pmu_recv()
62 nvkm_pmu_send(struct nvkm_pmu *pmu, u32 reply[2], in nvkm_pmu_send() argument
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| H A D | gm20b.c | 28 #include <nvfw/pmu.h>
42 struct nvkm_pmu *pmu = container_of(falcon, typeof(*pmu), falcon); in gm20b_pmu_acr_bootstrap_falcon() local
52 ret = nvkm_falcon_cmdq_send(pmu->hpq, &cmd.cmd.hdr, in gm20b_pmu_acr_bootstrap_falcon()
54 &pmu->subdev, msecs_to_jiffies(1000)); in gm20b_pmu_acr_bootstrap_falcon()
129 struct nvkm_pmu *pmu = priv; in gm20b_pmu_acr_init_wpr_callback() local
130 struct nvkm_subdev *subdev = &pmu->subdev; in gm20b_pmu_acr_init_wpr_callback()
139 complete_all(&pmu->wpr_ready); in gm20b_pmu_acr_init_wpr_callback()
144 gm20b_pmu_acr_init_wpr(struct nvkm_pmu *pmu) in gm20b_pmu_acr_init_wpr() argument
154 return nvkm_falcon_cmdq_send(pmu->hpq, &cmd.cmd.hdr, in gm20b_pmu_acr_init_wpr()
155 gm20b_pmu_acr_init_wpr_callback, pmu, 0); in gm20b_pmu_acr_init_wpr()
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| H A D | gt215.c | 30 gt215_pmu_send(struct nvkm_pmu *pmu, u32 reply[2], in gt215_pmu_send() argument
33 struct nvkm_subdev *subdev = &pmu->subdev; in gt215_pmu_send()
37 mutex_lock(&pmu->send.mutex); in gt215_pmu_send()
45 mutex_unlock(&pmu->send.mutex); in gt215_pmu_send()
50 * on a synchronous reply, take the PMU mutex and tell the in gt215_pmu_send()
54 pmu->recv.message = message; in gt215_pmu_send()
55 pmu->recv.process = process; in gt215_pmu_send()
65 pmu->send.base)); in gt215_pmu_send()
77 wait_event(pmu->recv.wait, (pmu->recv.process == 0)); in gt215_pmu_send()
78 reply[0] = pmu->recv.data[0]; in gt215_pmu_send()
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| H A D | gk20a.c | 51 gk20a_pmu_dvfs_target(struct gk20a_pmu *pmu, int *state) in gk20a_pmu_dvfs_target() argument
53 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_target()
59 gk20a_pmu_dvfs_get_cur_state(struct gk20a_pmu *pmu, int *state) in gk20a_pmu_dvfs_get_cur_state() argument
61 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_get_cur_state()
67 gk20a_pmu_dvfs_get_target_state(struct gk20a_pmu *pmu, in gk20a_pmu_dvfs_get_target_state() argument
70 struct gk20a_pmu_dvfs_data *data = pmu->data; in gk20a_pmu_dvfs_get_target_state()
71 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_get_target_state()
86 nvkm_trace(&pmu->base.subdev, "cur level = %d, new level = %d\n", in gk20a_pmu_dvfs_get_target_state()
95 gk20a_pmu_dvfs_get_dev_status(struct gk20a_pmu *pmu, in gk20a_pmu_dvfs_get_dev_status() argument
98 struct nvkm_falcon *falcon = &pmu->base.falcon; in gk20a_pmu_dvfs_get_dev_status()
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| /linux/drivers/soc/dove/ |
| H A D | pmu.c | 3 * Marvell Dove PMU support
17 #include <linux/soc/dove/pmu.h>
42 * The PMU contains a register to reset various subsystems within the
50 struct pmu_data *pmu = rcdev_to_pmu(rc); in pmu_reset_reset() local
54 spin_lock_irqsave(&pmu->lock, flags); in pmu_reset_reset()
55 val = readl_relaxed(pmu->pmc_base + PMC_SW_RST); in pmu_reset_reset()
56 writel_relaxed(val & ~BIT(id), pmu->pmc_base + PMC_SW_RST); in pmu_reset_reset()
57 writel_relaxed(val | BIT(id), pmu->pmc_base + PMC_SW_RST); in pmu_reset_reset()
58 spin_unlock_irqrestore(&pmu->lock, flags); in pmu_reset_reset()
65 struct pmu_data *pmu = rcdev_to_pmu(rc); in pmu_reset_assert() local
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| /linux/drivers/pmdomain/starfive/ |
| H A D | jh71xx-pmu.c | 3 * StarFive JH71XX PMU (Power Management Unit) Controller Driver
15 #include <dt-bindings/power/starfive,jh7110-pmu.h>
26 /* aon pmu register offset */
36 /* pmu int status */
64 struct jh71xx_pmu *pmu);
76 spinlock_t lock; /* protects pmu reg */
81 struct jh71xx_pmu *pmu; member
87 struct jh71xx_pmu *pmu = pmd->pmu; in jh71xx_pmu_get_state() local
92 *is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask; in jh71xx_pmu_get_state()
99 struct jh71xx_pmu *pmu = pmd->pmu; in jh7110_pmu_set_state() local
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| /linux/drivers/perf/ |
| H A D | fsl_imx9_ddr_perf.c | 59 #define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu)
79 const char *identifier; /* system PMU identifier for userspace */
84 struct pmu pmu; member
117 static inline bool axi_filter_v1(struct ddr_pmu *pmu) in axi_filter_v1() argument
119 return pmu->devtype_data->filter_ver == DDR_PERF_AXI_FILTER_V1; in axi_filter_v1()
122 static inline bool axi_filter_v2(struct ddr_pmu *pmu) in axi_filter_v2() argument
124 return pmu->devtype_data->filter_ver == DDR_PERF_AXI_FILTER_V2; in axi_filter_v2()
128 { .compatible = "fsl,imx91-ddr-pmu", .data = &imx91_devtype_data },
129 { .compatible = "fsl,imx93-ddr-pmu", .data = &imx93_devtype_data },
130 { .compatible = "fsl,imx94-ddr-pmu", .data = &imx94_devtype_data },
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| H A D | Kconfig | 10 tristate "ARM CCI PMU driver"
14 Support for PMU events monitoring on the ARM CCI (Cache Coherent
41 PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
45 tristate "Arm CMN-600 PMU support"
48 Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
52 tristate "Arm NI-700 PMU support"
55 Support for PMU events monitoring on the Arm NI-700 Network-on-Chip
60 bool "ARM PMU framework"
80 bool "RISC-V PMU framework"
84 systems. This provides the core PMU framework that abstracts common
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| /linux/Documentation/devicetree/bindings/arm/rockchip/ |
| H A D | pmu.yaml | 4 $id: http://devicetree.org/schemas/arm/rockchip/pmu.yaml#
7 title: Rockchip Power Management Unit (PMU)
14 The PMU is used to turn on and off different power domains of the SoCs.
22 - rockchip,px30-pmu
23 - rockchip,rk3066-pmu
24 - rockchip,rk3128-pmu
25 - rockchip,rk3288-pmu
26 - rockchip,rk3368-pmu
27 - rockchip,rk3399-pmu
28 - rockchip,rk3528-pmu
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| /linux/arch/x86/kvm/svm/ |
| H A D | pmu.c | 3 * KVM PMU support for AMD
20 #include "pmu.h"
28 static struct kvm_pmc *amd_pmu_get_pmc(struct kvm_pmu *pmu, int pmc_idx) in amd_pmu_get_pmc() argument
30 unsigned int num_counters = pmu->nr_arch_gp_counters; in amd_pmu_get_pmc()
35 return &pmu->gp_counters[array_index_nospec(pmc_idx, num_counters)]; in amd_pmu_get_pmc()
38 static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr, in get_gp_pmc_amd() argument
41 struct kvm_vcpu *vcpu = pmu_to_vcpu(pmu); in get_gp_pmc_amd()
44 if (!pmu->version) in get_gp_pmc_amd()
52 * Each PMU counter has a pair of CTL and CTR MSRs. CTLn in get_gp_pmc_amd()
73 return amd_pmu_get_pmc(pmu, idx); in get_gp_pmc_amd()
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| /linux/arch/x86/kvm/vmx/ |
| H A D | pmu_intel.c | 3 * KVM PMU support for Intel CPUs
22 #include "pmu.h"
57 static void reprogram_fixed_counters(struct kvm_pmu *pmu, u64 data) in reprogram_fixed_counters() argument
60 u64 old_fixed_ctr_ctrl = pmu->fixed_ctr_ctrl; in reprogram_fixed_counters()
63 pmu->fixed_ctr_ctrl = data; in reprogram_fixed_counters()
64 for (i = 0; i < pmu->nr_arch_fixed_counters; i++) { in reprogram_fixed_counters()
71 pmc = get_fixed_pmc(pmu, MSR_CORE_PERF_FIXED_CTR0 + i); in reprogram_fixed_counters()
73 __set_bit(KVM_FIXED_PMC_BASE_IDX + i, pmu->pmc_in_use); in reprogram_fixed_counters()
82 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); in intel_rdpmc_ecx_to_pmc() local
94 * Yell and reject attempts to read PMCs for a non-architectural PMU, in intel_rdpmc_ecx_to_pmc()
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | marvell,dove-pinctrl.txt | 9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
14 Note: pmu* also allows for Power Management functions listed below
18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu*
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
20 mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt),
21 uart1(rts), pmu*
22 mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act),
23 uart1(cts), lcd-spi(cs1), pmu*
24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
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| /linux/arch/x86/events/amd/ |
| H A D | uncore.c | 55 struct pmu pmu; member
96 return container_of(event->pmu, struct amd_uncore_pmu, pmu); in event_to_amd_uncore_pmu()
112 event->pmu->read(event); in amd_uncore_hrtimer()
165 struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event); in amd_uncore_start() local
166 struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu->ctx, event->cpu); in amd_uncore_start()
183 struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event); in amd_uncore_stop() local
184 struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu->ctx, event->cpu); in amd_uncore_stop()
191 event->pmu->read(event); in amd_uncore_stop()
204 struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event); in amd_uncore_add() local
205 struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu->ctx, event->cpu); in amd_uncore_add()
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| /linux/tools/perf/arch/arm/util/ |
| H A D | pmu.c | 8 #include <linux/coresight-pmu.h>
15 #include "../../../util/pmu.h"
19 void perf_pmu__arch_init(struct perf_pmu *pmu) in perf_pmu__arch_init() argument
23 if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) { in perf_pmu__arch_init()
25 pmu->auxtrace = true; in perf_pmu__arch_init()
26 pmu->selectable = true; in perf_pmu__arch_init()
27 pmu->perf_event_attr_init_default = cs_etm_get_default_config; in perf_pmu__arch_init()
29 } else if (strstarts(pmu->name, ARM_SPE_PMU_NAME)) { in perf_pmu__arch_init()
30 pmu->auxtrace = true; in perf_pmu__arch_init()
31 pmu->selectable = true; in perf_pmu__arch_init()
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| /linux/tools/perf/tests/ |
| H A D | pmu-events.c | 4 #include "pmu.h"
12 #include "../pmu-events/pmu-events.h"
22 /* used for matching against events from generated pmu-events.c */
32 /* PMU which we should match against */
45 .pmu = "default_core",
55 .pmu = "default_core",
65 .pmu = "default_core",
75 .pmu = "default_core",
85 .pmu = "default_core",
95 .pmu = "default_core",
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| /linux/tools/perf/pmu-events/ |
| H A D | Build | 1 pmu-events-y += pmu-events.o
2 JSON = $(shell find pmu-events/arch -name '*.json' -o -name '*.csv')
3 JDIR_TEST = pmu-events/arch/test
6 JEVENTS_PY = pmu-events/jevents.py
7 METRIC_PY = pmu-events/metric.py
8 METRIC_TEST_PY = pmu-events/metric_test.py
9 EMPTY_PMU_EVENTS_C = pmu-events/empty-pmu-events.c
10 PMU_EVENTS_C = $(OUTPUT)pmu-events/pmu-events.c
11 METRIC_TEST_LOG = $(OUTPUT)pmu-events/metric_test.log
12 TEST_EMPTY_PMU_EVENTS_C = $(OUTPUT)pmu-events/test-empty-pmu-events.c
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| /linux/arch/x86/kvm/ |
| H A D | pmu.h | 9 #define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu)
10 #define pmu_to_vcpu(pmu) (container_of((pmu), struct kvm_vcpu, arch.pmu)) argument
11 #define pmc_to_pmu(pmc) (&(pmc)->vcpu->arch.pmu)
47 static inline bool kvm_pmu_has_perf_global_ctrl(struct kvm_pmu *pmu) in kvm_pmu_has_perf_global_ctrl() argument
51 * supported if "CPUID.0AH: EAX[7:0] > 0", i.e. if the PMU version is in kvm_pmu_has_perf_global_ctrl()
53 * to/for the guest if the guest PMU supports at least "Architectural in kvm_pmu_has_perf_global_ctrl()
58 return pmu->version > 1; in kvm_pmu_has_perf_global_ctrl()
75 static inline struct kvm_pmc *kvm_pmc_idx_to_pmc(struct kvm_pmu *pmu, int idx) in kvm_pmc_idx_to_pmc() argument
77 if (idx < pmu->nr_arch_gp_counters) in kvm_pmc_idx_to_pmc()
78 return &pmu->gp_counters[idx]; in kvm_pmc_idx_to_pmc()
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| /linux/arch/x86/events/intel/ |
| H A D | uncore.c | 139 struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu) in uncore_pmu_to_box() argument
147 return dieid < uncore_max_dies() ? pmu->boxes[dieid] : NULL; in uncore_pmu_to_box()
374 * Using uncore_pmu_event_init pmu event_init callback
381 return &box->pmu->pmu == event->pmu; in is_box_event()
391 max_count = box->pmu->type->num_counters; in uncore_collect_events()
392 if (box->pmu->type->fixed_ctl) in uncore_collect_events()
425 struct intel_uncore_type *type = box->pmu->type; in uncore_get_event_constraint()
450 if (box->pmu->type->ops->put_constraint) in uncore_put_event_constraint()
451 box->pmu->type->ops->put_constraint(box, event); in uncore_put_event_constraint()
687 * PMU if it was the only group available.
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| H A D | gm200.c | 28 #include <subdev/bios/pmu.h>
29 #include <subdev/pmu.h>
33 pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) in pmu_code() argument
39 nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); in pmu_code()
42 nvkm_wr32(device, 0x10a188, (pmu + i) >> 8); in pmu_code()
53 pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len) in pmu_data() argument
59 nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu); in pmu_data()
88 struct nvbios_pmuR pmu; in pmu_load() local
91 if (!nvbios_pmuRm(bios, type, &pmu)) in pmu_load()
94 if (!post || !subdev->device->pmu) in pmu_load()
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| /linux/arch/powerpc/perf/ |
| H A D | Makefile | 7 obj64-$(CONFIG_PPC_PERF_CTRS) += ppc970-pmu.o power5-pmu.o \
8 power5+-pmu.o power6-pmu.o power7-pmu.o \
9 isa207-common.o power8-pmu.o power9-pmu.o \
10 generic-compat-pmu.o power10-pmu.o bhrb.o
11 obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
13 obj-$(CONFIG_PPC_POWERNV) += imc-pmu.o
15 obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
19 obj-$(CONFIG_VPA_PMU) += vpa-pmu.o
21 obj-$(CONFIG_KVM_BOOK3S_HV_PMU) += kvm-hv-pmu.o
23 obj-$(CONFIG_PPC_8xx) += 8xx-pmu.o
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| /linux/tools/perf/bench/ |
| H A D | pmu-scan.c | 3 * Benchmark scanning sysfs files for PMU information.
11 #include "util/pmu.h"
36 "perf bench internals pmu-scan <options>",
45 struct perf_pmu *pmu = NULL; in save_result() local
49 while ((pmu = perf_pmus__scan(pmu)) != NULL) { in save_result()
57 r->name = strdup(pmu->name); in save_result()
58 r->is_core = pmu->is_core; in save_result()
59 r->nr_caps = pmu->nr_caps; in save_result()
61 r->nr_aliases = perf_pmu__num_events(pmu); in save_result()
64 list_for_each(list, &pmu->format) in save_result()
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