| /linux/drivers/mfd/ |
| H A D | hi655x-pmic.c | 3 * Device driver for MFD hi655x PMIC
16 #include <linux/mfd/hi655x-pmic.h>
34 .name = "hi655x-pmic",
93 struct hi655x_pmic *pmic; in hi655x_pmic_probe() local
97 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); in hi655x_pmic_probe()
98 if (!pmic) in hi655x_pmic_probe()
100 pmic->dev = dev; in hi655x_pmic_probe()
106 pmic->regmap = devm_regmap_init_mmio_clk(dev, NULL, base, in hi655x_pmic_probe()
108 if (IS_ERR(pmic->regmap)) in hi655x_pmic_probe()
109 return PTR_ERR(pmic->regmap); in hi655x_pmic_probe()
[all …]
|
| H A D | intel_soc_pmic_bxtwc.c | 3 * MFD core driver for Intel Broxton Whiskey Cove PMIC
30 /* PMIC device registers */
68 /* Whiskey Cove PMIC share same ACPI ID between different platforms */
308 struct intel_soc_pmic *pmic = context; in regmap_ipc_byte_reg_read() local
310 if (!pmic) in regmap_ipc_byte_reg_read()
322 ret = intel_scu_ipc_dev_command(pmic->scu, PMC_PMIC_ACCESS, in regmap_ipc_byte_reg_read()
338 struct intel_soc_pmic *pmic = context; in regmap_ipc_byte_reg_write() local
340 if (!pmic) in regmap_ipc_byte_reg_write()
353 return intel_scu_ipc_dev_command(pmic->scu, PMC_PMIC_ACCESS, in regmap_ipc_byte_reg_write()
358 /* sysfs interfaces to r/w PMIC registers, required by initial script */
[all …]
|
| H A D | qcom-spmi-pmic.c | 17 #include <soc/qcom/qcom-spmi-pmic.h>
32 struct qcom_spmi_pmic pmic; member
70 { .compatible = "qcom,spmi-pmic", .data = N_USIDS(1) },
75 * A PMIC can be represented by multiple SPMI devices, but
76 * only the base PMIC device will contain a reference to
79 * This function takes a pointer to a pmic device and
80 * returns a pointer to the base PMIC device.
104 * number of USIDs in the PMIC array, e.g. for a PMIC with 2 USIDs in qcom_pmic_get_base_usid()
121 * If the base USID for this PMIC hasn't been in qcom_pmic_get_base_usid()
155 memcpy(&ctx->pmic, &base_ctx->pmic, sizeof(ctx->pmic)); in pmic_spmi_get_base_revid()
[all …]
|
| H A D | intel_soc_pmic_chtwc.c | 3 * MFD core driver for Intel Cherrytrail Whiskey Cove PMIC
7 * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
22 /* PMIC device registers */
30 /* Whiskey Cove PMIC share same ACPI ID between different platforms */
191 struct intel_soc_pmic *pmic; in cht_wc_probe() local
198 return dev_err_probe(dev, -ENODEV, "Failed to get PMIC hardware revision\n"); in cht_wc_probe()
200 return dev_err_probe(dev, -ENODEV, "Invalid PMIC hardware revision: %llu\n", hrv); in cht_wc_probe()
205 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); in cht_wc_probe()
206 if (!pmic) in cht_wc_probe()
211 pmic->cht_wc_model = (long)id->driver_data; in cht_wc_probe()
[all …]
|
| H A D | intel_soc_pmic_mrfld.c | 3 * Device access for Basin Cove PMIC
22 * Firmware on the systems with Basin Cove PMIC services Level 1 IRQs
76 struct intel_soc_pmic *pmic = context; in bcove_ipc_byte_reg_read() local
80 ret = intel_scu_ipc_dev_ioread8(pmic->scu, reg, &ipc_out); in bcove_ipc_byte_reg_read()
91 struct intel_soc_pmic *pmic = context; in bcove_ipc_byte_reg_write() local
94 return intel_scu_ipc_dev_iowrite8(pmic->scu, reg, ipc_in); in bcove_ipc_byte_reg_write()
108 struct intel_soc_pmic *pmic; in bcove_probe() local
112 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); in bcove_probe()
113 if (!pmic) in bcove_probe()
116 pmic->scu = devm_intel_scu_ipc_dev_get(dev); in bcove_probe()
[all …]
|
| H A D | intel_soc_pmic_crc.c | 3 * Device access for Crystal Cove PMIC
171 struct intel_soc_pmic *pmic; in crystal_cove_i2c_probe() local
179 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); in crystal_cove_i2c_probe()
180 if (!pmic) in crystal_cove_i2c_probe()
183 i2c_set_clientdata(i2c, pmic); in crystal_cove_i2c_probe()
185 pmic->regmap = devm_regmap_init_i2c(i2c, config->regmap_config); in crystal_cove_i2c_probe()
186 if (IS_ERR(pmic->regmap)) in crystal_cove_i2c_probe()
187 return PTR_ERR(pmic->regmap); in crystal_cove_i2c_probe()
189 pmic->irq = i2c->irq; in crystal_cove_i2c_probe()
191 ret = devm_regmap_add_irq_chip(dev, pmic->regmap, pmic->irq, in crystal_cove_i2c_probe()
[all …]
|
| H A D | hi6421-pmic-core.c | 3 * Device driver for Hi6421 PMIC
16 #include <linux/mfd/hi6421-pmic.h>
40 .compatible = "hisilicon,hi6421-pmic",
44 .compatible = "hisilicon,hi6421v530-pmic",
53 struct hi6421_pmic *pmic; in hi6421_pmic_probe() local
61 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); in hi6421_pmic_probe()
62 if (!pmic) in hi6421_pmic_probe()
69 pmic->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base, in hi6421_pmic_probe()
71 if (IS_ERR(pmic->regmap)) { in hi6421_pmic_probe()
73 PTR_ERR(pmic->regmap)); in hi6421_pmic_probe()
[all …]
|
| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | maxim,max8997.yaml | 22 const: maxim,max8997-pmic
33 max8997,pmic-buck1-dvs-voltage:
40 If none of max8997,pmic-buck[1/2/5]-uses-gpio-dvs optional property is
41 specified, the max8997,pmic-buck[1/2/5]-dvs-voltage property should
45 max8997,pmic-buck2-dvs-voltage:
52 If none of max8997,pmic-buck[1/2/5]-uses-gpio-dvs optional property is
53 specified, the max8997,pmic-buck[1/2/5]-dvs-voltage property should
57 max8997,pmic-buck5-dvs-voltage:
64 If none of max8997,pmic-buck[1/2/5]-uses-gpio-dvs optional property is
65 specified, the max8997,pmic-buck[1/2/5]-dvs-voltage property should
[all …]
|
| H A D | palmas-pmic.txt | 12 ti,twl6035-pmic
13 ti,twl6036-pmic
14 ti,twl6037-pmic
15 ti,tps65913-pmic
16 ti,tps65914-pmic
17 ti,tps65917-pmic
18 ti,tps659038-pmic
20 ti,palmas-pmic
35 For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP,
48 ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto,
[all …]
|
| /linux/drivers/acpi/pmic/ |
| H A D | Kconfig | 4 bool "PMIC (Power Management Integrated Circuit) operation region support"
7 region of the PMIC chip. The operation region can be used
9 PMIC chip.
14 bool "ACPI operation region support for Bay Trail Crystal Cove PMIC"
18 version of the Crystal Cove PMIC.
21 bool "ACPI operation region support for Cherry Trail Crystal Cove PMIC"
25 version of the Crystal Cove PMIC.
28 bool "ACPI operation region support for XPower AXP288 PMIC"
31 This config adds ACPI operation region support for XPower AXP288 PMIC.
34 bool "ACPI operation region support for BXT WhiskeyCove PMIC"
[all …]
|
| H A D | intel_pmic_chtcrc.c | 3 * Intel Cherry Trail Crystal Cove PMIC operation region driver
16 * We have no docs for the CHT Crystal Cove PMIC. The Asus Zenfone-2 kernel
17 * code has 2 Crystal Cove regulator drivers, one calls the PMIC a "Crystal
18 * Cove Plus" PMIC and talks about Cherry Trail, so presumably that one
24 * CHT Crystal Cove PMIC.
33 struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent); in intel_chtcrc_pmic_opregion_probe() local
35 ACPI_HANDLE(pdev->dev.parent), pmic->regmap, in intel_chtcrc_pmic_opregion_probe()
|
| /linux/drivers/regulator/ |
| H A D | tps65910-regulator.c | 391 struct tps65910_reg *pmic = rdev_get_drvdata(dev); in tps65910_set_mode() local
395 reg = pmic->get_ctrl_reg(id); in tps65910_set_mode()
416 struct tps65910_reg *pmic = rdev_get_drvdata(dev); in tps65910_get_mode() local
420 reg = pmic->get_ctrl_reg(id); in tps65910_get_mode()
514 struct tps65910_reg *pmic = rdev_get_drvdata(dev); in tps65910_get_voltage_sel() local
518 reg = pmic->get_ctrl_reg(id); in tps65910_get_voltage_sel()
557 struct tps65910_reg *pmic = rdev_get_drvdata(dev); in tps65911_get_voltage_sel() local
562 reg = pmic->get_ctrl_reg(id); in tps65911_get_voltage_sel()
634 struct tps65910_reg *pmic = rdev_get_drvdata(dev); in tps65910_set_voltage_sel() local
638 reg = pmic->get_ctrl_reg(id); in tps65910_set_voltage_sel()
[all …]
|
| H A D | max8907-regulator.c | 279 struct max8907_regulator *pmic; in max8907_regulator_probe() local
290 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); in max8907_regulator_probe()
291 if (!pmic) in max8907_regulator_probe()
294 platform_set_drvdata(pdev, pmic); in max8907_regulator_probe()
296 memcpy(pmic->desc, max8907_regulators, sizeof(pmic->desc)); in max8907_regulator_probe()
305 pmic->desc[MAX8907_SD1].min_uV = 637500; in max8907_regulator_probe()
306 pmic->desc[MAX8907_SD1].uV_step = 12500; in max8907_regulator_probe()
307 pmic->desc[MAX8907_SD1].n_voltages = in max8907_regulator_probe()
320 config.driver_data = pmic; in max8907_regulator_probe()
324 switch (pmic->desc[i].id) { in max8907_regulator_probe()
[all …]
|
| /linux/drivers/watchdog/ |
| H A D | stpmic1_wdt.c | 31 struct stpmic1 *pmic; member
39 return regmap_update_bits(wdt->pmic->regmap, in pmic_wdt_start()
47 return regmap_update_bits(wdt->pmic->regmap, in pmic_wdt_stop()
55 return regmap_update_bits(wdt->pmic->regmap, in pmic_wdt_ping()
66 return regmap_write(wdt->pmic->regmap, WCHDG_TIMER_CR, timeout - 1); in pmic_wdt_set_timeout()
71 .identity = "STPMIC1 PMIC Watchdog",
86 struct stpmic1 *pmic; in pmic_wdt_probe() local
92 pmic = dev_get_drvdata(dev->parent); in pmic_wdt_probe()
93 if (!pmic) in pmic_wdt_probe()
100 wdt->pmic = pmic; in pmic_wdt_probe()
[all …]
|
| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | maxim,max8998.yaml | 34 max8998,pmic-buck1-dvs-gpios:
39 max8998,pmic-buck2-dvs-gpio:
44 max8998,pmic-buck1-default-dvs-idx:
52 max8998,pmic-buck2-default-dvs-idx:
60 max8998,pmic-buck-voltage-lock:
65 max8998,pmic-buck1-dvs-voltage:
72 max8998,pmic-buck2-dvs-voltage:
133 max8998,pmic-buck1-dvs-gpios: [ "max8998,pmic-buck1-dvs-voltage" ]
134 max8998,pmic-buck2-dvs-gpio: [ "max8998,pmic-buck2-dvs-voltage" ]
152 pmic@66 {
[all …]
|
| H A D | rohm,bd96802-pmic.yaml | 4 $id: http://devicetree.org/schemas/mfd/rohm,bd96802-pmic.yaml#
28 The PMIC provides intb and errb IRQ lines. The errb IRQ line is used
29 for fatal IRQs which will cause the PMIC to shut down power outputs.
30 In many systems this will shut down the SoC contolling the PMIC and
32 where the SoC is not powered by the PMIC or has a short time backup
65 pmic: pmic@62 {
81 /* These can be set only when PMIC is in STBY */
|
| /linux/arch/arm/mach-omap2/ |
| H A D | vc.c | 101 * omap_vc_config_channel - configure VC channel to PMIC mappings
104 * Configures the VC channel to PMIC mappings for the following
105 * PMIC settings
142 /* Check if sufficient pmic info is available for this vdd */ in omap_vc_pre_scale()
143 if (!voltdm->pmic) { in omap_vc_pre_scale()
144 pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", in omap_vc_pre_scale()
149 if (!voltdm->pmic->uv_to_vsel) { in omap_vc_pre_scale()
150 …pr_err("%s: PMIC function to convert voltage in uV to vsel not registered. Hence unable to scale v… in omap_vc_pre_scale()
161 *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); in omap_vc_pre_scale()
162 *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt); in omap_vc_pre_scale()
[all …]
|
| H A D | voltage.h | 25 * passed from board or PMIC file
69 struct omap_voltdm_pmic *pmic; member
109 * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
110 * @slew_rate: PMIC slew rate (in uv/us)
111 * @step_size: PMIC voltage step size (in uv)
112 * @i2c_slave_addr: I2C slave address of PMIC
115 * @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC
117 * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV.
118 * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value.
156 struct omap_voltdm_pmic *pmic);
|
| /linux/arch/x86/include/asm/ |
| H A D | iosf_mbi.h | 102 * One some systems the P-Unit accesses the PMIC to change various voltages
106 * the PMIC bus while another driver is also accessing the PMIC bus various bad
110 * access the PMIC, be it through iosf_mbi* functions or through other means.
111 * This function will block all kernel access to the PMIC I2C bus, so that the
112 * P-Unit can safely access the PMIC over the shared I2C bus.
115 * P-Unit for exclusive access to the PMIC bus when i2c drivers are accessing
129 * iosf_mbi_block_punit_i2c_access() - Block P-Unit accesses to the PMIC bus
131 * Call this function to block P-Unit access to the PMIC I2C bus, so that the
132 * kernel can safely access the PMIC over the shared I2C bus.
147 * iosf_mbi_unblock_punit_i2c_access() - Release PMIC I2C bus block
[all …]
|
| /linux/Documentation/devicetree/bindings/spmi/ |
| H A D | qcom,glymur-spmi-pmic-arb.yaml | 4 $id: http://devicetree.org/schemas/spmi/qcom,glymur-spmi-pmic-arb.yaml#
7 title: Qualcomm Technologies, Inc. Glymur SPMI Controller (PMIC Arbiter v8)
13 The Glymur SPMI PMIC Arbiter implements HW version 8 and it's an SPMI
17 The PMIC Arbiter can also act as an interrupt controller, providing interrupts
21 - $ref: /schemas/spmi/qcom,spmi-pmic-arb-common.yaml
28 - qcom,hawi-spmi-pmic-arb
29 - qcom,kaanapali-spmi-pmic-arb
30 - const: qcom,glymur-spmi-pmic-arb
32 - qcom,glymur-spmi-pmic-arb
39 - description: channel to PMIC peripheral mapping registers
[all …]
|
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc8180x-pmics.dtsi | 69 pmc8180_0: pmic@0 {
70 compatible = "qcom,pm8150", "qcom,spmi-pmic";
153 pmic@1 {
154 compatible = "qcom,pmc8180", "qcom,spmi-pmic";
160 pmic@2 {
161 compatible = "qcom,smb2351", "qcom,spmi-pmic";
194 pmic@6 {
195 compatible = "qcom,pm8150c", "qcom,spmi-pmic";
201 pmc8180_2: pmic@8 {
202 compatible = "qcom,pm8150", "qcom,spmi-pmic";
[all …]
|
| H A D | sa8540p-pmics.dtsi | 11 pmm8540a: pmic@0 {
12 compatible = "qcom,pm8150", "qcom,spmi-pmic";
36 pmm8540c: pmic@4 {
37 compatible = "qcom,pm8150", "qcom,spmi-pmic";
62 pmm8540e: pmic@8 {
63 compatible = "qcom,pm8150", "qcom,spmi-pmic";
79 pmm8540g: pmic@c {
80 compatible = "qcom,pm8150", "qcom,spmi-pmic";
|
| /linux/drivers/thermal/qcom/ |
| H A D | Kconfig | 14 tristate "Qualcomm SPMI PMIC Thermal Monitor ADC5"
25 tristate "Qualcomm SPMI PMIC MBG Temperature monitor"
29 This enables Qualcomm PMIC MBG (Master Bandgap) thermal monitor.
31 The MBG block monitors PMIC die temperature in hardware and raises an
39 tristate "Qualcomm SPMI PMIC Thermal Monitor ADC5 Gen3"
48 tristate "Qualcomm SPMI PMIC Temperature Alarm"
53 PMIC devices. It shows up in sysfs as a thermal sensor with multiple
|
| /linux/drivers/spmi/ |
| H A D | Kconfig | 10 and Power Management Integrated Circuits (PMIC).
29 built-in SPMI PMIC Arbiter interface on Hisilicon 3670
33 tristate "Qualcomm MSM SPMI Controller (PMIC Arbiter)"
40 built-in SPMI PMIC Arbiter interface on Qualcomm MSM family
47 tristate "Mediatek SPMI Controller (PMIC Arbiter)"
51 built-in SPMI PMIC Arbiter interface on Mediatek family
|
| /linux/Documentation/devicetree/bindings/soc/mediatek/ |
| H A D | mediatek,pwrap.yaml | 7 title: Mediatek PMIC Wrapper
14 On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
15 is not directly visible to the CPU, but only through the PMIC wrapper
16 inside the SoC. The communication between the SoC and the PMIC can
22 On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
62 - description: PMIC wrapper registers
93 - description: PMIC wrapper reset
105 pmic:
|