xref: /linux/drivers/regulator/palmas-regulator.c (revision 06d07429858317ded2db7986113a9e0129cd599b)
12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2e5ce4208SGraeme Gregory /*
3e5ce4208SGraeme Gregory  * Driver for Regulator part of Palmas PMIC Chips
4e5ce4208SGraeme Gregory  *
57be859f7SGraeme Gregory  * Copyright 2011-2013 Texas Instruments Inc.
6e5ce4208SGraeme Gregory  *
7e5ce4208SGraeme Gregory  * Author: Graeme Gregory <gg@slimlogic.co.uk>
8a7dddf27SGraeme Gregory  * Author: Ian Lartey <ian@slimlogic.co.uk>
9e5ce4208SGraeme Gregory  */
10e5ce4208SGraeme Gregory 
11e5ce4208SGraeme Gregory #include <linux/kernel.h>
12e5ce4208SGraeme Gregory #include <linux/module.h>
13e5ce4208SGraeme Gregory #include <linux/init.h>
14e5ce4208SGraeme Gregory #include <linux/err.h>
15e5ce4208SGraeme Gregory #include <linux/platform_device.h>
16e5ce4208SGraeme Gregory #include <linux/regulator/driver.h>
17e5ce4208SGraeme Gregory #include <linux/regulator/machine.h>
18e5ce4208SGraeme Gregory #include <linux/slab.h>
19e5ce4208SGraeme Gregory #include <linux/regmap.h>
20e5ce4208SGraeme Gregory #include <linux/mfd/palmas.h>
21a361cd9fSGraeme Gregory #include <linux/of.h>
22a361cd9fSGraeme Gregory #include <linux/regulator/of_regulator.h>
23e5ce4208SGraeme Gregory 
2460ab7f41SMatti Vaittinen static const struct linear_range smps_low_ranges[] = {
256b7f2d82SNishanth Menon 	REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
26dbabd624SKeerthy 	REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
27dbabd624SKeerthy 	REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
28dbabd624SKeerthy 	REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
29dbabd624SKeerthy };
30dbabd624SKeerthy 
3160ab7f41SMatti Vaittinen static const struct linear_range smps_high_ranges[] = {
326b7f2d82SNishanth Menon 	REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
33dbabd624SKeerthy 	REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
34dbabd624SKeerthy 	REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
35dbabd624SKeerthy 	REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
36dbabd624SKeerthy };
37dbabd624SKeerthy 
386839cd6fSNishanth Menon static struct palmas_regs_info palmas_generic_regs_info[] = {
39e5ce4208SGraeme Gregory 	{
40e5ce4208SGraeme Gregory 		.name		= "SMPS12",
41504382c9SLaxman Dewangan 		.sname		= "smps1-in",
42e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS12_VOLTAGE,
43e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS12_CTRL,
44e5ce4208SGraeme Gregory 		.tstep_addr	= PALMAS_SMPS12_TSTEP,
4532b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
46e5ce4208SGraeme Gregory 	},
47e5ce4208SGraeme Gregory 	{
48e5ce4208SGraeme Gregory 		.name		= "SMPS123",
49504382c9SLaxman Dewangan 		.sname		= "smps1-in",
50e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS12_VOLTAGE,
51e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS12_CTRL,
52e5ce4208SGraeme Gregory 		.tstep_addr	= PALMAS_SMPS12_TSTEP,
5332b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
54e5ce4208SGraeme Gregory 	},
55e5ce4208SGraeme Gregory 	{
56e5ce4208SGraeme Gregory 		.name		= "SMPS3",
57504382c9SLaxman Dewangan 		.sname		= "smps3-in",
58e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS3_VOLTAGE,
59e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS3_CTRL,
6032b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
61e5ce4208SGraeme Gregory 	},
62e5ce4208SGraeme Gregory 	{
63e5ce4208SGraeme Gregory 		.name		= "SMPS45",
64504382c9SLaxman Dewangan 		.sname		= "smps4-in",
65e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS45_VOLTAGE,
66e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS45_CTRL,
67e5ce4208SGraeme Gregory 		.tstep_addr	= PALMAS_SMPS45_TSTEP,
6832b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
69e5ce4208SGraeme Gregory 	},
70e5ce4208SGraeme Gregory 	{
71e5ce4208SGraeme Gregory 		.name		= "SMPS457",
72504382c9SLaxman Dewangan 		.sname		= "smps4-in",
73e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS45_VOLTAGE,
74e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS45_CTRL,
75e5ce4208SGraeme Gregory 		.tstep_addr	= PALMAS_SMPS45_TSTEP,
7632b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
77e5ce4208SGraeme Gregory 	},
78e5ce4208SGraeme Gregory 	{
79e5ce4208SGraeme Gregory 		.name		= "SMPS6",
80504382c9SLaxman Dewangan 		.sname		= "smps6-in",
81e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS6_VOLTAGE,
82e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS6_CTRL,
83e5ce4208SGraeme Gregory 		.tstep_addr	= PALMAS_SMPS6_TSTEP,
8432b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
85e5ce4208SGraeme Gregory 	},
86e5ce4208SGraeme Gregory 	{
87e5ce4208SGraeme Gregory 		.name		= "SMPS7",
88504382c9SLaxman Dewangan 		.sname		= "smps7-in",
89e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS7_VOLTAGE,
90e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS7_CTRL,
9132b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
92e5ce4208SGraeme Gregory 	},
93e5ce4208SGraeme Gregory 	{
94e5ce4208SGraeme Gregory 		.name		= "SMPS8",
95504382c9SLaxman Dewangan 		.sname		= "smps8-in",
96e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS8_VOLTAGE,
97e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS8_CTRL,
98e5ce4208SGraeme Gregory 		.tstep_addr	= PALMAS_SMPS8_TSTEP,
9932b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
100e5ce4208SGraeme Gregory 	},
101e5ce4208SGraeme Gregory 	{
102e5ce4208SGraeme Gregory 		.name		= "SMPS9",
103504382c9SLaxman Dewangan 		.sname		= "smps9-in",
104e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_SMPS9_VOLTAGE,
105e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_SMPS9_CTRL,
10632b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
107e5ce4208SGraeme Gregory 	},
108e5ce4208SGraeme Gregory 	{
10977409d9bSKishon Vijay Abraham I 		.name		= "SMPS10_OUT2",
110504382c9SLaxman Dewangan 		.sname		= "smps10-in",
111e31089c6SAxel Lin 		.ctrl_addr	= PALMAS_SMPS10_CTRL,
11232b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
113e5ce4208SGraeme Gregory 	},
114e5ce4208SGraeme Gregory 	{
11577409d9bSKishon Vijay Abraham I 		.name		= "SMPS10_OUT1",
11677409d9bSKishon Vijay Abraham I 		.sname		= "smps10-out2",
11777409d9bSKishon Vijay Abraham I 		.ctrl_addr	= PALMAS_SMPS10_CTRL,
11832b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
11977409d9bSKishon Vijay Abraham I 	},
12077409d9bSKishon Vijay Abraham I 	{
121e5ce4208SGraeme Gregory 		.name		= "LDO1",
122504382c9SLaxman Dewangan 		.sname		= "ldo1-in",
123e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO1_VOLTAGE,
124e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO1_CTRL,
12532b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO1,
126e5ce4208SGraeme Gregory 	},
127e5ce4208SGraeme Gregory 	{
128e5ce4208SGraeme Gregory 		.name		= "LDO2",
129504382c9SLaxman Dewangan 		.sname		= "ldo2-in",
130e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO2_VOLTAGE,
131e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO2_CTRL,
13232b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO2,
133e5ce4208SGraeme Gregory 	},
134e5ce4208SGraeme Gregory 	{
135e5ce4208SGraeme Gregory 		.name		= "LDO3",
136504382c9SLaxman Dewangan 		.sname		= "ldo3-in",
137e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO3_VOLTAGE,
138e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO3_CTRL,
13932b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO3,
140e5ce4208SGraeme Gregory 	},
141e5ce4208SGraeme Gregory 	{
142e5ce4208SGraeme Gregory 		.name		= "LDO4",
143504382c9SLaxman Dewangan 		.sname		= "ldo4-in",
144e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO4_VOLTAGE,
145e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO4_CTRL,
14632b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO4,
147e5ce4208SGraeme Gregory 	},
148e5ce4208SGraeme Gregory 	{
149e5ce4208SGraeme Gregory 		.name		= "LDO5",
150504382c9SLaxman Dewangan 		.sname		= "ldo5-in",
151e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO5_VOLTAGE,
152e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO5_CTRL,
15332b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO5,
154e5ce4208SGraeme Gregory 	},
155e5ce4208SGraeme Gregory 	{
156e5ce4208SGraeme Gregory 		.name		= "LDO6",
157504382c9SLaxman Dewangan 		.sname		= "ldo6-in",
158e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO6_VOLTAGE,
159e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO6_CTRL,
16032b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO6,
161e5ce4208SGraeme Gregory 	},
162e5ce4208SGraeme Gregory 	{
163e5ce4208SGraeme Gregory 		.name		= "LDO7",
164504382c9SLaxman Dewangan 		.sname		= "ldo7-in",
165e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO7_VOLTAGE,
166e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO7_CTRL,
16732b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO7,
168e5ce4208SGraeme Gregory 	},
169e5ce4208SGraeme Gregory 	{
170e5ce4208SGraeme Gregory 		.name		= "LDO8",
171504382c9SLaxman Dewangan 		.sname		= "ldo8-in",
172e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO8_VOLTAGE,
173e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO8_CTRL,
17432b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO8,
175e5ce4208SGraeme Gregory 	},
176e5ce4208SGraeme Gregory 	{
177e5ce4208SGraeme Gregory 		.name		= "LDO9",
178504382c9SLaxman Dewangan 		.sname		= "ldo9-in",
179e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDO9_VOLTAGE,
180e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDO9_CTRL,
18132b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO9,
182e5ce4208SGraeme Gregory 	},
183e5ce4208SGraeme Gregory 	{
184e5ce4208SGraeme Gregory 		.name		= "LDOLN",
185504382c9SLaxman Dewangan 		.sname		= "ldoln-in",
186e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDOLN_VOLTAGE,
187e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDOLN_CTRL,
18832b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
189e5ce4208SGraeme Gregory 	},
190e5ce4208SGraeme Gregory 	{
191e5ce4208SGraeme Gregory 		.name		= "LDOUSB",
192504382c9SLaxman Dewangan 		.sname		= "ldousb-in",
193e5ce4208SGraeme Gregory 		.vsel_addr	= PALMAS_LDOUSB_VOLTAGE,
194e5ce4208SGraeme Gregory 		.ctrl_addr	= PALMAS_LDOUSB_CTRL,
19532b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
196e5ce4208SGraeme Gregory 	},
197aa07f027SLaxman Dewangan 	{
198aa07f027SLaxman Dewangan 		.name		= "REGEN1",
199aa07f027SLaxman Dewangan 		.ctrl_addr	= PALMAS_REGEN1_CTRL,
20032b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
201aa07f027SLaxman Dewangan 	},
202aa07f027SLaxman Dewangan 	{
203aa07f027SLaxman Dewangan 		.name		= "REGEN2",
204aa07f027SLaxman Dewangan 		.ctrl_addr	= PALMAS_REGEN2_CTRL,
20532b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
206aa07f027SLaxman Dewangan 	},
207aa07f027SLaxman Dewangan 	{
208aa07f027SLaxman Dewangan 		.name		= "REGEN3",
209aa07f027SLaxman Dewangan 		.ctrl_addr	= PALMAS_REGEN3_CTRL,
21032b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
211aa07f027SLaxman Dewangan 	},
212aa07f027SLaxman Dewangan 	{
213aa07f027SLaxman Dewangan 		.name		= "SYSEN1",
214aa07f027SLaxman Dewangan 		.ctrl_addr	= PALMAS_SYSEN1_CTRL,
21532b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
216aa07f027SLaxman Dewangan 	},
217aa07f027SLaxman Dewangan 	{
218aa07f027SLaxman Dewangan 		.name		= "SYSEN2",
219aa07f027SLaxman Dewangan 		.ctrl_addr	= PALMAS_SYSEN2_CTRL,
22032b6d3f6SLaxman Dewangan 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
221aa07f027SLaxman Dewangan 	},
222e5ce4208SGraeme Gregory };
223e5ce4208SGraeme Gregory 
224e7cf34efSNishanth Menon static struct palmas_regs_info tps65917_regs_info[] = {
225d6f83370SKeerthy 	{
226d6f83370SKeerthy 		.name		= "SMPS1",
227d6f83370SKeerthy 		.sname		= "smps1-in",
228d6f83370SKeerthy 		.vsel_addr	= TPS65917_SMPS1_VOLTAGE,
229d6f83370SKeerthy 		.ctrl_addr	= TPS65917_SMPS1_CTRL,
230d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
231d6f83370SKeerthy 	},
232d6f83370SKeerthy 	{
233d6f83370SKeerthy 		.name		= "SMPS2",
234d6f83370SKeerthy 		.sname		= "smps2-in",
235d6f83370SKeerthy 		.vsel_addr	= TPS65917_SMPS2_VOLTAGE,
236d6f83370SKeerthy 		.ctrl_addr	= TPS65917_SMPS2_CTRL,
237d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
238d6f83370SKeerthy 	},
239d6f83370SKeerthy 	{
240d6f83370SKeerthy 		.name		= "SMPS3",
241d6f83370SKeerthy 		.sname		= "smps3-in",
242d6f83370SKeerthy 		.vsel_addr	= TPS65917_SMPS3_VOLTAGE,
243d6f83370SKeerthy 		.ctrl_addr	= TPS65917_SMPS3_CTRL,
244d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
245d6f83370SKeerthy 	},
246d6f83370SKeerthy 	{
247d6f83370SKeerthy 		.name		= "SMPS4",
248d6f83370SKeerthy 		.sname		= "smps4-in",
249d6f83370SKeerthy 		.vsel_addr	= TPS65917_SMPS4_VOLTAGE,
250d6f83370SKeerthy 		.ctrl_addr	= TPS65917_SMPS4_CTRL,
251d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
252d6f83370SKeerthy 	},
253d6f83370SKeerthy 	{
254d6f83370SKeerthy 		.name		= "SMPS5",
255d6f83370SKeerthy 		.sname		= "smps5-in",
256d6f83370SKeerthy 		.vsel_addr	= TPS65917_SMPS5_VOLTAGE,
257d6f83370SKeerthy 		.ctrl_addr	= TPS65917_SMPS5_CTRL,
258d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
259d6f83370SKeerthy 	},
260d6f83370SKeerthy 	{
261be035303SKeerthy 		.name		= "SMPS12",
262be035303SKeerthy 		.sname		= "smps1-in",
263be035303SKeerthy 		.vsel_addr	= TPS65917_SMPS1_VOLTAGE,
264be035303SKeerthy 		.ctrl_addr	= TPS65917_SMPS1_CTRL,
265be035303SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS12,
266be035303SKeerthy 	},
267be035303SKeerthy 	{
268d6f83370SKeerthy 		.name		= "LDO1",
269d6f83370SKeerthy 		.sname		= "ldo1-in",
270d6f83370SKeerthy 		.vsel_addr	= TPS65917_LDO1_VOLTAGE,
271d6f83370SKeerthy 		.ctrl_addr	= TPS65917_LDO1_CTRL,
272d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO1,
273d6f83370SKeerthy 	},
274d6f83370SKeerthy 	{
275d6f83370SKeerthy 		.name		= "LDO2",
276d6f83370SKeerthy 		.sname		= "ldo2-in",
277d6f83370SKeerthy 		.vsel_addr	= TPS65917_LDO2_VOLTAGE,
278d6f83370SKeerthy 		.ctrl_addr	= TPS65917_LDO2_CTRL,
279d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO2,
280d6f83370SKeerthy 	},
281d6f83370SKeerthy 	{
282d6f83370SKeerthy 		.name		= "LDO3",
283d6f83370SKeerthy 		.sname		= "ldo3-in",
284d6f83370SKeerthy 		.vsel_addr	= TPS65917_LDO3_VOLTAGE,
285d6f83370SKeerthy 		.ctrl_addr	= TPS65917_LDO3_CTRL,
286d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO3,
287d6f83370SKeerthy 	},
288d6f83370SKeerthy 	{
289d6f83370SKeerthy 		.name		= "LDO4",
290d6f83370SKeerthy 		.sname		= "ldo4-in",
291d6f83370SKeerthy 		.vsel_addr	= TPS65917_LDO4_VOLTAGE,
292d6f83370SKeerthy 		.ctrl_addr	= TPS65917_LDO4_CTRL,
293d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO4,
294d6f83370SKeerthy 	},
295d6f83370SKeerthy 	{
296d6f83370SKeerthy 		.name		= "LDO5",
297d6f83370SKeerthy 		.sname		= "ldo5-in",
298d6f83370SKeerthy 		.vsel_addr	= TPS65917_LDO5_VOLTAGE,
299d6f83370SKeerthy 		.ctrl_addr	= TPS65917_LDO5_CTRL,
300d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO5,
301d6f83370SKeerthy 	},
302d6f83370SKeerthy 	{
303d6f83370SKeerthy 		.name		= "REGEN1",
304d6f83370SKeerthy 		.ctrl_addr	= TPS65917_REGEN1_CTRL,
305d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
306d6f83370SKeerthy 	},
307d6f83370SKeerthy 	{
308d6f83370SKeerthy 		.name		= "REGEN2",
309d6f83370SKeerthy 		.ctrl_addr	= TPS65917_REGEN2_CTRL,
310d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
311d6f83370SKeerthy 	},
312d6f83370SKeerthy 	{
313d6f83370SKeerthy 		.name		= "REGEN3",
314d6f83370SKeerthy 		.ctrl_addr	= TPS65917_REGEN3_CTRL,
315d6f83370SKeerthy 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
316d6f83370SKeerthy 	},
317d6f83370SKeerthy };
318d6f83370SKeerthy 
319cac9e916SKeerthy #define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
320cac9e916SKeerthy 	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
321cac9e916SKeerthy 		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
322cac9e916SKeerthy 		.reg_offset = _offset,			\
323cac9e916SKeerthy 		.bit_pos = _pos,			\
324cac9e916SKeerthy 	}
325cac9e916SKeerthy 
3264b09e17bSNishanth Menon static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
327cac9e916SKeerthy 	EXTERNAL_REQUESTOR(REGEN1, 0, 0),
328cac9e916SKeerthy 	EXTERNAL_REQUESTOR(REGEN2, 0, 1),
329cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
330cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
331cac9e916SKeerthy 	EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
332cac9e916SKeerthy 	EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
333cac9e916SKeerthy 	EXTERNAL_REQUESTOR(REGEN3, 0, 6),
334cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SMPS12, 1, 0),
335cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SMPS3, 1, 1),
336cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SMPS45, 1, 2),
337cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SMPS6, 1, 3),
338cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SMPS7, 1, 4),
339cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SMPS8, 1, 5),
340cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SMPS9, 1, 6),
341cac9e916SKeerthy 	EXTERNAL_REQUESTOR(SMPS10, 1, 7),
342cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO1, 2, 0),
343cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO2, 2, 1),
344cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO3, 2, 2),
345cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO4, 2, 3),
346cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO5, 2, 4),
347cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO6, 2, 5),
348cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO7, 2, 6),
349cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO8, 2, 7),
350cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDO9, 3, 0),
351cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDOLN, 3, 1),
352cac9e916SKeerthy 	EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
353cac9e916SKeerthy };
354cac9e916SKeerthy 
355d6f83370SKeerthy #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos)		\
356d6f83370SKeerthy 	[TPS65917_EXTERNAL_REQSTR_ID_##_id] = {		\
357d6f83370SKeerthy 		.id = TPS65917_EXTERNAL_REQSTR_ID_##_id,	\
358d6f83370SKeerthy 		.reg_offset = _offset,			\
359d6f83370SKeerthy 		.bit_pos = _pos,			\
360d6f83370SKeerthy 	}
361d6f83370SKeerthy 
362d6f83370SKeerthy static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
363d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
364d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
365d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
366d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
367d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
368d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
369d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
370d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
371be035303SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5),
372d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
373d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
374d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
375d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
376d6f83370SKeerthy 	EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
377d6f83370SKeerthy };
378d6f83370SKeerthy 
379ad542a52SAxel Lin static const unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
38028d1e8cdSLaxman Dewangan 
381e5ce4208SGraeme Gregory #define SMPS_CTRL_MODE_OFF		0x00
382e5ce4208SGraeme Gregory #define SMPS_CTRL_MODE_ON		0x01
383e5ce4208SGraeme Gregory #define SMPS_CTRL_MODE_ECO		0x02
384e5ce4208SGraeme Gregory #define SMPS_CTRL_MODE_PWM		0x03
385e5ce4208SGraeme Gregory 
3860f45aa84SLaxman Dewangan #define PALMAS_SMPS_NUM_VOLTAGES	122
387e5ce4208SGraeme Gregory #define PALMAS_SMPS10_NUM_VOLTAGES	2
388e5ce4208SGraeme Gregory #define PALMAS_LDO_NUM_VOLTAGES		50
389e5ce4208SGraeme Gregory 
390e5ce4208SGraeme Gregory #define SMPS10_VSEL			(1<<3)
391e5ce4208SGraeme Gregory #define SMPS10_BOOST_EN			(1<<2)
392e5ce4208SGraeme Gregory #define SMPS10_BYPASS_EN		(1<<1)
393e5ce4208SGraeme Gregory #define SMPS10_SWITCH_EN		(1<<0)
394e5ce4208SGraeme Gregory 
395e5ce4208SGraeme Gregory #define REGULATOR_SLAVE			0
396e5ce4208SGraeme Gregory 
palmas_smps_read(struct palmas * palmas,unsigned int reg,unsigned int * dest)397e5ce4208SGraeme Gregory static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
398e5ce4208SGraeme Gregory 		unsigned int *dest)
399e5ce4208SGraeme Gregory {
400e5ce4208SGraeme Gregory 	unsigned int addr;
401e5ce4208SGraeme Gregory 
402e5ce4208SGraeme Gregory 	addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
403e5ce4208SGraeme Gregory 
404e5ce4208SGraeme Gregory 	return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
405e5ce4208SGraeme Gregory }
406e5ce4208SGraeme Gregory 
palmas_smps_write(struct palmas * palmas,unsigned int reg,unsigned int value)407e5ce4208SGraeme Gregory static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
408e5ce4208SGraeme Gregory 		unsigned int value)
409e5ce4208SGraeme Gregory {
410e5ce4208SGraeme Gregory 	unsigned int addr;
411e5ce4208SGraeme Gregory 
412e5ce4208SGraeme Gregory 	addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
413e5ce4208SGraeme Gregory 
414e5ce4208SGraeme Gregory 	return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
415e5ce4208SGraeme Gregory }
416e5ce4208SGraeme Gregory 
palmas_ldo_read(struct palmas * palmas,unsigned int reg,unsigned int * dest)417e5ce4208SGraeme Gregory static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
418e5ce4208SGraeme Gregory 		unsigned int *dest)
419e5ce4208SGraeme Gregory {
420e5ce4208SGraeme Gregory 	unsigned int addr;
421e5ce4208SGraeme Gregory 
422e5ce4208SGraeme Gregory 	addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
423e5ce4208SGraeme Gregory 
424e5ce4208SGraeme Gregory 	return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
425e5ce4208SGraeme Gregory }
426e5ce4208SGraeme Gregory 
palmas_ldo_write(struct palmas * palmas,unsigned int reg,unsigned int value)427e5ce4208SGraeme Gregory static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
428e5ce4208SGraeme Gregory 		unsigned int value)
429e5ce4208SGraeme Gregory {
430e5ce4208SGraeme Gregory 	unsigned int addr;
431e5ce4208SGraeme Gregory 
432e5ce4208SGraeme Gregory 	addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
433e5ce4208SGraeme Gregory 
434e5ce4208SGraeme Gregory 	return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
435e5ce4208SGraeme Gregory }
436e5ce4208SGraeme Gregory 
palmas_set_mode_smps(struct regulator_dev * dev,unsigned int mode)437e5ce4208SGraeme Gregory static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
438e5ce4208SGraeme Gregory {
439cf910b6bSNishanth Menon 	int id = rdev_get_id(dev);
440966e927bSKangjie Lu 	int ret;
441e5ce4208SGraeme Gregory 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
442cac9e916SKeerthy 	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
443cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
444e5ce4208SGraeme Gregory 	unsigned int reg;
44551d3a0c9SLaxman Dewangan 	bool rail_enable = true;
446e5ce4208SGraeme Gregory 
447966e927bSKangjie Lu 	ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg);
448966e927bSKangjie Lu 	if (ret)
449966e927bSKangjie Lu 		return ret;
450cac9e916SKeerthy 
451999f0c7cSAxel Lin 	reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
452e5ce4208SGraeme Gregory 
45351d3a0c9SLaxman Dewangan 	if (reg == SMPS_CTRL_MODE_OFF)
45451d3a0c9SLaxman Dewangan 		rail_enable = false;
45551d3a0c9SLaxman Dewangan 
456e5ce4208SGraeme Gregory 	switch (mode) {
457e5ce4208SGraeme Gregory 	case REGULATOR_MODE_NORMAL:
458e5ce4208SGraeme Gregory 		reg |= SMPS_CTRL_MODE_ON;
459e5ce4208SGraeme Gregory 		break;
460e5ce4208SGraeme Gregory 	case REGULATOR_MODE_IDLE:
461e5ce4208SGraeme Gregory 		reg |= SMPS_CTRL_MODE_ECO;
462e5ce4208SGraeme Gregory 		break;
463e5ce4208SGraeme Gregory 	case REGULATOR_MODE_FAST:
464e5ce4208SGraeme Gregory 		reg |= SMPS_CTRL_MODE_PWM;
465e5ce4208SGraeme Gregory 		break;
466e5ce4208SGraeme Gregory 	default:
467e5ce4208SGraeme Gregory 		return -EINVAL;
468e5ce4208SGraeme Gregory 	}
469e5ce4208SGraeme Gregory 
47051d3a0c9SLaxman Dewangan 	pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
47151d3a0c9SLaxman Dewangan 	if (rail_enable)
472cf910b6bSNishanth Menon 		palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
473318dbb02SNishanth Menon 
474318dbb02SNishanth Menon 	/* Switch the enable value to ensure this is used for enable */
475318dbb02SNishanth Menon 	pmic->desc[id].enable_val = pmic->current_reg_mode[id];
476318dbb02SNishanth Menon 
477e5ce4208SGraeme Gregory 	return 0;
478e5ce4208SGraeme Gregory }
479e5ce4208SGraeme Gregory 
palmas_get_mode_smps(struct regulator_dev * dev)480e5ce4208SGraeme Gregory static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
481e5ce4208SGraeme Gregory {
482e5ce4208SGraeme Gregory 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
483e5ce4208SGraeme Gregory 	int id = rdev_get_id(dev);
484e5ce4208SGraeme Gregory 	unsigned int reg;
485e5ce4208SGraeme Gregory 
48651d3a0c9SLaxman Dewangan 	reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
487e5ce4208SGraeme Gregory 
488e5ce4208SGraeme Gregory 	switch (reg) {
489e5ce4208SGraeme Gregory 	case SMPS_CTRL_MODE_ON:
490e5ce4208SGraeme Gregory 		return REGULATOR_MODE_NORMAL;
491e5ce4208SGraeme Gregory 	case SMPS_CTRL_MODE_ECO:
492e5ce4208SGraeme Gregory 		return REGULATOR_MODE_IDLE;
493e5ce4208SGraeme Gregory 	case SMPS_CTRL_MODE_PWM:
494e5ce4208SGraeme Gregory 		return REGULATOR_MODE_FAST;
495e5ce4208SGraeme Gregory 	}
496e5ce4208SGraeme Gregory 
497e5ce4208SGraeme Gregory 	return 0;
498e5ce4208SGraeme Gregory }
499e5ce4208SGraeme Gregory 
palmas_smps_set_ramp_delay(struct regulator_dev * rdev,int ramp_delay)50028d1e8cdSLaxman Dewangan static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
50128d1e8cdSLaxman Dewangan 		 int ramp_delay)
50228d1e8cdSLaxman Dewangan {
503cf910b6bSNishanth Menon 	int id = rdev_get_id(rdev);
50428d1e8cdSLaxman Dewangan 	struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
505cac9e916SKeerthy 	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
506cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
50728d1e8cdSLaxman Dewangan 	unsigned int reg = 0;
50828d1e8cdSLaxman Dewangan 	int ret;
50928d1e8cdSLaxman Dewangan 
510f22c2baeSAxel Lin 	/* SMPS3 and SMPS7 do not have tstep_addr setting */
511f22c2baeSAxel Lin 	switch (id) {
512f22c2baeSAxel Lin 	case PALMAS_REG_SMPS3:
513f22c2baeSAxel Lin 	case PALMAS_REG_SMPS7:
514f22c2baeSAxel Lin 		return 0;
515f22c2baeSAxel Lin 	}
516f22c2baeSAxel Lin 
51728d1e8cdSLaxman Dewangan 	if (ramp_delay <= 0)
51828d1e8cdSLaxman Dewangan 		reg = 0;
5190ea34b57SAxel Lin 	else if (ramp_delay <= 2500)
52028d1e8cdSLaxman Dewangan 		reg = 3;
5210ea34b57SAxel Lin 	else if (ramp_delay <= 5000)
52228d1e8cdSLaxman Dewangan 		reg = 2;
52328d1e8cdSLaxman Dewangan 	else
52428d1e8cdSLaxman Dewangan 		reg = 1;
52528d1e8cdSLaxman Dewangan 
526cf910b6bSNishanth Menon 	ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
52728d1e8cdSLaxman Dewangan 	if (ret < 0) {
52828d1e8cdSLaxman Dewangan 		dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
52928d1e8cdSLaxman Dewangan 		return ret;
53028d1e8cdSLaxman Dewangan 	}
53128d1e8cdSLaxman Dewangan 
53228d1e8cdSLaxman Dewangan 	pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
53328d1e8cdSLaxman Dewangan 	return ret;
53428d1e8cdSLaxman Dewangan }
53528d1e8cdSLaxman Dewangan 
5360e5a7680SBhumika Goyal static const struct regulator_ops palmas_ops_smps = {
537dbabd624SKeerthy 	.is_enabled		= regulator_is_enabled_regmap,
538dbabd624SKeerthy 	.enable			= regulator_enable_regmap,
539dbabd624SKeerthy 	.disable		= regulator_disable_regmap,
540e5ce4208SGraeme Gregory 	.set_mode		= palmas_set_mode_smps,
541e5ce4208SGraeme Gregory 	.get_mode		= palmas_get_mode_smps,
542bdc4baacSAxel Lin 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
543bdc4baacSAxel Lin 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
544dbabd624SKeerthy 	.list_voltage		= regulator_list_voltage_linear_range,
545dbabd624SKeerthy 	.map_voltage		= regulator_map_voltage_linear_range,
546dbabd624SKeerthy 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
54728d1e8cdSLaxman Dewangan 	.set_ramp_delay		= palmas_smps_set_ramp_delay,
548e5ce4208SGraeme Gregory };
549e5ce4208SGraeme Gregory 
5500e5a7680SBhumika Goyal static const struct regulator_ops palmas_ops_ext_control_smps = {
55132b6d3f6SLaxman Dewangan 	.set_mode		= palmas_set_mode_smps,
55232b6d3f6SLaxman Dewangan 	.get_mode		= palmas_get_mode_smps,
55332b6d3f6SLaxman Dewangan 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
55432b6d3f6SLaxman Dewangan 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
555dbabd624SKeerthy 	.list_voltage		= regulator_list_voltage_linear_range,
556dbabd624SKeerthy 	.map_voltage		= regulator_map_voltage_linear_range,
557dbabd624SKeerthy 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
55832b6d3f6SLaxman Dewangan 	.set_ramp_delay		= palmas_smps_set_ramp_delay,
55932b6d3f6SLaxman Dewangan };
56032b6d3f6SLaxman Dewangan 
5610e5a7680SBhumika Goyal static const struct regulator_ops palmas_ops_smps10 = {
562e5ce4208SGraeme Gregory 	.is_enabled		= regulator_is_enabled_regmap,
563e5ce4208SGraeme Gregory 	.enable			= regulator_enable_regmap,
564e5ce4208SGraeme Gregory 	.disable		= regulator_disable_regmap,
565e5ce4208SGraeme Gregory 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
566e5ce4208SGraeme Gregory 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
5678029a006SAxel Lin 	.list_voltage		= regulator_list_voltage_linear,
5688029a006SAxel Lin 	.map_voltage		= regulator_map_voltage_linear,
56977409d9bSKishon Vijay Abraham I 	.set_bypass		= regulator_set_bypass_regmap,
57077409d9bSKishon Vijay Abraham I 	.get_bypass		= regulator_get_bypass_regmap,
571e5ce4208SGraeme Gregory };
572e5ce4208SGraeme Gregory 
5730e5a7680SBhumika Goyal static const struct regulator_ops tps65917_ops_smps = {
574d6f83370SKeerthy 	.is_enabled		= regulator_is_enabled_regmap,
575d6f83370SKeerthy 	.enable			= regulator_enable_regmap,
576d6f83370SKeerthy 	.disable		= regulator_disable_regmap,
577d6f83370SKeerthy 	.set_mode		= palmas_set_mode_smps,
578d6f83370SKeerthy 	.get_mode		= palmas_get_mode_smps,
579d6f83370SKeerthy 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
580d6f83370SKeerthy 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
581d6f83370SKeerthy 	.list_voltage		= regulator_list_voltage_linear_range,
582d6f83370SKeerthy 	.map_voltage		= regulator_map_voltage_linear_range,
583d6f83370SKeerthy 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
584d6f83370SKeerthy };
585d6f83370SKeerthy 
5860e5a7680SBhumika Goyal static const struct regulator_ops tps65917_ops_ext_control_smps = {
587d6f83370SKeerthy 	.set_mode		= palmas_set_mode_smps,
588d6f83370SKeerthy 	.get_mode		= palmas_get_mode_smps,
589d6f83370SKeerthy 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
590d6f83370SKeerthy 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
591d6f83370SKeerthy 	.list_voltage		= regulator_list_voltage_linear_range,
592d6f83370SKeerthy 	.map_voltage		= regulator_map_voltage_linear_range,
593d6f83370SKeerthy };
594d6f83370SKeerthy 
palmas_is_enabled_ldo(struct regulator_dev * dev)595e5ce4208SGraeme Gregory static int palmas_is_enabled_ldo(struct regulator_dev *dev)
596e5ce4208SGraeme Gregory {
597cf910b6bSNishanth Menon 	int id = rdev_get_id(dev);
598e5ce4208SGraeme Gregory 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
599cac9e916SKeerthy 	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
600cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
601e5ce4208SGraeme Gregory 	unsigned int reg;
602e5ce4208SGraeme Gregory 
603cf910b6bSNishanth Menon 	palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg);
604e5ce4208SGraeme Gregory 
605e5ce4208SGraeme Gregory 	reg &= PALMAS_LDO1_CTRL_STATUS;
606e5ce4208SGraeme Gregory 
607e5ce4208SGraeme Gregory 	return !!(reg);
608e5ce4208SGraeme Gregory }
609e5ce4208SGraeme Gregory 
6100e5a7680SBhumika Goyal static const struct regulator_ops palmas_ops_ldo = {
611e5ce4208SGraeme Gregory 	.is_enabled		= palmas_is_enabled_ldo,
612e5ce4208SGraeme Gregory 	.enable			= regulator_enable_regmap,
613e5ce4208SGraeme Gregory 	.disable		= regulator_disable_regmap,
6144a247a96SAxel Lin 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
6154a247a96SAxel Lin 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
6169119ff6aSAxel Lin 	.list_voltage		= regulator_list_voltage_linear,
6179119ff6aSAxel Lin 	.map_voltage		= regulator_map_voltage_linear,
618e5ce4208SGraeme Gregory };
619e5ce4208SGraeme Gregory 
6200e5a7680SBhumika Goyal static const struct regulator_ops palmas_ops_ldo9 = {
621b554e145SKeerthy 	.is_enabled		= palmas_is_enabled_ldo,
622b554e145SKeerthy 	.enable			= regulator_enable_regmap,
623b554e145SKeerthy 	.disable		= regulator_disable_regmap,
624b554e145SKeerthy 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
625b554e145SKeerthy 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
626b554e145SKeerthy 	.list_voltage		= regulator_list_voltage_linear,
627b554e145SKeerthy 	.map_voltage		= regulator_map_voltage_linear,
628b554e145SKeerthy 	.set_bypass		= regulator_set_bypass_regmap,
629b554e145SKeerthy 	.get_bypass		= regulator_get_bypass_regmap,
630b554e145SKeerthy };
631b554e145SKeerthy 
6320e5a7680SBhumika Goyal static const struct regulator_ops palmas_ops_ext_control_ldo = {
63332b6d3f6SLaxman Dewangan 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
63432b6d3f6SLaxman Dewangan 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
63532b6d3f6SLaxman Dewangan 	.list_voltage		= regulator_list_voltage_linear,
63632b6d3f6SLaxman Dewangan 	.map_voltage		= regulator_map_voltage_linear,
63732b6d3f6SLaxman Dewangan };
63832b6d3f6SLaxman Dewangan 
6390e5a7680SBhumika Goyal static const struct regulator_ops palmas_ops_extreg = {
640aa07f027SLaxman Dewangan 	.is_enabled		= regulator_is_enabled_regmap,
641aa07f027SLaxman Dewangan 	.enable			= regulator_enable_regmap,
642aa07f027SLaxman Dewangan 	.disable		= regulator_disable_regmap,
643aa07f027SLaxman Dewangan };
644aa07f027SLaxman Dewangan 
6450e5a7680SBhumika Goyal static const struct regulator_ops palmas_ops_ext_control_extreg = {
64632b6d3f6SLaxman Dewangan };
64732b6d3f6SLaxman Dewangan 
6480e5a7680SBhumika Goyal static const struct regulator_ops tps65917_ops_ldo = {
649d6f83370SKeerthy 	.is_enabled		= palmas_is_enabled_ldo,
650d6f83370SKeerthy 	.enable			= regulator_enable_regmap,
651d6f83370SKeerthy 	.disable		= regulator_disable_regmap,
652d6f83370SKeerthy 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
653d6f83370SKeerthy 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
654d6f83370SKeerthy 	.list_voltage		= regulator_list_voltage_linear,
655d6f83370SKeerthy 	.map_voltage		= regulator_map_voltage_linear,
656d6f83370SKeerthy 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
657d6f83370SKeerthy };
658d6f83370SKeerthy 
6590e5a7680SBhumika Goyal static const struct regulator_ops tps65917_ops_ldo_1_2 = {
660b554e145SKeerthy 	.is_enabled		= palmas_is_enabled_ldo,
661b554e145SKeerthy 	.enable			= regulator_enable_regmap,
662b554e145SKeerthy 	.disable		= regulator_disable_regmap,
663b554e145SKeerthy 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
664b554e145SKeerthy 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
665b554e145SKeerthy 	.list_voltage		= regulator_list_voltage_linear,
666b554e145SKeerthy 	.map_voltage		= regulator_map_voltage_linear,
667b554e145SKeerthy 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
668b554e145SKeerthy 	.set_bypass		= regulator_set_bypass_regmap,
669b554e145SKeerthy 	.get_bypass		= regulator_get_bypass_regmap,
670b554e145SKeerthy };
671b554e145SKeerthy 
palmas_regulator_config_external(struct palmas * palmas,int id,struct palmas_reg_init * reg_init)67232b6d3f6SLaxman Dewangan static int palmas_regulator_config_external(struct palmas *palmas, int id,
67332b6d3f6SLaxman Dewangan 		struct palmas_reg_init *reg_init)
67432b6d3f6SLaxman Dewangan {
675cf910b6bSNishanth Menon 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
676cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
67732b6d3f6SLaxman Dewangan 	int ret;
67832b6d3f6SLaxman Dewangan 
679cf910b6bSNishanth Menon 	ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
68032b6d3f6SLaxman Dewangan 					    reg_init->roof_floor, true);
68132b6d3f6SLaxman Dewangan 	if (ret < 0)
68232b6d3f6SLaxman Dewangan 		dev_err(palmas->dev,
68332b6d3f6SLaxman Dewangan 			"Ext control config for regulator %d failed %d\n",
68432b6d3f6SLaxman Dewangan 			id, ret);
68532b6d3f6SLaxman Dewangan 	return ret;
68632b6d3f6SLaxman Dewangan }
68732b6d3f6SLaxman Dewangan 
688e5ce4208SGraeme Gregory /*
689e5ce4208SGraeme Gregory  * setup the hardware based sleep configuration of the SMPS/LDO regulators
690e5ce4208SGraeme Gregory  * from the platform data. This is different to the software based control
691e5ce4208SGraeme Gregory  * supported by the regulator framework as it is controlled by toggling
692e5ce4208SGraeme Gregory  * pins on the PMIC such as PREQ, SYSEN, ...
693e5ce4208SGraeme Gregory  */
palmas_smps_init(struct palmas * palmas,int id,struct palmas_reg_init * reg_init)694e5ce4208SGraeme Gregory static int palmas_smps_init(struct palmas *palmas, int id,
695e5ce4208SGraeme Gregory 		struct palmas_reg_init *reg_init)
696e5ce4208SGraeme Gregory {
697e5ce4208SGraeme Gregory 	unsigned int reg;
698e5ce4208SGraeme Gregory 	int ret;
699cac9e916SKeerthy 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
700cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
701cf910b6bSNishanth Menon 	unsigned int addr = rinfo->ctrl_addr;
702e5ce4208SGraeme Gregory 
703e5ce4208SGraeme Gregory 	ret = palmas_smps_read(palmas, addr, &reg);
704e5ce4208SGraeme Gregory 	if (ret)
705e5ce4208SGraeme Gregory 		return ret;
706e5ce4208SGraeme Gregory 
707fedd89b1SAxel Lin 	switch (id) {
70877409d9bSKishon Vijay Abraham I 	case PALMAS_REG_SMPS10_OUT1:
70977409d9bSKishon Vijay Abraham I 	case PALMAS_REG_SMPS10_OUT2:
710fedd89b1SAxel Lin 		reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
71130590d04SLaxman Dewangan 		if (reg_init->mode_sleep)
712fedd89b1SAxel Lin 			reg |= reg_init->mode_sleep <<
713fedd89b1SAxel Lin 					PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
714fedd89b1SAxel Lin 		break;
715fedd89b1SAxel Lin 	default:
716e5ce4208SGraeme Gregory 		if (reg_init->warm_reset)
717e5ce4208SGraeme Gregory 			reg |= PALMAS_SMPS12_CTRL_WR_S;
71830590d04SLaxman Dewangan 		else
71930590d04SLaxman Dewangan 			reg &= ~PALMAS_SMPS12_CTRL_WR_S;
720e5ce4208SGraeme Gregory 
721e5ce4208SGraeme Gregory 		if (reg_init->roof_floor)
722e5ce4208SGraeme Gregory 			reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
72330590d04SLaxman Dewangan 		else
72430590d04SLaxman Dewangan 			reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
725e5ce4208SGraeme Gregory 
726e5ce4208SGraeme Gregory 		reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
72730590d04SLaxman Dewangan 		if (reg_init->mode_sleep)
728e5ce4208SGraeme Gregory 			reg |= reg_init->mode_sleep <<
729e5ce4208SGraeme Gregory 					PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
730e5ce4208SGraeme Gregory 	}
731e5ce4208SGraeme Gregory 
732e5ce4208SGraeme Gregory 	ret = palmas_smps_write(palmas, addr, reg);
733e5ce4208SGraeme Gregory 	if (ret)
734e5ce4208SGraeme Gregory 		return ret;
735e5ce4208SGraeme Gregory 
736cf910b6bSNishanth Menon 	if (rinfo->vsel_addr && reg_init->vsel) {
737e5ce4208SGraeme Gregory 
738e5ce4208SGraeme Gregory 		reg = reg_init->vsel;
739e5ce4208SGraeme Gregory 
740cf910b6bSNishanth Menon 		ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
741e5ce4208SGraeme Gregory 		if (ret)
742e5ce4208SGraeme Gregory 			return ret;
743e5ce4208SGraeme Gregory 	}
744e5ce4208SGraeme Gregory 
74532b6d3f6SLaxman Dewangan 	if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
74632b6d3f6SLaxman Dewangan 			(id != PALMAS_REG_SMPS10_OUT2)) {
74732b6d3f6SLaxman Dewangan 		/* Enable externally controlled regulator */
74832b6d3f6SLaxman Dewangan 		ret = palmas_smps_read(palmas, addr, &reg);
74932b6d3f6SLaxman Dewangan 		if (ret < 0)
75032b6d3f6SLaxman Dewangan 			return ret;
751e5ce4208SGraeme Gregory 
75232b6d3f6SLaxman Dewangan 		if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
75332b6d3f6SLaxman Dewangan 			reg |= SMPS_CTRL_MODE_ON;
75432b6d3f6SLaxman Dewangan 			ret = palmas_smps_write(palmas, addr, reg);
75532b6d3f6SLaxman Dewangan 			if (ret < 0)
75632b6d3f6SLaxman Dewangan 				return ret;
75732b6d3f6SLaxman Dewangan 		}
75832b6d3f6SLaxman Dewangan 		return palmas_regulator_config_external(palmas, id, reg_init);
75932b6d3f6SLaxman Dewangan 	}
760e5ce4208SGraeme Gregory 	return 0;
761e5ce4208SGraeme Gregory }
762e5ce4208SGraeme Gregory 
palmas_ldo_init(struct palmas * palmas,int id,struct palmas_reg_init * reg_init)763e5ce4208SGraeme Gregory static int palmas_ldo_init(struct palmas *palmas, int id,
764e5ce4208SGraeme Gregory 		struct palmas_reg_init *reg_init)
765e5ce4208SGraeme Gregory {
766e5ce4208SGraeme Gregory 	unsigned int reg;
767e5ce4208SGraeme Gregory 	unsigned int addr;
768e5ce4208SGraeme Gregory 	int ret;
769cac9e916SKeerthy 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
770cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
771cac9e916SKeerthy 
772cf910b6bSNishanth Menon 	addr = rinfo->ctrl_addr;
773e5ce4208SGraeme Gregory 
7742735daebSAxel Lin 	ret = palmas_ldo_read(palmas, addr, &reg);
775e5ce4208SGraeme Gregory 	if (ret)
776e5ce4208SGraeme Gregory 		return ret;
777e5ce4208SGraeme Gregory 
778e5ce4208SGraeme Gregory 	if (reg_init->warm_reset)
779e5ce4208SGraeme Gregory 		reg |= PALMAS_LDO1_CTRL_WR_S;
78030590d04SLaxman Dewangan 	else
78130590d04SLaxman Dewangan 		reg &= ~PALMAS_LDO1_CTRL_WR_S;
782e5ce4208SGraeme Gregory 
783e5ce4208SGraeme Gregory 	if (reg_init->mode_sleep)
784e5ce4208SGraeme Gregory 		reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
78530590d04SLaxman Dewangan 	else
78630590d04SLaxman Dewangan 		reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
787e5ce4208SGraeme Gregory 
7882735daebSAxel Lin 	ret = palmas_ldo_write(palmas, addr, reg);
789e5ce4208SGraeme Gregory 	if (ret)
790e5ce4208SGraeme Gregory 		return ret;
791e5ce4208SGraeme Gregory 
79232b6d3f6SLaxman Dewangan 	if (reg_init->roof_floor) {
79332b6d3f6SLaxman Dewangan 		/* Enable externally controlled regulator */
79432b6d3f6SLaxman Dewangan 		ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
79532b6d3f6SLaxman Dewangan 				addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
79632b6d3f6SLaxman Dewangan 				PALMAS_LDO1_CTRL_MODE_ACTIVE);
79732b6d3f6SLaxman Dewangan 		if (ret < 0) {
79832b6d3f6SLaxman Dewangan 			dev_err(palmas->dev,
79932b6d3f6SLaxman Dewangan 				"LDO Register 0x%02x update failed %d\n",
80032b6d3f6SLaxman Dewangan 				addr, ret);
80132b6d3f6SLaxman Dewangan 			return ret;
80232b6d3f6SLaxman Dewangan 		}
80332b6d3f6SLaxman Dewangan 		return palmas_regulator_config_external(palmas, id, reg_init);
80432b6d3f6SLaxman Dewangan 	}
805e5ce4208SGraeme Gregory 	return 0;
806e5ce4208SGraeme Gregory }
807e5ce4208SGraeme Gregory 
palmas_extreg_init(struct palmas * palmas,int id,struct palmas_reg_init * reg_init)808aa07f027SLaxman Dewangan static int palmas_extreg_init(struct palmas *palmas, int id,
809aa07f027SLaxman Dewangan 		struct palmas_reg_init *reg_init)
810aa07f027SLaxman Dewangan {
811aa07f027SLaxman Dewangan 	unsigned int addr;
812aa07f027SLaxman Dewangan 	int ret;
813aa07f027SLaxman Dewangan 	unsigned int val = 0;
814cac9e916SKeerthy 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
815cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
816cac9e916SKeerthy 
817cf910b6bSNishanth Menon 	addr = rinfo->ctrl_addr;
818aa07f027SLaxman Dewangan 
819aa07f027SLaxman Dewangan 	if (reg_init->mode_sleep)
820aa07f027SLaxman Dewangan 		val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
821aa07f027SLaxman Dewangan 
822aa07f027SLaxman Dewangan 	ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
823aa07f027SLaxman Dewangan 			addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
824aa07f027SLaxman Dewangan 	if (ret < 0) {
825aa07f027SLaxman Dewangan 		dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
826aa07f027SLaxman Dewangan 			addr, ret);
827aa07f027SLaxman Dewangan 		return ret;
828aa07f027SLaxman Dewangan 	}
82932b6d3f6SLaxman Dewangan 
83032b6d3f6SLaxman Dewangan 	if (reg_init->roof_floor) {
83132b6d3f6SLaxman Dewangan 		/* Enable externally controlled regulator */
83232b6d3f6SLaxman Dewangan 		ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
83332b6d3f6SLaxman Dewangan 				addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
83432b6d3f6SLaxman Dewangan 				PALMAS_REGEN1_CTRL_MODE_ACTIVE);
83532b6d3f6SLaxman Dewangan 		if (ret < 0) {
83632b6d3f6SLaxman Dewangan 			dev_err(palmas->dev,
83732b6d3f6SLaxman Dewangan 				"Resource Register 0x%02x update failed %d\n",
83832b6d3f6SLaxman Dewangan 				addr, ret);
83932b6d3f6SLaxman Dewangan 			return ret;
84032b6d3f6SLaxman Dewangan 		}
84132b6d3f6SLaxman Dewangan 		return palmas_regulator_config_external(palmas, id, reg_init);
84232b6d3f6SLaxman Dewangan 	}
843aa07f027SLaxman Dewangan 	return 0;
844aa07f027SLaxman Dewangan }
845aa07f027SLaxman Dewangan 
palmas_enable_ldo8_track(struct palmas * palmas)84617c11a76SLaxman Dewangan static void palmas_enable_ldo8_track(struct palmas *palmas)
84717c11a76SLaxman Dewangan {
84817c11a76SLaxman Dewangan 	unsigned int reg;
84917c11a76SLaxman Dewangan 	unsigned int addr;
85017c11a76SLaxman Dewangan 	int ret;
851cac9e916SKeerthy 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
852cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo;
853cac9e916SKeerthy 
854cf910b6bSNishanth Menon 	rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
855cf910b6bSNishanth Menon 	addr = rinfo->ctrl_addr;
85617c11a76SLaxman Dewangan 
85717c11a76SLaxman Dewangan 	ret = palmas_ldo_read(palmas, addr, &reg);
85817c11a76SLaxman Dewangan 	if (ret) {
85917c11a76SLaxman Dewangan 		dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
86017c11a76SLaxman Dewangan 		return;
86117c11a76SLaxman Dewangan 	}
86217c11a76SLaxman Dewangan 
86317c11a76SLaxman Dewangan 	reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
86417c11a76SLaxman Dewangan 	ret = palmas_ldo_write(palmas, addr, reg);
86517c11a76SLaxman Dewangan 	if (ret < 0) {
86617c11a76SLaxman Dewangan 		dev_err(palmas->dev, "Error in enabling tracking mode\n");
86717c11a76SLaxman Dewangan 		return;
86817c11a76SLaxman Dewangan 	}
86917c11a76SLaxman Dewangan 	/*
87017c11a76SLaxman Dewangan 	 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
87117c11a76SLaxman Dewangan 	 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
87217c11a76SLaxman Dewangan 	 * and can be set from 0.45 to 1.65 V.
87317c11a76SLaxman Dewangan 	 */
874cf910b6bSNishanth Menon 	addr = rinfo->vsel_addr;
87517c11a76SLaxman Dewangan 	ret = palmas_ldo_read(palmas, addr, &reg);
87617c11a76SLaxman Dewangan 	if (ret) {
87717c11a76SLaxman Dewangan 		dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
87817c11a76SLaxman Dewangan 		return;
87917c11a76SLaxman Dewangan 	}
88017c11a76SLaxman Dewangan 
88117c11a76SLaxman Dewangan 	reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
88217c11a76SLaxman Dewangan 	ret = palmas_ldo_write(palmas, addr, reg);
88317c11a76SLaxman Dewangan 	if (ret < 0)
88417c11a76SLaxman Dewangan 		dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
88517c11a76SLaxman Dewangan 
88617c11a76SLaxman Dewangan 	return;
88717c11a76SLaxman Dewangan }
88817c11a76SLaxman Dewangan 
palmas_ldo_registration(struct palmas_pmic * pmic,struct palmas_pmic_driver_data * ddata,struct palmas_pmic_platform_data * pdata,const char * pdev_name,struct regulator_config config)889cac9e916SKeerthy static int palmas_ldo_registration(struct palmas_pmic *pmic,
890cac9e916SKeerthy 				   struct palmas_pmic_driver_data *ddata,
891cac9e916SKeerthy 				   struct palmas_pmic_platform_data *pdata,
892cac9e916SKeerthy 				   const char *pdev_name,
893cac9e916SKeerthy 				   struct regulator_config config)
894a361cd9fSGraeme Gregory {
895cac9e916SKeerthy 	int id, ret;
896e5ce4208SGraeme Gregory 	struct regulator_dev *rdev;
897e5ce4208SGraeme Gregory 	struct palmas_reg_init *reg_init;
898cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo;
899429222d0SNishanth Menon 	struct regulator_desc *desc;
900e5ce4208SGraeme Gregory 
901cac9e916SKeerthy 	for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
902cac9e916SKeerthy 		if (pdata && pdata->reg_init[id])
903cac9e916SKeerthy 			reg_init = pdata->reg_init[id];
904cac9e916SKeerthy 		else
905cac9e916SKeerthy 			reg_init = NULL;
906a361cd9fSGraeme Gregory 
907cf910b6bSNishanth Menon 		rinfo = &ddata->palmas_regs_info[id];
908cac9e916SKeerthy 		/* Miss out regulators which are not available due
909cac9e916SKeerthy 		 * to alternate functions.
910cac9e916SKeerthy 		 */
911a361cd9fSGraeme Gregory 
912cac9e916SKeerthy 		/* Register the regulators */
913429222d0SNishanth Menon 		desc = &pmic->desc[id];
914429222d0SNishanth Menon 		desc->name = rinfo->name;
915429222d0SNishanth Menon 		desc->id = id;
916429222d0SNishanth Menon 		desc->type = REGULATOR_VOLTAGE;
917429222d0SNishanth Menon 		desc->owner = THIS_MODULE;
918cac9e916SKeerthy 
919cac9e916SKeerthy 		if (id < PALMAS_REG_REGEN1) {
920429222d0SNishanth Menon 			desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
921cac9e916SKeerthy 			if (reg_init && reg_init->roof_floor)
922429222d0SNishanth Menon 				desc->ops = &palmas_ops_ext_control_ldo;
923cac9e916SKeerthy 			else
924429222d0SNishanth Menon 				desc->ops = &palmas_ops_ldo;
925429222d0SNishanth Menon 			desc->min_uV = 900000;
926429222d0SNishanth Menon 			desc->uV_step = 50000;
927429222d0SNishanth Menon 			desc->linear_min_sel = 1;
928429222d0SNishanth Menon 			desc->enable_time = 500;
929429222d0SNishanth Menon 			desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
930cf910b6bSNishanth Menon 							    rinfo->vsel_addr);
931429222d0SNishanth Menon 			desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
932429222d0SNishanth Menon 			desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
933cf910b6bSNishanth Menon 							      rinfo->ctrl_addr);
934429222d0SNishanth Menon 			desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
935cac9e916SKeerthy 
936cac9e916SKeerthy 			/* Check if LDO8 is in tracking mode or not */
937cac9e916SKeerthy 			if (pdata && (id == PALMAS_REG_LDO8) &&
938cac9e916SKeerthy 			    pdata->enable_ldo8_tracking) {
939cac9e916SKeerthy 				palmas_enable_ldo8_track(pmic->palmas);
940429222d0SNishanth Menon 				desc->min_uV = 450000;
941429222d0SNishanth Menon 				desc->uV_step = 25000;
942a361cd9fSGraeme Gregory 			}
943e5ce4208SGraeme Gregory 
944cac9e916SKeerthy 			/* LOD6 in vibrator mode will have enable time 2000us */
945cac9e916SKeerthy 			if (pdata && pdata->ldo6_vibrator &&
946cac9e916SKeerthy 			    (id == PALMAS_REG_LDO6))
947429222d0SNishanth Menon 				desc->enable_time = 2000;
948b554e145SKeerthy 
949b554e145SKeerthy 			if (id == PALMAS_REG_LDO9) {
950b554e145SKeerthy 				desc->ops = &palmas_ops_ldo9;
951b554e145SKeerthy 				desc->bypass_reg = desc->enable_reg;
952e0341f17SNishanth Menon 				desc->bypass_val_on =
953e0341f17SNishanth Menon 						PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
954b554e145SKeerthy 				desc->bypass_mask =
955b554e145SKeerthy 						PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
956b554e145SKeerthy 			}
957cac9e916SKeerthy 		} else {
958e999c728SKeerthy 			if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
959e999c728SKeerthy 				continue;
960e999c728SKeerthy 
961429222d0SNishanth Menon 			desc->n_voltages = 1;
962cac9e916SKeerthy 			if (reg_init && reg_init->roof_floor)
963429222d0SNishanth Menon 				desc->ops = &palmas_ops_ext_control_extreg;
964cac9e916SKeerthy 			else
965429222d0SNishanth Menon 				desc->ops = &palmas_ops_extreg;
966429222d0SNishanth Menon 			desc->enable_reg =
967cac9e916SKeerthy 					PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
968cf910b6bSNishanth Menon 							   rinfo->ctrl_addr);
969429222d0SNishanth Menon 			desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
970cac9e916SKeerthy 		}
971e5ce4208SGraeme Gregory 
972cac9e916SKeerthy 		if (pdata)
973cac9e916SKeerthy 			config.init_data = pdata->reg_data[id];
974cac9e916SKeerthy 		else
975cac9e916SKeerthy 			config.init_data = NULL;
976e5ce4208SGraeme Gregory 
977429222d0SNishanth Menon 		desc->supply_name = rinfo->sname;
978cac9e916SKeerthy 		config.of_node = ddata->palmas_matches[id].of_node;
979cac9e916SKeerthy 
980429222d0SNishanth Menon 		rdev = devm_regulator_register(pmic->dev, desc, &config);
981cac9e916SKeerthy 		if (IS_ERR(rdev)) {
982cac9e916SKeerthy 			dev_err(pmic->dev,
983cac9e916SKeerthy 				"failed to register %s regulator\n",
984cac9e916SKeerthy 				pdev_name);
985cac9e916SKeerthy 			return PTR_ERR(rdev);
986cac9e916SKeerthy 		}
987cac9e916SKeerthy 
988cac9e916SKeerthy 		/* Initialise sleep/init values from platform data */
989cac9e916SKeerthy 		if (pdata) {
990cac9e916SKeerthy 			reg_init = pdata->reg_init[id];
991cac9e916SKeerthy 			if (reg_init) {
992cac9e916SKeerthy 				if (id <= ddata->ldo_end)
993cac9e916SKeerthy 					ret = palmas_ldo_init(pmic->palmas, id,
994cac9e916SKeerthy 							      reg_init);
995cac9e916SKeerthy 				else
996cac9e916SKeerthy 					ret = palmas_extreg_init(pmic->palmas,
997cac9e916SKeerthy 								 id, reg_init);
998e5ce4208SGraeme Gregory 				if (ret)
9991c9d2d71SAxel Lin 					return ret;
1000cac9e916SKeerthy 			}
1001cac9e916SKeerthy 		}
1002cac9e916SKeerthy 	}
1003e5ce4208SGraeme Gregory 
1004cac9e916SKeerthy 	return 0;
1005cac9e916SKeerthy }
1006e5ce4208SGraeme Gregory 
tps65917_ldo_registration(struct palmas_pmic * pmic,struct palmas_pmic_driver_data * ddata,struct palmas_pmic_platform_data * pdata,const char * pdev_name,struct regulator_config config)1007d6f83370SKeerthy static int tps65917_ldo_registration(struct palmas_pmic *pmic,
1008d6f83370SKeerthy 				     struct palmas_pmic_driver_data *ddata,
1009d6f83370SKeerthy 				     struct palmas_pmic_platform_data *pdata,
1010d6f83370SKeerthy 				     const char *pdev_name,
1011d6f83370SKeerthy 				     struct regulator_config config)
1012d6f83370SKeerthy {
1013d6f83370SKeerthy 	int id, ret;
1014d6f83370SKeerthy 	struct regulator_dev *rdev;
1015d6f83370SKeerthy 	struct palmas_reg_init *reg_init;
1016cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo;
1017429222d0SNishanth Menon 	struct regulator_desc *desc;
1018d6f83370SKeerthy 
1019d6f83370SKeerthy 	for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
1020d6f83370SKeerthy 		if (pdata && pdata->reg_init[id])
1021d6f83370SKeerthy 			reg_init = pdata->reg_init[id];
1022d6f83370SKeerthy 		else
1023d6f83370SKeerthy 			reg_init = NULL;
1024d6f83370SKeerthy 
1025d6f83370SKeerthy 		/* Miss out regulators which are not available due
1026d6f83370SKeerthy 		 * to alternate functions.
1027d6f83370SKeerthy 		 */
1028cf910b6bSNishanth Menon 		rinfo = &ddata->palmas_regs_info[id];
1029d6f83370SKeerthy 
1030d6f83370SKeerthy 		/* Register the regulators */
1031429222d0SNishanth Menon 		desc = &pmic->desc[id];
1032429222d0SNishanth Menon 		desc->name = rinfo->name;
1033429222d0SNishanth Menon 		desc->id = id;
1034429222d0SNishanth Menon 		desc->type = REGULATOR_VOLTAGE;
1035429222d0SNishanth Menon 		desc->owner = THIS_MODULE;
1036d6f83370SKeerthy 
1037d6f83370SKeerthy 		if (id < TPS65917_REG_REGEN1) {
1038429222d0SNishanth Menon 			desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
1039d6f83370SKeerthy 			if (reg_init && reg_init->roof_floor)
1040429222d0SNishanth Menon 				desc->ops = &palmas_ops_ext_control_ldo;
1041d6f83370SKeerthy 			else
1042429222d0SNishanth Menon 				desc->ops = &tps65917_ops_ldo;
1043429222d0SNishanth Menon 			desc->min_uV = 900000;
1044429222d0SNishanth Menon 			desc->uV_step = 50000;
1045429222d0SNishanth Menon 			desc->linear_min_sel = 1;
1046429222d0SNishanth Menon 			desc->enable_time = 500;
1047429222d0SNishanth Menon 			desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1048cf910b6bSNishanth Menon 							    rinfo->vsel_addr);
1049429222d0SNishanth Menon 			desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1050429222d0SNishanth Menon 			desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1051cf910b6bSNishanth Menon 							      rinfo->ctrl_addr);
1052429222d0SNishanth Menon 			desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
1053d6f83370SKeerthy 			/*
1054d6f83370SKeerthy 			 * To be confirmed. Discussion on going with PMIC Team.
1055d6f83370SKeerthy 			 * It is of the order of ~60mV/uS.
1056d6f83370SKeerthy 			 */
1057429222d0SNishanth Menon 			desc->ramp_delay = 2500;
1058b554e145SKeerthy 			if (id == TPS65917_REG_LDO1 ||
1059b554e145SKeerthy 			    id == TPS65917_REG_LDO2) {
1060b554e145SKeerthy 				desc->ops = &tps65917_ops_ldo_1_2;
1061b554e145SKeerthy 				desc->bypass_reg = desc->enable_reg;
1062e0341f17SNishanth Menon 				desc->bypass_val_on =
1063e0341f17SNishanth Menon 						TPS65917_LDO1_CTRL_BYPASS_EN;
1064b554e145SKeerthy 				desc->bypass_mask =
1065b554e145SKeerthy 						TPS65917_LDO1_CTRL_BYPASS_EN;
1066b554e145SKeerthy 			}
1067d6f83370SKeerthy 		} else {
1068429222d0SNishanth Menon 			desc->n_voltages = 1;
1069d6f83370SKeerthy 			if (reg_init && reg_init->roof_floor)
1070429222d0SNishanth Menon 				desc->ops = &palmas_ops_ext_control_extreg;
1071d6f83370SKeerthy 			else
1072429222d0SNishanth Menon 				desc->ops = &palmas_ops_extreg;
1073429222d0SNishanth Menon 			desc->enable_reg =
1074d6f83370SKeerthy 					PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
1075cf910b6bSNishanth Menon 							   rinfo->ctrl_addr);
1076429222d0SNishanth Menon 			desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1077d6f83370SKeerthy 		}
1078d6f83370SKeerthy 
1079d6f83370SKeerthy 		if (pdata)
1080d6f83370SKeerthy 			config.init_data = pdata->reg_data[id];
1081d6f83370SKeerthy 		else
1082d6f83370SKeerthy 			config.init_data = NULL;
1083d6f83370SKeerthy 
1084429222d0SNishanth Menon 		desc->supply_name = rinfo->sname;
1085d6f83370SKeerthy 		config.of_node = ddata->palmas_matches[id].of_node;
1086d6f83370SKeerthy 
1087429222d0SNishanth Menon 		rdev = devm_regulator_register(pmic->dev, desc, &config);
1088d6f83370SKeerthy 		if (IS_ERR(rdev)) {
1089d6f83370SKeerthy 			dev_err(pmic->dev,
1090d6f83370SKeerthy 				"failed to register %s regulator\n",
1091d6f83370SKeerthy 				pdev_name);
1092d6f83370SKeerthy 			return PTR_ERR(rdev);
1093d6f83370SKeerthy 		}
1094d6f83370SKeerthy 
1095d6f83370SKeerthy 		/* Initialise sleep/init values from platform data */
1096d6f83370SKeerthy 		if (pdata) {
1097d6f83370SKeerthy 			reg_init = pdata->reg_init[id];
1098d6f83370SKeerthy 			if (reg_init) {
1099d6f83370SKeerthy 				if (id < TPS65917_REG_REGEN1)
1100d6f83370SKeerthy 					ret = palmas_ldo_init(pmic->palmas,
1101d6f83370SKeerthy 							      id, reg_init);
1102d6f83370SKeerthy 				else
1103d6f83370SKeerthy 					ret = palmas_extreg_init(pmic->palmas,
1104d6f83370SKeerthy 								 id, reg_init);
1105d6f83370SKeerthy 				if (ret)
1106d6f83370SKeerthy 					return ret;
1107d6f83370SKeerthy 			}
1108d6f83370SKeerthy 		}
1109d6f83370SKeerthy 	}
1110d6f83370SKeerthy 
1111d6f83370SKeerthy 	return 0;
1112d6f83370SKeerthy }
1113d6f83370SKeerthy 
palmas_smps_registration(struct palmas_pmic * pmic,struct palmas_pmic_driver_data * ddata,struct palmas_pmic_platform_data * pdata,const char * pdev_name,struct regulator_config config)1114cac9e916SKeerthy static int palmas_smps_registration(struct palmas_pmic *pmic,
1115cac9e916SKeerthy 				    struct palmas_pmic_driver_data *ddata,
1116cac9e916SKeerthy 				    struct palmas_pmic_platform_data *pdata,
1117cac9e916SKeerthy 				    const char *pdev_name,
1118cac9e916SKeerthy 				    struct regulator_config config)
1119cac9e916SKeerthy {
1120cac9e916SKeerthy 	int id, ret;
1121cac9e916SKeerthy 	unsigned int addr, reg;
1122cac9e916SKeerthy 	struct regulator_dev *rdev;
1123cac9e916SKeerthy 	struct palmas_reg_init *reg_init;
1124cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo;
1125429222d0SNishanth Menon 	struct regulator_desc *desc;
1126e5ce4208SGraeme Gregory 
1127cac9e916SKeerthy 	for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
112828d1e8cdSLaxman Dewangan 		bool ramp_delay_support = false;
1129e5ce4208SGraeme Gregory 
1130e5ce4208SGraeme Gregory 		/*
1131e5ce4208SGraeme Gregory 		 * Miss out regulators which are not available due
1132e5ce4208SGraeme Gregory 		 * to slaving configurations.
1133e5ce4208SGraeme Gregory 		 */
1134e5ce4208SGraeme Gregory 		switch (id) {
1135e5ce4208SGraeme Gregory 		case PALMAS_REG_SMPS12:
1136e5ce4208SGraeme Gregory 		case PALMAS_REG_SMPS3:
1137e5ce4208SGraeme Gregory 			if (pmic->smps123)
1138e5ce4208SGraeme Gregory 				continue;
113928d1e8cdSLaxman Dewangan 			if (id == PALMAS_REG_SMPS12)
114028d1e8cdSLaxman Dewangan 				ramp_delay_support = true;
1141e5ce4208SGraeme Gregory 			break;
1142e5ce4208SGraeme Gregory 		case PALMAS_REG_SMPS123:
1143e5ce4208SGraeme Gregory 			if (!pmic->smps123)
1144e5ce4208SGraeme Gregory 				continue;
114528d1e8cdSLaxman Dewangan 			ramp_delay_support = true;
1146e5ce4208SGraeme Gregory 			break;
1147e5ce4208SGraeme Gregory 		case PALMAS_REG_SMPS45:
1148e5ce4208SGraeme Gregory 		case PALMAS_REG_SMPS7:
1149e5ce4208SGraeme Gregory 			if (pmic->smps457)
1150e5ce4208SGraeme Gregory 				continue;
115128d1e8cdSLaxman Dewangan 			if (id == PALMAS_REG_SMPS45)
115228d1e8cdSLaxman Dewangan 				ramp_delay_support = true;
1153e5ce4208SGraeme Gregory 			break;
1154e5ce4208SGraeme Gregory 		case PALMAS_REG_SMPS457:
1155e5ce4208SGraeme Gregory 			if (!pmic->smps457)
1156e5ce4208SGraeme Gregory 				continue;
115728d1e8cdSLaxman Dewangan 			ramp_delay_support = true;
115828d1e8cdSLaxman Dewangan 			break;
115977409d9bSKishon Vijay Abraham I 		case PALMAS_REG_SMPS10_OUT1:
116077409d9bSKishon Vijay Abraham I 		case PALMAS_REG_SMPS10_OUT2:
1161cac9e916SKeerthy 			if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
11621ffb0be3SJ Keerthy 				continue;
116328d1e8cdSLaxman Dewangan 		}
1164cf910b6bSNishanth Menon 		rinfo = &ddata->palmas_regs_info[id];
1165429222d0SNishanth Menon 		desc = &pmic->desc[id];
116628d1e8cdSLaxman Dewangan 
11673f4d6364SSachin Kamat 		if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
116828d1e8cdSLaxman Dewangan 			ramp_delay_support = true;
116928d1e8cdSLaxman Dewangan 
117028d1e8cdSLaxman Dewangan 		if (ramp_delay_support) {
1171cf910b6bSNishanth Menon 			addr = rinfo->tstep_addr;
117228d1e8cdSLaxman Dewangan 			ret = palmas_smps_read(pmic->palmas, addr, &reg);
117328d1e8cdSLaxman Dewangan 			if (ret < 0) {
1174cac9e916SKeerthy 				dev_err(pmic->dev,
117528d1e8cdSLaxman Dewangan 					"reading TSTEP reg failed: %d\n", ret);
117651c86b3eSSachin Kamat 				return ret;
117728d1e8cdSLaxman Dewangan 			}
1178429222d0SNishanth Menon 			desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1179429222d0SNishanth Menon 			pmic->ramp_delay[id] = desc->ramp_delay;
1180e5ce4208SGraeme Gregory 		}
1181e5ce4208SGraeme Gregory 
1182bdc4baacSAxel Lin 		/* Initialise sleep/init values from platform data */
1183bdc4baacSAxel Lin 		if (pdata && pdata->reg_init[id]) {
1184bdc4baacSAxel Lin 			reg_init = pdata->reg_init[id];
1185cac9e916SKeerthy 			ret = palmas_smps_init(pmic->palmas, id, reg_init);
1186bdc4baacSAxel Lin 			if (ret)
118751c86b3eSSachin Kamat 				return ret;
118832b6d3f6SLaxman Dewangan 		} else {
118932b6d3f6SLaxman Dewangan 			reg_init = NULL;
1190bdc4baacSAxel Lin 		}
1191bdc4baacSAxel Lin 
1192e5ce4208SGraeme Gregory 		/* Register the regulators */
1193429222d0SNishanth Menon 		desc->name = rinfo->name;
1194429222d0SNishanth Menon 		desc->id = id;
1195e5ce4208SGraeme Gregory 
1196fedd89b1SAxel Lin 		switch (id) {
119777409d9bSKishon Vijay Abraham I 		case PALMAS_REG_SMPS10_OUT1:
119877409d9bSKishon Vijay Abraham I 		case PALMAS_REG_SMPS10_OUT2:
1199429222d0SNishanth Menon 			desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1200429222d0SNishanth Menon 			desc->ops = &palmas_ops_smps10;
1201429222d0SNishanth Menon 			desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
120212565b16SAxel Lin 							    PALMAS_SMPS10_CTRL);
1203429222d0SNishanth Menon 			desc->vsel_mask = SMPS10_VSEL;
1204429222d0SNishanth Menon 			desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1205f232168dSKishon Vijay Abraham I 							    PALMAS_SMPS10_CTRL);
120677409d9bSKishon Vijay Abraham I 			if (id == PALMAS_REG_SMPS10_OUT1)
1207429222d0SNishanth Menon 				desc->enable_mask = SMPS10_SWITCH_EN;
120877409d9bSKishon Vijay Abraham I 			else
1209429222d0SNishanth Menon 				desc->enable_mask = SMPS10_BOOST_EN;
1210429222d0SNishanth Menon 			desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
121177409d9bSKishon Vijay Abraham I 							    PALMAS_SMPS10_CTRL);
1212e0341f17SNishanth Menon 			desc->bypass_val_on = SMPS10_BYPASS_EN;
1213429222d0SNishanth Menon 			desc->bypass_mask = SMPS10_BYPASS_EN;
1214429222d0SNishanth Menon 			desc->min_uV = 3750000;
1215429222d0SNishanth Menon 			desc->uV_step = 1250000;
1216fedd89b1SAxel Lin 			break;
1217fedd89b1SAxel Lin 		default:
1218e5ce4208SGraeme Gregory 			/*
1219bdc4baacSAxel Lin 			 * Read and store the RANGE bit for later use
1220bdc4baacSAxel Lin 			 * This must be done before regulator is probed,
122151d3a0c9SLaxman Dewangan 			 * otherwise we error in probe with unsupportable
122251d3a0c9SLaxman Dewangan 			 * ranges. Read the current smps mode for later use.
1223e5ce4208SGraeme Gregory 			 */
1224cf910b6bSNishanth Menon 			addr = rinfo->vsel_addr;
1225429222d0SNishanth Menon 			desc->n_linear_ranges = 3;
1226e5ce4208SGraeme Gregory 
1227e5ce4208SGraeme Gregory 			ret = palmas_smps_read(pmic->palmas, addr, &reg);
1228e5ce4208SGraeme Gregory 			if (ret)
122951c86b3eSSachin Kamat 				return ret;
1230e5ce4208SGraeme Gregory 			if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1231e5ce4208SGraeme Gregory 				pmic->range[id] = 1;
1232dbabd624SKeerthy 			if (pmic->range[id])
1233429222d0SNishanth Menon 				desc->linear_ranges = smps_high_ranges;
1234dbabd624SKeerthy 			else
1235429222d0SNishanth Menon 				desc->linear_ranges = smps_low_ranges;
1236bdc4baacSAxel Lin 
123732b6d3f6SLaxman Dewangan 			if (reg_init && reg_init->roof_floor)
1238429222d0SNishanth Menon 				desc->ops = &palmas_ops_ext_control_smps;
123932b6d3f6SLaxman Dewangan 			else
1240429222d0SNishanth Menon 				desc->ops = &palmas_ops_smps;
1241429222d0SNishanth Menon 			desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1242429222d0SNishanth Menon 			desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1243cf910b6bSNishanth Menon 							    rinfo->vsel_addr);
1244429222d0SNishanth Menon 			desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
124551d3a0c9SLaxman Dewangan 
124651d3a0c9SLaxman Dewangan 			/* Read the smps mode for later use. */
1247cf910b6bSNishanth Menon 			addr = rinfo->ctrl_addr;
124851d3a0c9SLaxman Dewangan 			ret = palmas_smps_read(pmic->palmas, addr, &reg);
124951d3a0c9SLaxman Dewangan 			if (ret)
125051c86b3eSSachin Kamat 				return ret;
125151d3a0c9SLaxman Dewangan 			pmic->current_reg_mode[id] = reg &
125251d3a0c9SLaxman Dewangan 					PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1253318dbb02SNishanth Menon 
1254429222d0SNishanth Menon 			desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1255cf910b6bSNishanth Menon 							      rinfo->ctrl_addr);
1256429222d0SNishanth Menon 			desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1257318dbb02SNishanth Menon 			/* set_mode overrides this value */
1258429222d0SNishanth Menon 			desc->enable_val = SMPS_CTRL_MODE_ON;
1259e5ce4208SGraeme Gregory 		}
1260e5ce4208SGraeme Gregory 
1261429222d0SNishanth Menon 		desc->type = REGULATOR_VOLTAGE;
1262429222d0SNishanth Menon 		desc->owner = THIS_MODULE;
1263bdc4baacSAxel Lin 
1264a361cd9fSGraeme Gregory 		if (pdata)
1265e5ce4208SGraeme Gregory 			config.init_data = pdata->reg_data[id];
1266e5ce4208SGraeme Gregory 		else
1267e5ce4208SGraeme Gregory 			config.init_data = NULL;
1268e5ce4208SGraeme Gregory 
1269429222d0SNishanth Menon 		desc->supply_name = rinfo->sname;
1270cac9e916SKeerthy 		config.of_node = ddata->palmas_matches[id].of_node;
1271a361cd9fSGraeme Gregory 
1272429222d0SNishanth Menon 		rdev = devm_regulator_register(pmic->dev, desc, &config);
1273e5ce4208SGraeme Gregory 		if (IS_ERR(rdev)) {
1274cac9e916SKeerthy 			dev_err(pmic->dev,
1275e5ce4208SGraeme Gregory 				"failed to register %s regulator\n",
1276cac9e916SKeerthy 				pdev_name);
127751c86b3eSSachin Kamat 			return PTR_ERR(rdev);
1278e5ce4208SGraeme Gregory 		}
1279e5ce4208SGraeme Gregory 	}
1280e5ce4208SGraeme Gregory 
1281e5ce4208SGraeme Gregory 	return 0;
1282e5ce4208SGraeme Gregory }
1283e5ce4208SGraeme Gregory 
tps65917_smps_registration(struct palmas_pmic * pmic,struct palmas_pmic_driver_data * ddata,struct palmas_pmic_platform_data * pdata,const char * pdev_name,struct regulator_config config)1284d6f83370SKeerthy static int tps65917_smps_registration(struct palmas_pmic *pmic,
1285d6f83370SKeerthy 				      struct palmas_pmic_driver_data *ddata,
1286d6f83370SKeerthy 				      struct palmas_pmic_platform_data *pdata,
1287d6f83370SKeerthy 				      const char *pdev_name,
1288d6f83370SKeerthy 				      struct regulator_config config)
1289d6f83370SKeerthy {
1290d6f83370SKeerthy 	int id, ret;
1291d6f83370SKeerthy 	unsigned int addr, reg;
1292d6f83370SKeerthy 	struct regulator_dev *rdev;
1293d6f83370SKeerthy 	struct palmas_reg_init *reg_init;
1294cf910b6bSNishanth Menon 	struct palmas_regs_info *rinfo;
1295429222d0SNishanth Menon 	struct regulator_desc *desc;
1296d6f83370SKeerthy 
1297d6f83370SKeerthy 	for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1298d6f83370SKeerthy 		/*
1299d6f83370SKeerthy 		 * Miss out regulators which are not available due
1300d6f83370SKeerthy 		 * to slaving configurations.
1301d6f83370SKeerthy 		 */
1302429222d0SNishanth Menon 		desc = &pmic->desc[id];
1303429222d0SNishanth Menon 		desc->n_linear_ranges = 3;
1304be035303SKeerthy 		if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) &&
1305be035303SKeerthy 		    pmic->smps12)
1306d6f83370SKeerthy 			continue;
1307d6f83370SKeerthy 
1308d6f83370SKeerthy 		/* Initialise sleep/init values from platform data */
1309d6f83370SKeerthy 		if (pdata && pdata->reg_init[id]) {
1310d6f83370SKeerthy 			reg_init = pdata->reg_init[id];
1311d6f83370SKeerthy 			ret = palmas_smps_init(pmic->palmas, id, reg_init);
1312d6f83370SKeerthy 			if (ret)
1313d6f83370SKeerthy 				return ret;
1314d6f83370SKeerthy 		} else {
1315d6f83370SKeerthy 			reg_init = NULL;
1316d6f83370SKeerthy 		}
1317cf910b6bSNishanth Menon 		rinfo = &ddata->palmas_regs_info[id];
1318d6f83370SKeerthy 
1319d6f83370SKeerthy 		/* Register the regulators */
1320429222d0SNishanth Menon 		desc->name = rinfo->name;
1321429222d0SNishanth Menon 		desc->id = id;
1322d6f83370SKeerthy 
1323d6f83370SKeerthy 		/*
1324d6f83370SKeerthy 		 * Read and store the RANGE bit for later use
1325d6f83370SKeerthy 		 * This must be done before regulator is probed,
1326d6f83370SKeerthy 		 * otherwise we error in probe with unsupportable
1327d6f83370SKeerthy 		 * ranges. Read the current smps mode for later use.
1328d6f83370SKeerthy 		 */
1329cf910b6bSNishanth Menon 		addr = rinfo->vsel_addr;
1330d6f83370SKeerthy 
1331d6f83370SKeerthy 		ret = palmas_smps_read(pmic->palmas, addr, &reg);
1332d6f83370SKeerthy 		if (ret)
1333d6f83370SKeerthy 			return ret;
1334d6f83370SKeerthy 		if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1335d6f83370SKeerthy 			pmic->range[id] = 1;
1336d6f83370SKeerthy 
1337d6f83370SKeerthy 		if (pmic->range[id])
1338429222d0SNishanth Menon 			desc->linear_ranges = smps_high_ranges;
1339d6f83370SKeerthy 		else
1340429222d0SNishanth Menon 			desc->linear_ranges = smps_low_ranges;
1341d6f83370SKeerthy 
1342d6f83370SKeerthy 		if (reg_init && reg_init->roof_floor)
1343429222d0SNishanth Menon 			desc->ops = &tps65917_ops_ext_control_smps;
1344d6f83370SKeerthy 		else
1345429222d0SNishanth Menon 			desc->ops = &tps65917_ops_smps;
1346429222d0SNishanth Menon 		desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1347429222d0SNishanth Menon 		desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1348cf910b6bSNishanth Menon 						    rinfo->vsel_addr);
1349429222d0SNishanth Menon 		desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1350429222d0SNishanth Menon 		desc->ramp_delay = 2500;
1351d6f83370SKeerthy 
1352d6f83370SKeerthy 		/* Read the smps mode for later use. */
1353cf910b6bSNishanth Menon 		addr = rinfo->ctrl_addr;
1354d6f83370SKeerthy 		ret = palmas_smps_read(pmic->palmas, addr, &reg);
1355d6f83370SKeerthy 		if (ret)
1356d6f83370SKeerthy 			return ret;
1357d6f83370SKeerthy 		pmic->current_reg_mode[id] = reg &
1358d6f83370SKeerthy 				PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1359b632815eSNishanth Menon 		desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1360b632815eSNishanth Menon 						      rinfo->ctrl_addr);
1361b632815eSNishanth Menon 		desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1362b632815eSNishanth Menon 		/* set_mode overrides this value */
1363b632815eSNishanth Menon 		desc->enable_val = SMPS_CTRL_MODE_ON;
1364d6f83370SKeerthy 
1365429222d0SNishanth Menon 		desc->type = REGULATOR_VOLTAGE;
1366429222d0SNishanth Menon 		desc->owner = THIS_MODULE;
1367d6f83370SKeerthy 
1368d6f83370SKeerthy 		if (pdata)
1369d6f83370SKeerthy 			config.init_data = pdata->reg_data[id];
1370d6f83370SKeerthy 		else
1371d6f83370SKeerthy 			config.init_data = NULL;
1372d6f83370SKeerthy 
1373429222d0SNishanth Menon 		desc->supply_name = rinfo->sname;
1374d6f83370SKeerthy 		config.of_node = ddata->palmas_matches[id].of_node;
1375d6f83370SKeerthy 
1376429222d0SNishanth Menon 		rdev = devm_regulator_register(pmic->dev, desc, &config);
1377d6f83370SKeerthy 		if (IS_ERR(rdev)) {
1378d6f83370SKeerthy 			dev_err(pmic->dev,
1379d6f83370SKeerthy 				"failed to register %s regulator\n",
1380d6f83370SKeerthy 				pdev_name);
1381d6f83370SKeerthy 			return PTR_ERR(rdev);
1382d6f83370SKeerthy 		}
1383d6f83370SKeerthy 	}
1384d6f83370SKeerthy 
1385d6f83370SKeerthy 	return 0;
1386d6f83370SKeerthy }
1387d6f83370SKeerthy 
1388cac9e916SKeerthy static struct of_regulator_match palmas_matches[] = {
1389cac9e916SKeerthy 	{ .name = "smps12", },
1390cac9e916SKeerthy 	{ .name = "smps123", },
1391cac9e916SKeerthy 	{ .name = "smps3", },
1392cac9e916SKeerthy 	{ .name = "smps45", },
1393cac9e916SKeerthy 	{ .name = "smps457", },
1394cac9e916SKeerthy 	{ .name = "smps6", },
1395cac9e916SKeerthy 	{ .name = "smps7", },
1396cac9e916SKeerthy 	{ .name = "smps8", },
1397cac9e916SKeerthy 	{ .name = "smps9", },
1398cac9e916SKeerthy 	{ .name = "smps10_out2", },
1399cac9e916SKeerthy 	{ .name = "smps10_out1", },
1400cac9e916SKeerthy 	{ .name = "ldo1", },
1401cac9e916SKeerthy 	{ .name = "ldo2", },
1402cac9e916SKeerthy 	{ .name = "ldo3", },
1403cac9e916SKeerthy 	{ .name = "ldo4", },
1404cac9e916SKeerthy 	{ .name = "ldo5", },
1405cac9e916SKeerthy 	{ .name = "ldo6", },
1406cac9e916SKeerthy 	{ .name = "ldo7", },
1407cac9e916SKeerthy 	{ .name = "ldo8", },
1408cac9e916SKeerthy 	{ .name = "ldo9", },
1409cac9e916SKeerthy 	{ .name = "ldoln", },
1410cac9e916SKeerthy 	{ .name = "ldousb", },
1411cac9e916SKeerthy 	{ .name = "regen1", },
1412cac9e916SKeerthy 	{ .name = "regen2", },
1413cac9e916SKeerthy 	{ .name = "regen3", },
1414cac9e916SKeerthy 	{ .name = "sysen1", },
1415cac9e916SKeerthy 	{ .name = "sysen2", },
1416cac9e916SKeerthy };
1417cac9e916SKeerthy 
1418d6f83370SKeerthy static struct of_regulator_match tps65917_matches[] = {
1419d6f83370SKeerthy 	{ .name = "smps1", },
1420d6f83370SKeerthy 	{ .name = "smps2", },
1421d6f83370SKeerthy 	{ .name = "smps3", },
1422d6f83370SKeerthy 	{ .name = "smps4", },
1423d6f83370SKeerthy 	{ .name = "smps5", },
1424be035303SKeerthy 	{ .name = "smps12",},
1425d6f83370SKeerthy 	{ .name = "ldo1", },
1426d6f83370SKeerthy 	{ .name = "ldo2", },
1427d6f83370SKeerthy 	{ .name = "ldo3", },
1428d6f83370SKeerthy 	{ .name = "ldo4", },
1429d6f83370SKeerthy 	{ .name = "ldo5", },
1430d6f83370SKeerthy 	{ .name = "regen1", },
1431d6f83370SKeerthy 	{ .name = "regen2", },
1432d6f83370SKeerthy 	{ .name = "regen3", },
1433d6f83370SKeerthy 	{ .name = "sysen1", },
1434d6f83370SKeerthy 	{ .name = "sysen2", },
1435d6f83370SKeerthy };
1436d6f83370SKeerthy 
14374b09e17bSNishanth Menon static struct palmas_pmic_driver_data palmas_ddata = {
1438cac9e916SKeerthy 	.smps_start = PALMAS_REG_SMPS12,
1439cac9e916SKeerthy 	.smps_end = PALMAS_REG_SMPS10_OUT1,
1440cac9e916SKeerthy 	.ldo_begin = PALMAS_REG_LDO1,
1441cac9e916SKeerthy 	.ldo_end = PALMAS_REG_LDOUSB,
1442cac9e916SKeerthy 	.max_reg = PALMAS_NUM_REGS,
1443e999c728SKeerthy 	.has_regen3 = true,
14446839cd6fSNishanth Menon 	.palmas_regs_info = palmas_generic_regs_info,
1445cac9e916SKeerthy 	.palmas_matches = palmas_matches,
1446cac9e916SKeerthy 	.sleep_req_info = palma_sleep_req_info,
1447cac9e916SKeerthy 	.smps_register = palmas_smps_registration,
1448cac9e916SKeerthy 	.ldo_register = palmas_ldo_registration,
1449cac9e916SKeerthy };
1450cac9e916SKeerthy 
14514b09e17bSNishanth Menon static struct palmas_pmic_driver_data tps65917_ddata = {
1452d6f83370SKeerthy 	.smps_start = TPS65917_REG_SMPS1,
1453be035303SKeerthy 	.smps_end = TPS65917_REG_SMPS12,
1454d6f83370SKeerthy 	.ldo_begin = TPS65917_REG_LDO1,
1455d6f83370SKeerthy 	.ldo_end = TPS65917_REG_LDO5,
1456d6f83370SKeerthy 	.max_reg = TPS65917_NUM_REGS,
1457e999c728SKeerthy 	.has_regen3 = true,
1458d6f83370SKeerthy 	.palmas_regs_info = tps65917_regs_info,
1459d6f83370SKeerthy 	.palmas_matches = tps65917_matches,
1460d6f83370SKeerthy 	.sleep_req_info = tps65917_sleep_req_info,
1461d6f83370SKeerthy 	.smps_register = tps65917_smps_registration,
1462d6f83370SKeerthy 	.ldo_register = tps65917_ldo_registration,
1463d6f83370SKeerthy };
1464d6f83370SKeerthy 
palmas_dt_to_pdata(struct device * dev,struct device_node * node,struct palmas_pmic_platform_data * pdata,struct palmas_pmic_driver_data * ddata)14657f091e53SNishanth Menon static int palmas_dt_to_pdata(struct device *dev,
1466cac9e916SKeerthy 			      struct device_node *node,
1467cac9e916SKeerthy 			      struct palmas_pmic_platform_data *pdata,
1468cac9e916SKeerthy 			      struct palmas_pmic_driver_data *ddata)
1469cac9e916SKeerthy {
1470cac9e916SKeerthy 	struct device_node *regulators;
1471cac9e916SKeerthy 	u32 prop;
1472cac9e916SKeerthy 	int idx, ret;
1473cac9e916SKeerthy 
1474cac9e916SKeerthy 	regulators = of_get_child_by_name(node, "regulators");
1475cac9e916SKeerthy 	if (!regulators) {
1476cac9e916SKeerthy 		dev_info(dev, "regulator node not found\n");
14777f091e53SNishanth Menon 		return 0;
1478cac9e916SKeerthy 	}
1479cac9e916SKeerthy 
1480cac9e916SKeerthy 	ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1481cac9e916SKeerthy 				 ddata->max_reg);
1482cac9e916SKeerthy 	of_node_put(regulators);
1483cac9e916SKeerthy 	if (ret < 0) {
1484cac9e916SKeerthy 		dev_err(dev, "Error parsing regulator init data: %d\n", ret);
14857f091e53SNishanth Menon 		return 0;
1486cac9e916SKeerthy 	}
1487cac9e916SKeerthy 
1488cac9e916SKeerthy 	for (idx = 0; idx < ddata->max_reg; idx++) {
148996e4f523SJulia Lawall 		struct of_regulator_match *match;
14901b42443dSNishanth Menon 		struct palmas_reg_init *rinit;
14916c7d614fSNishanth Menon 		struct device_node *np;
1492036d193dSNishanth Menon 
1493036d193dSNishanth Menon 		match = &ddata->palmas_matches[idx];
14946c7d614fSNishanth Menon 		np = match->of_node;
1495036d193dSNishanth Menon 
14966c7d614fSNishanth Menon 		if (!match->init_data || !np)
1497cac9e916SKeerthy 			continue;
1498cac9e916SKeerthy 
14991b42443dSNishanth Menon 		rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
15007f091e53SNishanth Menon 		if (!rinit)
15017f091e53SNishanth Menon 			return -ENOMEM;
15027f091e53SNishanth Menon 
1503036d193dSNishanth Menon 		pdata->reg_data[idx] = match->init_data;
15041b42443dSNishanth Menon 		pdata->reg_init[idx] = rinit;
1505cac9e916SKeerthy 
15066c7d614fSNishanth Menon 		rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
15076c7d614fSNishanth Menon 		ret = of_property_read_u32(np, "ti,roof-floor", &prop);
1508cac9e916SKeerthy 		/* EINVAL: Property not found */
1509cac9e916SKeerthy 		if (ret != -EINVAL) {
1510cac9e916SKeerthy 			int econtrol;
1511cac9e916SKeerthy 
1512cac9e916SKeerthy 			/* use default value, when no value is specified */
1513cac9e916SKeerthy 			econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1514cac9e916SKeerthy 			if (!ret) {
1515cac9e916SKeerthy 				switch (prop) {
1516cac9e916SKeerthy 				case 1:
1517cac9e916SKeerthy 					econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1518cac9e916SKeerthy 					break;
1519cac9e916SKeerthy 				case 2:
1520cac9e916SKeerthy 					econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1521cac9e916SKeerthy 					break;
1522cac9e916SKeerthy 				case 3:
1523cac9e916SKeerthy 					econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1524cac9e916SKeerthy 					break;
1525cac9e916SKeerthy 				default:
1526cac9e916SKeerthy 					WARN_ON(1);
1527cac9e916SKeerthy 					dev_warn(dev,
1528cac9e916SKeerthy 						 "%s: Invalid roof-floor option: %u\n",
1529036d193dSNishanth Menon 						 match->name, prop);
1530cac9e916SKeerthy 					break;
1531cac9e916SKeerthy 				}
1532cac9e916SKeerthy 			}
15331b42443dSNishanth Menon 			rinit->roof_floor = econtrol;
1534cac9e916SKeerthy 		}
1535cac9e916SKeerthy 
15366c7d614fSNishanth Menon 		ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
1537cac9e916SKeerthy 		if (!ret)
15381b42443dSNishanth Menon 			rinit->mode_sleep = prop;
1539cac9e916SKeerthy 
15406c7d614fSNishanth Menon 		ret = of_property_read_bool(np, "ti,smps-range");
1541cac9e916SKeerthy 		if (ret)
15421b42443dSNishanth Menon 			rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
1543cac9e916SKeerthy 
1544cac9e916SKeerthy 		if (idx == PALMAS_REG_LDO8)
1545cac9e916SKeerthy 			pdata->enable_ldo8_tracking = of_property_read_bool(
15466c7d614fSNishanth Menon 						np, "ti,enable-ldo8-tracking");
1547cac9e916SKeerthy 	}
1548cac9e916SKeerthy 
1549cac9e916SKeerthy 	pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
15507f091e53SNishanth Menon 
15517f091e53SNishanth Menon 	return 0;
1552cac9e916SKeerthy }
1553cac9e916SKeerthy 
1554cdbf6f0eSFabian Frederick static const struct of_device_id of_palmas_match_tbl[] = {
1555cac9e916SKeerthy 	{
1556cac9e916SKeerthy 		.compatible = "ti,palmas-pmic",
1557cac9e916SKeerthy 		.data = &palmas_ddata,
1558cac9e916SKeerthy 	},
1559cac9e916SKeerthy 	{
1560cac9e916SKeerthy 		.compatible = "ti,twl6035-pmic",
1561cac9e916SKeerthy 		.data = &palmas_ddata,
1562cac9e916SKeerthy 	},
1563cac9e916SKeerthy 	{
1564cac9e916SKeerthy 		.compatible = "ti,twl6036-pmic",
1565cac9e916SKeerthy 		.data = &palmas_ddata,
1566cac9e916SKeerthy 	},
1567cac9e916SKeerthy 	{
1568cac9e916SKeerthy 		.compatible = "ti,twl6037-pmic",
1569cac9e916SKeerthy 		.data = &palmas_ddata,
1570cac9e916SKeerthy 	},
1571cac9e916SKeerthy 	{
1572cac9e916SKeerthy 		.compatible = "ti,tps65913-pmic",
1573cac9e916SKeerthy 		.data = &palmas_ddata,
1574cac9e916SKeerthy 	},
1575cac9e916SKeerthy 	{
1576cac9e916SKeerthy 		.compatible = "ti,tps65914-pmic",
1577cac9e916SKeerthy 		.data = &palmas_ddata,
1578cac9e916SKeerthy 	},
1579cac9e916SKeerthy 	{
1580cac9e916SKeerthy 		.compatible = "ti,tps80036-pmic",
1581cac9e916SKeerthy 		.data = &palmas_ddata,
1582cac9e916SKeerthy 	},
1583cac9e916SKeerthy 	{
1584cac9e916SKeerthy 		.compatible = "ti,tps659038-pmic",
1585cac9e916SKeerthy 		.data = &palmas_ddata,
1586cac9e916SKeerthy 	},
1587d6f83370SKeerthy 	 {
1588d6f83370SKeerthy 		.compatible = "ti,tps65917-pmic",
1589d6f83370SKeerthy 		.data = &tps65917_ddata,
1590d6f83370SKeerthy 	},
1591a361cd9fSGraeme Gregory 	{ /* end */ }
1592a361cd9fSGraeme Gregory };
1593a361cd9fSGraeme Gregory 
palmas_regulators_probe(struct platform_device * pdev)1594cac9e916SKeerthy static int palmas_regulators_probe(struct platform_device *pdev)
1595cac9e916SKeerthy {
1596cac9e916SKeerthy 	struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1597*1fc2e768SColin Ian King 	struct palmas_pmic_platform_data *pdata;
1598cac9e916SKeerthy 	struct device_node *node = pdev->dev.of_node;
1599cac9e916SKeerthy 	struct palmas_pmic_driver_data *driver_data;
1600cac9e916SKeerthy 	struct regulator_config config = { };
1601cac9e916SKeerthy 	struct palmas_pmic *pmic;
1602cac9e916SKeerthy 	const char *pdev_name;
1603cac9e916SKeerthy 	int ret = 0;
1604cac9e916SKeerthy 	unsigned int reg;
1605cac9e916SKeerthy 
16068f7e17d8SRob Herring 	driver_data = (struct palmas_pmic_driver_data *)device_get_match_data(&pdev->dev);
16078f7e17d8SRob Herring 	if (!driver_data)
1608cac9e916SKeerthy 		return -ENODATA;
1609cac9e916SKeerthy 
1610cac9e916SKeerthy 	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1611cac9e916SKeerthy 	if (!pdata)
1612cac9e916SKeerthy 		return -ENOMEM;
1613cac9e916SKeerthy 
1614cac9e916SKeerthy 	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1615cac9e916SKeerthy 	if (!pmic)
1616cac9e916SKeerthy 		return -ENOMEM;
1617cac9e916SKeerthy 
1618e999c728SKeerthy 	if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
1619e03826d5SKeerthy 		palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
1620e03826d5SKeerthy 							TPS659038_REGEN2_CTRL;
1621e999c728SKeerthy 		palmas_ddata.has_regen3 = false;
1622e999c728SKeerthy 	}
1623e03826d5SKeerthy 
1624cac9e916SKeerthy 	pmic->dev = &pdev->dev;
1625cac9e916SKeerthy 	pmic->palmas = palmas;
1626cac9e916SKeerthy 	palmas->pmic = pmic;
1627cac9e916SKeerthy 	platform_set_drvdata(pdev, pmic);
1628cac9e916SKeerthy 	pmic->palmas->pmic_ddata = driver_data;
1629cac9e916SKeerthy 
16307f091e53SNishanth Menon 	ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
16317f091e53SNishanth Menon 	if (ret)
16327f091e53SNishanth Menon 		return ret;
1633cac9e916SKeerthy 
1634cac9e916SKeerthy 	ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
1635cac9e916SKeerthy 	if (ret)
1636cac9e916SKeerthy 		return ret;
1637cac9e916SKeerthy 
1638be035303SKeerthy 	if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) {
1639cac9e916SKeerthy 		pmic->smps123 = 1;
1640be035303SKeerthy 		pmic->smps12 = 1;
1641be035303SKeerthy 	}
1642cac9e916SKeerthy 
1643cac9e916SKeerthy 	if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1644cac9e916SKeerthy 		pmic->smps457 = 1;
1645cac9e916SKeerthy 
1646cac9e916SKeerthy 	config.regmap = palmas->regmap[REGULATOR_SLAVE];
1647cac9e916SKeerthy 	config.dev = &pdev->dev;
1648cac9e916SKeerthy 	config.driver_data = pmic;
1649cac9e916SKeerthy 	pdev_name = pdev->name;
1650cac9e916SKeerthy 
1651cac9e916SKeerthy 	ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1652cac9e916SKeerthy 					 config);
1653cac9e916SKeerthy 	if (ret)
1654cac9e916SKeerthy 		return ret;
1655cac9e916SKeerthy 
1656cac9e916SKeerthy 	ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1657cac9e916SKeerthy 					config);
1658cac9e916SKeerthy 
1659cac9e916SKeerthy 	return ret;
1660cac9e916SKeerthy }
1661cac9e916SKeerthy 
1662e5ce4208SGraeme Gregory static struct platform_driver palmas_driver = {
1663e5ce4208SGraeme Gregory 	.driver = {
1664e5ce4208SGraeme Gregory 		.name = "palmas-pmic",
1665259b93b2SDouglas Anderson 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
1666a361cd9fSGraeme Gregory 		.of_match_table = of_palmas_match_tbl,
1667e5ce4208SGraeme Gregory 	},
1668bbcf50b1SLaxman Dewangan 	.probe = palmas_regulators_probe,
1669e5ce4208SGraeme Gregory };
1670e5ce4208SGraeme Gregory 
palmas_init(void)1671e5ce4208SGraeme Gregory static int __init palmas_init(void)
1672e5ce4208SGraeme Gregory {
1673e5ce4208SGraeme Gregory 	return platform_driver_register(&palmas_driver);
1674e5ce4208SGraeme Gregory }
1675e5ce4208SGraeme Gregory subsys_initcall(palmas_init);
1676e5ce4208SGraeme Gregory 
palmas_exit(void)1677e5ce4208SGraeme Gregory static void __exit palmas_exit(void)
1678e5ce4208SGraeme Gregory {
1679e5ce4208SGraeme Gregory 	platform_driver_unregister(&palmas_driver);
1680e5ce4208SGraeme Gregory }
1681e5ce4208SGraeme Gregory module_exit(palmas_exit);
1682e5ce4208SGraeme Gregory 
1683e5ce4208SGraeme Gregory MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1684e5ce4208SGraeme Gregory MODULE_DESCRIPTION("Palmas voltage regulator driver");
1685e5ce4208SGraeme Gregory MODULE_LICENSE("GPL");
1686e5ce4208SGraeme Gregory MODULE_ALIAS("platform:palmas-pmic");
1687a361cd9fSGraeme Gregory MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
1688