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/linux/drivers/regulator/
H A Dmax77620-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
21 #define max77620_rails(_name) "max77620-"#_name
99 static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic, in max77620_regulator_get_fps_src() argument
100 int id) in max77620_regulator_get_fps_src() argument
102 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; in max77620_regulator_get_fps_src()
106 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val); in max77620_regulator_get_fps_src()
108 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n", in max77620_regulator_get_fps_src()
109 rinfo->fps_addr, ret); in max77620_regulator_get_fps_src()
116 static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic, in max77620_regulator_set_fps_src() argument
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H A Dpalmas-regulator.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Regulator part of Palmas PMIC Chips
5 * Copyright 2011-2013 Texas Instruments Inc.
41 .sname = "smps1-in",
49 .sname = "smps1-in",
57 .sname = "smps3-in",
64 .sname = "smps4-in",
72 .sname = "smps4-in",
80 .sname = "smps6-in",
88 .sname = "smps7-in",
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H A Dtps65910-regulator.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * tps65910.c -- TI tps65910
274 #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits)) argument
319 static int tps65910_get_ctrl_register(int id) in tps65910_get_ctrl_register() argument
321 switch (id) { in tps65910_get_ctrl_register()
351 return -EINVAL; in tps65910_get_ctrl_register()
355 static int tps65911_get_ctrl_register(int id) in tps65911_get_ctrl_register() argument
357 switch (id) { in tps65911_get_ctrl_register()
385 return -EINVAL; in tps65911_get_ctrl_register()
391 struct tps65910_reg *pmic = rdev_get_drvdata(dev); in tps65910_set_mode() local
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H A Dmax8907-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max8907-regulator.c -- support regulators in max8907
5 * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
6 * Copyright (C) 2010-2012, NVIDIA CORPORATION. All rights reserved.
8 * Portions based on drivers/regulator/tps65910-regulator.c,
40 .id = MAX8907_MBATT, \
50 .id = MAX8907_##ids, \
51 .n_voltages = ((max) - (min)) / (step) + 1, \
67 .id = MAX8907_##ids, \
79 .id = MAX8907_##ids, \
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H A Ds5m8767.c1 // SPDX-License-Identifier: GPL-2.0+
171 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); in s5m8767_get_register()
174 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); in s5m8767_get_register()
180 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; in s5m8767_get_register()
186 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; in s5m8767_get_register()
189 return -EINVAL; in s5m8767_get_register()
192 for (i = 0; i < s5m8767->num_regulators; i++) { in s5m8767_get_register()
193 if (s5m8767->opmode[i].id == reg_id) { in s5m8767_get_register()
194 mode = s5m8767->opmode[i].mode; in s5m8767_get_register()
199 if (i >= s5m8767->num_regulators) in s5m8767_get_register()
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H A Dmcp16502.c1 // SPDX-License-Identifier: GPL-2.0
3 // MCP16502 PMIC driver
9 // Inspired from tps65086-regulator.c
29 * The PMIC has four sets of registers corresponding to four power modes:
30 * Performance, Active, Low-power, Hibernate.
37 * In order for the PMIC to transition to operating modes it has to be
41 * a low-power state while the PMIC is in Active mode. They are supposed to be
42 * configured at startup and then simply transition to/from a global low-power
45 * This driver keeps the PMIC in Active mode, Low-power state is set for the
48 * The PMIC's Low-power and Hibernate modes are used during standby/suspend.
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H A Dhi6421v530-regulator.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/mfd/hi6421-pmic.h>
21 * struct hi6421v530_regulator_info - hi6421v530 regulator information
61 * _id - LDO id name string
62 * v_table - voltage table
63 * vreg - voltage select register
64 * vmask - voltage select mask
65 * ereg - enable register
66 * emask - enable mask
67 * odelay - off/on delay time in uS
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/linux/drivers/mfd/
H A Dintel_soc_pmic_chtwc.c1 // SPDX-License-Identifier: GPL-2.0
3 * MFD core driver for Intel Cherrytrail Whiskey Cove PMIC
7 * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
8 * Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
22 /* PMIC device registers */
30 /* Whiskey Cove PMIC share same ACPI ID between different platforms */
76 int ret, orig_addr = client->addr; in cht_wc_byte_reg_read()
79 dev_err(&client->dev, "Error I2C address not specified\n"); in cht_wc_byte_reg_read()
80 return -EINVAL; in cht_wc_byte_reg_read()
83 client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT; in cht_wc_byte_reg_read()
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H A Dmt6397-core.c1 // SPDX-License-Identifier: GPL-2.0-only
122 .name = "mt6323-rtc",
125 .of_compatible = "mediatek,mt6323-rtc",
127 .name = "mt6323-regulator",
128 .of_compatible = "mediatek,mt6323-regulator"
130 .name = "mt6323-led",
131 .of_compatible = "mediatek,mt6323-led"
133 .name = "mtk-pmic-keys",
136 .of_compatible = "mediatek,mt6323-keys"
138 .name = "mt6323-pwrc",
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H A Dqcom-spmi-pmic.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <soc/qcom/qcom-spmi-pmic.h>
32 struct qcom_spmi_pmic pmic; member
70 { .compatible = "qcom,spmi-pmic", .data = N_USIDS(1) },
75 * A PMIC can be represented by multiple SPMI devices, but
76 * only the base PMIC device will contain a reference to
79 * This function takes a pointer to a pmic device and
80 * returns a pointer to the base PMIC device.
94 if (sdev->usid % ctx->num_usids == 0) { in qcom_pmic_get_base_usid()
95 get_device(&sdev->dev); in qcom_pmic_get_base_usid()
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/linux/arch/arm/mach-omap2/
H A Dvp.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "prm-regbits-34xx.h"
10 #include "prm-regbits-44xx.h"
15 struct omap_vp_instance *vp = voltdm->vp; in _vp_set_init_voltage()
19 vsel = voltdm->pmic->uv_to_vsel(volt); in _vp_set_init_voltage()
21 vpconfig = voltdm->read(vp->vpconfig); in _vp_set_init_voltage()
22 vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | in _vp_set_init_voltage()
23 vp->common->vpconfig_forceupdate | in _vp_set_init_voltage()
24 vp->common->vpconfig_initvdd); in _vp_set_init_voltage()
25 vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); in _vp_set_init_voltage()
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/linux/drivers/extcon/
H A Dextcon-intel-mrfld.c1 // SPDX-License-Identifier: GPL-2.0
3 * extcon driver for Basin Cove PMIC
9 #include <linux/extcon-provider.h>
18 #include "extcon-intel.h"
54 unsigned int id; member
70 return regmap_update_bits(data->regmap, reg, mask, 0x00); in mrfld_extcon_clear()
76 return regmap_update_bits(data->regmap, reg, mask, 0xff); in mrfld_extcon_set()
82 struct device *dev = data->dev; in mrfld_extcon_sw_control()
96 struct regmap *regmap = data->regmap; in mrfld_extcon_get_id()
97 unsigned int id; in mrfld_extcon_get_id() local
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H A Dextcon-intel-cht-wc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Extcon charger detection driver for Intel Cherrytrail Whiskey Cove PMIC
6 * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
7 * Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
10 #include <linux/extcon-provider.h>
24 #include "extcon-intel.h"
67 /* 0 - open drain, 1 - regular push-pull output */
69 /* 0 - pin is controlled by SW, 1 - by HW */
125 * According to the spec. we should read the USB-ID pin ADC value here in cht_wc_extcon_get_id()
126 * to determine the resistance of the used pull-down resister and then in cht_wc_extcon_get_id()
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,pmic-glink.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,pmic-glink.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GLINK firmware interface for battery management, USB
8 Type-C and other things.
11 - Bjorn Andersson <andersson@kernel.org>
14 The PMIC GLINK service, running on a coprocessor on some modern Qualcomm
15 platforms and implement USB Type-C handling and battery management. This
18 particularly the USB Type-C controllers relationship with USB and DisplayPort
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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dmotorola,cpcap-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/motorola,cpcap-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Motorola CPCAP PMIC ADC
10 - Tony Lindgren <tony@atomide.com>
13 On Motorola phones like droid 4 there is a custom CPCAP PMIC. This PMIC
14 has ADCs that are used for battery charging and USB PHY VBUS and ID pin
20 - motorola,cpcap-adc
21 - motorola,mapphone-cpcap-adc
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H A Dmediatek,mt6359-auxadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/mediatek,mt6359-auxadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT6350 series PMIC AUXADC
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
14 in some MediaTek PMICs, performing various PMIC related measurements
15 such as battery and PMIC internal voltage regulators temperatures,
17 other than voltages for various PMIC internal components.
22 - mediatek,mt6357-auxadc
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/linux/Documentation/devicetree/bindings/mfd/
H A Dsamsung,s2mps11.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mfd/samsung,s2mps11.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 Management IC (PMIC).
18 sub-blocks.
23 - samsung,s2mps11-pmic
24 - samsung,s2mps13-pmic
25 - samsung,s2mps14-pmic
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/linux/Documentation/devicetree/bindings/regulator/
H A Drohm,bd71815-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
33 regulator-name:
37 "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$":
44 regulator-name:
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H A Drohm,bd96801-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd96801-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
24 "^ldo[5-7]$":
31 rohm,initial-voltage-microvolt:
33 Initial voltage for regulator. Voltage can be tuned +/-150 mV from
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H A Dmaxim,max8997.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/regulator/maxim,max8997.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 motor driver, flash LED driver and Micro-USB Interface Controller.
22 const: maxim,max8997-pmic
24 charger-supply:
30 - description: irq1 interrupt
31 - description: alert interrupt
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H A Drenesas,raa215300.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/renesas,raa215300.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RAA215300 Power Management Integrated Circuit (PMIC)
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 The RAA215300 is a high-performance, low-cost 9-channel PMIC designed for
14 32-bit and 64-bit MCU and MPU applications. It supports DDR3, DDR3L, DDR4,
16 built-in Real-Time Clock (RTC), 32kHz crystal oscillator, and coin cell
18 ideal for System-On-Module (SOM) applications. A spread spectrum feature
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/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,pwrap.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek PMIC Wrapper
10 - Flora Fu <flora.fu@mediatek.com>
11 - Alexandre Mergnat <amergnat@baylibre.com>
14 On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
15 is not directly visible to the CPU, but only through the PMIC wrapper
16 inside the SoC. The communication between the SoC and the PMIC can
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,pmic-mpp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-mpp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC Multi-Purpose Pin (MPP) block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 PMIC's from Qualcomm.
19 - items:
20 - enum:
21 - qcom,pm8019-mpp
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/linux/drivers/iio/adc/
H A Dqcom-spmi-rradc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2017, 2019, The Linux Foundation. All rights reserved.
28 #include <soc/qcom/qcom-spmi-pmic.h>
30 #define DRIVER_NAME "qcom-spmi-rradc"
219 * struct rradc_channel - rradc channel data
241 const struct qcom_spmi_pmic *pmic; member
263 dev_err(chip->dev, in rradc_read()
266 return -EINVAL; in rradc_read()
270 ret = regmap_bulk_read(chip->regmap, chip->base + addr, buf, in rradc_read()
273 dev_err(chip->dev, "rr_adc reg 0x%x failed :%d\n", addr, in rradc_read()
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/linux/Documentation/devicetree/bindings/bus/
H A Dqcom,ssbi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ssbi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Single-wire Serial Bus Interface (SSBI)
10 Some Qualcomm MSM devices contain a point-to-point serial bus used to
15 - Andy Gross <agross@kernel.org>
16 - Bjorn Andersson <andersson@kernel.org>
25 qcom,controller-type:
31 - ssbi
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