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/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8997.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 motor driver, flash LED driver and Micro-USB Interface Controller.
22 const: maxim,max8997-pmic
24 charger-supply:
30 - description: irq1 interrupt
31 - description: alert interrupt
33 max8997,pmic-buck1-dvs-voltage:
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H A Dnxp,pca9450-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/nxp,pca9450-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robin Gong <yibin.gong@nxp.com>
18 https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf
21 # BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6,
23 # Note: Buck3 removed on PCA9450B and connect with Buck1 on PCA9450C.
28 - nxp,pca9450a
29 - nxp,pca9450b
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H A Drohm,bd71815-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
20 buck1, buck2, buck3, buck4, buck5,
33 regulator-name:
37 "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$":
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/linux/Documentation/devicetree/bindings/mfd/
H A Dmaxim,max8998.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 sub-blocks. It is interfaced using an I2C interface. Each sub-block is
21 - maxim,max8998
22 - national,lp3974
23 - ti,lp3974
31 - description: Main interrupt
32 - description: Power-on/-off interrupt
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/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210-aquila.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
35 pmic_ap_clk: clock-0 {
36 /* Workaround for missing clock on PMIC */
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
39 clock-frequency = <32768>;
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H A Ds5pv210-goni.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/input/input.h>
38 pmic_ap_clk: clock-0 {
39 /* Workaround for missing clock on PMIC */
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
[all …]
H A Dexynos4210-trats.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
37 stdout-path = "serial2:115200n8";
40 vemmc_reg: regulator-0 {
41 compatible = "regulator-fixed";
42 regulator-name = "VMEM_VDD_2.8V";
43 regulator-min-microvolt = <2800000>;
44 regulator-max-microvolt = <2800000>;
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H A Dexynos4210-universal_c210.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
39 fixed-rate-clocks {
41 compatible = "samsung,clock-xxti";
42 clock-frequency = <0>;
46 compatible = "samsung,clock-xusbxti";
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H A Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
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H A Dexynos4210-origen.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
14 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
19 #include "exynos-mfc-reserved-memory.dtsi"
40 stdout-path = "serial2:115200n8";
43 mmc_reg: voltage-regulator {
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H A Dexynos4210-i9100.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree
11 /dts-v1/;
13 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
19 model = "Samsung Galaxy S2 (GT-I9100)";
21 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
38 vemmc_reg: regulator-0 {
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H A Dexynos4412-itop-scp-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
17 #include "exynos4412-ppmu-common.dtsi"
18 #include "exynos-mfc-reserved-memory.dtsi"
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
37 compatible = "samsung,clock-xxti";
38 clock-frequency = <0>;
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H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-phanbell.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
[all …]
H A Dimx8mq-pico-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <32768>;
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H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
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H A Dimx8mp-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/net/ti-dp83867.h>
11 model = "PHYTEC phyCORE-i.MX8MP";
12 compatible = "phytec,imx8mp-phycore-som", "fsl,imx8mp";
24 reg_vdd_io: regulator-vdd-io {
25 compatible = "regulator-fixed";
26 regulator-always-on;
27 regulator-boot-on;
28 regulator-max-microvolt = <3300000>;
29 regulator-min-microvolt = <3300000>;
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H A Dimx8mn-tqma8mqnl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
9 model = "TQ-Systems i.MX8MN TQMa8MxNL";
10 compatible = "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
18 /* e-MMC IO, needed for HS modes */
19 reg_vcc1v8: regulator-vcc1v8 {
20 compatible = "regulator-fixed";
21 regulator-name = "TQMA8MXNL_VCC1V8";
22 regulator-min-microvolt = <1800000>;
23 regulator-max-microvolt = <1800000>;
[all …]
H A Dimx8mp-tqma8mpql.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
10 model = "TQ-Systems i.MX8MPlus TQMa8MPxL";
11 compatible = "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
19 reg_vcc3v3: regulator-vcc3v3 {
20 compatible = "regulator-fixed";
21 regulator-name = "VCC3V3";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
[all …]
H A Dimx8mp-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/usb/pd.h>
16 model = "Variscite VAR-SOM-MX8M Plus module";
19 stdout-path = &uart2;
22 gpio-leds {
23 compatible = "gpio-leds";
25 led-0 {
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H A Dimx8mm-tqma8mqml.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML";
11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
19 /* e-MMC IO, needed for HS modes */
20 reg_vcc1v8: regulator-vcc1v8 {
21 compatible = "regulator-fixed";
22 regulator-name = "TQMA8MXML_VCC1V8";
23 regulator-min-microvolt = <1800000>;
[all …]
H A Dimx8mm-kontron-sl.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 compatible = "kontron,imx8mm-sl", "fsl,imx8mm";
23 stdout-path = &uart3;
28 cpu-supply = <&reg_vdd_arm>;
32 cpu-supply = <&reg_vdd_arm>;
36 cpu-supply = <&reg_vdd_arm>;
40 cpu-supply = <&reg_vdd_arm>;
44 operating-points-v2 = <&ddrc_opp_table>;
46 ddrc_opp_table: opp-table {
47 compatible = "operating-points-v2";
[all …]
/linux/drivers/regulator/
H A Dmax8998.c1 // SPDX-License-Identifier: GPL-2.0+
3 // max8998.c - Voltage regulator driver for the Maxim 8998
5 // Copyright (C) 2009-2010 Samsung Electronics
23 #include <linux/mfd/max8998-private.h>
51 *shift = 3 - (ldo - MAX8998_LDO2); in max8998_get_enable_register()
55 *shift = 7 - (ldo - MAX8998_LDO6); in max8998_get_enable_register()
59 *shift = 7 - (ldo - MAX8998_LDO14); in max8998_get_enable_register()
63 *shift = 7 - (ldo - MAX8998_BUCK1); in max8998_get_enable_register()
67 *shift = 7 - (ldo - MAX8998_EN32KHZ_AP); in max8998_get_enable_register()
71 *shift = 7 - (ldo - MAX8998_ESAFEOUT1); in max8998_get_enable_register()
[all …]
H A Dmax8997-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // max8997.c - Regulator driver for the Maxim 8997/8966
20 #include <linux/mfd/max8997-private.h>
51 int set3 = (max8997->buck125_gpioindex) & 0x1; in max8997_set_gpio()
52 int set2 = ((max8997->buck125_gpioindex) >> 1) & 0x1; in max8997_set_gpio()
53 int set1 = ((max8997->buck125_gpioindex) >> 2) & 0x1; in max8997_set_gpio()
55 gpiod_set_value(max8997->buck125_gpiods[0], set1); in max8997_set_gpio()
56 gpiod_set_value(max8997->buck125_gpiods[1], set2); in max8997_set_gpio()
57 gpiod_set_value(max8997->buck125_gpiods[2], set3); in max8997_set_gpio()
73 }; /* Buck1, 2, 4, 5 */
[all …]
H A Ds5m8767.c1 // SPDX-License-Identifier: GPL-2.0+
151 /* BUCK1 ... BUCK9 */
152 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
171 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); in s5m8767_get_register()
174 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); in s5m8767_get_register()
180 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; in s5m8767_get_register()
186 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; in s5m8767_get_register()
189 return -EINVAL; in s5m8767_get_register()
192 for (i = 0; i < s5m8767->num_regulators; i++) { in s5m8767_get_register()
193 if (s5m8767->opmode[i].id == reg_id) { in s5m8767_get_register()
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