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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-rk805.txt5 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
6 for details of the common pinctrl bindings used by client devices,
10 --------------------------
13 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
14 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
15 <pinctrl-bindings.txt>.
17 The pin configurations are defined as child of the pinctrl states node. Each
18 sub-node have following properties:
21 ------------------
22 - #gpio-cells: Should be two. The first cell is the pin number and the
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H A Dpinctrl-max77620.txt6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
7 for details of the common pinctrl bindings used by client devices,
11 --------------------------
14 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
15 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
16 <pinctrl-bindings.txt>.
18 The pin configurations are defined as child of the pinctrl states node. Each
19 sub-node have following properties:
22 ------------------
23 - pins: List of pins. Valid values of pins properties are:
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H A Dmediatek,mt8192-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
32 gpio-line-names: true
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H A Drockchip,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/rockchip,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
18 Please refer to pinctrl-bindings.txt in this directory for details of the
19 common pinctrl bindings used by client devices, including the meaning of the
26 various pad settings such as pull-up, etc.
29 defined as gpio sub-nodes of the pinmux controller.
34 - rockchip,px30-pinctrl
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H A Dcnxt,cx92755-pinctrl.txt11 - compatible: Must be "cnxt,cx92755-pinctrl"
12 - reg: Base address of the General Purpose Pin Mapping register block and the
14 - gpio-controller: Marks the device node as a GPIO controller.
15 - #gpio-cells: Must be <2>. The first cell is the pin number and the
16 second cell is used to specify flags. See include/dt-bindings/gpio/gpio.h
21 pinctrl: pinctrl@f0000e20 {
22 compatible = "cnxt,cx92755-pinctrl";
24 gpio-controller;
25 #gpio-cells = <2>;
32 For a general description of GPIO bindings, please refer to ../gpio/gpio.txt.
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H A Drenesas,r9a09g077-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,r9a09g077-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 Pin multiplexing and GPIO configuration are performed on a per-pin basis.
22 - renesas,r9a09g077-pinctrl # RZ/T2H
23 - renesas,r9a09g087-pinctrl # RZ/N2H
28 - description: Non-safety I/O Port base
29 - description: Safety I/O Port safety region base
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H A Dmarvell,armada-37xx-pinctrl.txt12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
17 common pinctrl bindings used by client devices, including the meaning
20 Required properties for pinctrl driver:
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
33 - pins 20-24
34 - functions jtag, gpio
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H A Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
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H A Dpinctrl-palmas.txt1 Palmas Pincontrol bindings
7 - compatible: It must be one of following:
8 - "ti,palmas-pinctrl" for Palma series of the pincontrol.
9 - "ti,tps65913-pinctrl" for Palma series device TPS65913.
10 - "ti,tps80036-pinctrl" for Palma series device TPS80036.
12 Please refer to pinctrl-bindings.txt in this directory for details of the
13 common pinctrl bindings used by client devices, including the meaning of the
19 those pin(s), and various pin configuration parameters, such as pull-up,
32 - ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode.
35 - ti,palmas-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode.
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/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-st.txt1 * STMicroelectronics sdhci-st MMC/SD controller
4 Documentation/devicetree/bindings/mmc/mmc.txt and the properties
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock.
16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
18 - interrupts: One mmc interrupt should be described here.
19 - interrupt-names: Should be "mmcirq".
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/linux/Documentation/devicetree/bindings/usb/
H A Ddwc3-st.txt3 This file documents the parameters for the dwc3-st driver.
8 - compatible : must be "st,stih407-dwc3"
9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
11 - st,syscon : should be phandle to system configuration node which
13 - resets : list of phandle and reset specifier pairs. There should be two entries, one
15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
16 See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
17 See: Documentation/devicetree/bindings/reset/reset.txt
19 - #address-cells, #size-cells : should be '1' if the device has sub-nodes
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H A Dehci-st.txt4 - compatible : must be "st,st-ehci-300x"
5 - reg : physical base addresses of the controller and length of memory mapped
7 - interrupts : one EHCI interrupt should be described here
8 - pinctrl-names : a pinctrl state named "default" must be defined
9 - pinctrl-0 : phandle referencing pin configuration of the USB controller
10 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
11 - clocks : phandle list of usb clocks
12 - clock-names : should be "ic" for interconnect clock and "clk48"
13 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
15 - phys : phandle for the PHY device
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-wolfvision-pf5-display.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
8 /dts-v1/;
11 #include <dt-bindings/clock/rk3568-cru.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/rockchip.h>
15 #include <dt-bindings/soc/rockchip,vop2.h>
19 compatible = "pwm-backlight";
20 brightness-levels = <0 255>;
21 default-brightness-level = <255>;
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H A Drk3588-jaguar-ethernet-switch.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * (manual: https://embedded.cherry.de/jaguar-ethernet-switch-user-manual/)
10 * two user controllable LEDs, and an M12 12-pin connector which exposes the
12 * - RS232/RS485 (max 250Kbps/500Kbps, RX pin1, TX pin2)
13 * - two digital inputs (pin4 routed to GPIO3_C5 on SoC, pin5 to GPIO4_B4)
14 * - two digital outputs (pin7 routed to GPIO3_D3 on SoC, pin8 to GPIO3_D1)
15 * - two analog inputs (pin10 to channel1 of ADS1015, pin11 to channel2)
17 * RK3588 Jaguar can be powered entirely through the adapter via the M8 3-pin
18 * connector (12-24V).
21 /dts-v1/;
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H A Drk3566-anbernic-rg-arc-d.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/linux-event-codes.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include "rk3566-anbernic-rg-arc.dtsi"
11 model = "Anbernic RG ARC-D";
12 compatible = "anbernic,rg-arc-d", "rockchip,rk3566";
23 pinctrl-0 = <&i2c2m1_xfer>;
24 pinctrl-names = "default";
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/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-st.txt1 STMicroelectronics PWM driver bindings
2 --------------------------------------
5 - compatible : "st,pwm"
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
8 second cell is the period in nanoseconds - fixed to 2
10 - reg : Physical base address and length of the controller's
12 - pinctrl-names: Set to "default".
13 - pinctrl-0: List of phandles pointing to pin configuration nodes
15 For Pinctrl properties, please refer to [1].
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/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
19 - nvidia,tegra264-pmc
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8939-longcheer-l9100.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8939-pm8916.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
17 chassis-type = "handset";
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/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
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/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dsis_i2c.txt4 - compatible: must be "sis,9200-ts"
5 - reg: i2c slave address
6 - interrupts: touch controller interrupt (see interrupt
10 - pinctrl-names: should be "default" (see pinctrl binding [1]).
11 - pinctrl-0: a phandle pointing to the pin settings for the
12 device (see pinctrl binding [1]).
13 - attn-gpios: the gpio pin used as attention line
14 - reset-gpios: the gpio pin used to reset the controller
15 - wakeup-source: touchscreen can be used as a wakeup source
17 [0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
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/linux/Documentation/devicetree/bindings/mfd/
H A Dbrcm,bcm6358-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
18 "#address-cells": true
20 "#size-cells": true
24 - const: brcm,bcm6358-gpio-sysctl
25 - const: syscon
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H A Das3722.txt4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on
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H A Dbrcm,bcm6318-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6318-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
18 "#address-cells": true
20 "#size-cells": true
24 - const: brcm,bcm6318-gpio-sysctl
25 - const: syscon
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/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3_uart.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
22 pinctrl@fffff200 {
24 pinctrl_uart0: uart0-0 {
32 pinctrl_uart1: uart1-0 {
41 compatible = "atmel,at91sam9260-usart";
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/linux/Documentation/devicetree/bindings/media/
H A Datmel-isi.txt2 ----------------------------------
5 - compatible: must be "atmel,at91sam9g45-isi" or "microchip,sam9x60-isi".
6 - reg: physical base address and length of the registers set for the device.
7 - interrupts: should contain IRQ line for the ISI.
8 - clocks: list of clock specifiers, corresponding to entries in the clock-names
9 property; please refer to clock-bindings.txt.
10 - clock-names: required elements: "isi_clk".
11 - pinctrl-names, pinctrl-0: please refer to pinctrl-bindings.txt.
14 'port' child node with child 'endpoint' node. Please refer to the bindings
15 defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
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