Lines Matching +full:pinctrl +full:- +full:bindings
2 8-/16-bit I/O expander with serial interface (I2C/SPI)
5 - compatible : Should be
6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version
7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or
9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
11 - "microchip,mcp23s08" for 8 GPIO SPI version
12 - "microchip,mcp23s17" for 16 GPIO SPI version
13 - "microchip,mcp23s18" for 16 GPIO SPI version
14 - "microchip,mcp23008" for 8 GPIO I2C version or
15 - "microchip,mcp23017" for 16 GPIO I2C version of the chip
16 - "microchip,mcp23018" for 16 GPIO I2C version
19 - #gpio-cells : Should be two.
20 - first cell is the pin number
21 - second cell is used to specify flags as described in
22 'Documentation/devicetree/bindings/gpio/gpio.txt'. Allowed values defined by
23 'include/dt-bindings/gpio/gpio.h' (e.g. GPIO_ACTIVE_LOW).
24 - gpio-controller : Marks the device node as a GPIO controller.
25 - reg : For an address on its bus. I2C uses this a the I2C address of the chip.
29 microchip,spi-present-mask below.
32 - mcp,spi-present-mask (DEPRECATED)
33 - microchip,spi-present-mask : This is a present flag, that makes only sense for SPI
34 chips - as the name suggests. Multiple SPI chips can share the same
35 SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a
38 which is 0x08. mcp23s08 chip variant only supports bits 0-3. It is not
43 - spi-max-frequency = The maximum frequency this chip is able to handle
46 - #interrupt-cells : Should be two.
47 - first cell is the pin number
48 - second cell is used to specify flags.
49 - interrupt-controller: Marks the device node as a interrupt controller.
50 - drive-open-drain: Sets the ODR flag in the IOCON register. This configures
52 - reset-gpios: Corresponds to the active-low RESET# pin for the chip
55 - microchip,irq-mirror: Sets the mirror flag in the IOCON register. Devices
57 those that have 16 IOs) have two IO banks: IO 0-7 form bank 1 and
58 IO 8-15 are bank 2. These chips have two different interrupt outputs:
59 One for bank 1 and another for bank 2. If irq-mirror is set, both
64 - microchip,irq-active-high: Sets the INTPOL flag in the IOCON register. This
70 gpio-controller;
71 #gpio-cells = <2>;
74 interrupt-parent = <&gpio1>;
76 interrupt-controller;
77 #interrupt-cells=<2>;
78 microchip,irq-mirror;
84 gpio-controller;
85 #gpio-cells = <2>;
86 microchip,spi-present-mask = <0x01>;
88 spi-max-frequency = <1000000>;
91 Pull-up configuration
94 If pins are used as output, they can also be configured with pull-ups. This is
95 done with pinctrl.
97 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
98 for details of the common pinctrl bindings used by client devices,
102 --------------------------
105 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
106 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
107 <pinctrl-bindings.txt>.
109 The pin configurations are defined as child of the pinctrl states node. Each
110 sub-node have following properties:
113 ------------------
114 - pins: List of pins. Valid values of pins properties are:
119 -------------------
121 <pinctrl-bindings.txt>. Absence of this property will leave the configuration
123 bias-pull-up
125 Example with pinctrl to pull-up output pins:
128 gpio-controller;
129 #gpio-cells = <0x2>;
131 interrupt-parent = <&socgpio>;
133 interrupt-names = "mcp23017@21 irq";
134 interrupt-controller;
135 #interrupt-cells = <0x2>;
136 microchip,irq-mirror;
137 pinctrl-names = "default";
138 pinctrl-0 = <&i2cgpio0irq>, <&gpio21pullups>;
139 reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
146 bias-pull-up;