Home
last modified time | relevance | path

Searched +full:physmap +full:- +full:flash (Results 1 – 15 of 15) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dmtd-physmap.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
10 - Rob Herring <robh@kernel.org>
13 Flash chips (Memory Technology Devices) are often used for solid state
17 - $ref: mtd.yaml#
18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
23 - items:
[all …]
H A Dmtd-physmap.txt1 CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
3 Flash chips (Memory Technology Devices) are often used for solid state
6 - compatible : should contain the specific model of mtd chip(s)
7 used, if known, followed by either "cfi-flash", "jedec-flash",
8 "mtd-ram" or "mtd-rom".
9 - reg : Address range(s) of the mtd chip(s)
11 non-identical chips can be described in one node.
12 - bank-width : Width (in bytes) of the bank. Equal to the
14 - device-width : (optional) Width of a single mtd chip. If
15 omitted, assumed to be equal to 'bank-width'.
[all …]
H A Dgpmc-nor.txt1 Device tree bindings for NOR flash connect to TI GPMC
3 NOR flash connected to the TI GPMC (found on OMAP boards) are represented as
8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
11 - bank-width: Width of NOR flash in bytes. GPMC supports 8-bit and
12 16-bit devices and so must be either 1 or 2 bytes.
13 - compatible: Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
14 - gpmc,cs-on-ns: Chip-select assertion time
15 - gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
16 - gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
17 - gpmc,oe-on-ns: Output-enable assertion time
[all …]
H A Dintel,ixp4xx-flash.txt1 Flash device on Intel IXP4xx SoC
3 This flash is regular CFI compatible (Intel or AMD extended) flash chips with
4 specific big-endian or mixed-endian memory access pattern.
7 - compatible : must be "intel,ixp4xx-flash", "cfi-flash";
8 - reg : memory address for the flash chip
9 - bank-width : width in bytes of flash interface, should be <2>
11 For the rest of the properties, see mtd-physmap.txt.
13 The device tree may optionally contain sub-nodes describing partitions of the
18 flash@50000000 {
19 compatible = "intel,ixp4xx-flash", "cfi-flash";
[all …]
H A Dcortina,gemini-flash.txt1 Flash device on Cortina Systems Gemini SoC
3 This flash is regular CFI compatible (Intel or AMD extended) flash chips with
7 - compatible : must be "cortina,gemini-flash", "cfi-flash";
8 - reg : memory address for the flash chip
9 - syscon : must be a phandle to the system controller
10 - bank-width : width in bytes of flash interface, should be <2>
12 For the rest of the properties, see mtd-physmap.yaml.
14 The device tree may optionally contain sub-nodes describing partitions of the
19 flash@30000000 {
20 compatible = "cortina,gemini-flash", "cfi-flash";
[all …]
H A Darm-versatile.txt1 Flash device on ARM Versatile board
3 These flash chips are found in the ARM reference designs like Integrator,
6 They are regular CFI compatible (Intel or AMD extended) flash chips with
11 - compatible : must be "arm,versatile-flash", "cfi-flash";
12 - reg : memory address for the flash chip
13 - bank-width : width in bytes of flash interface.
15 For the rest of the properties, see mtd-physmap.txt.
17 The device tree may optionally contain sub-nodes describing partitions of the
22 flash@34000000 {
23 compatible = "arm,versatile-flash", "cfi-flash";
[all …]
H A Dti,am654-hbmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/ti,am654-hbmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vignesh Raghavendra <vigneshr@ti.com>
14 const: ti,am654-hbmc
19 power-domains: true
20 '#address-cells': true
21 '#size-cells': true
24 mux-controls:
[all …]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91rm9200ek.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit
7 /dts-v1/;
15 stdout-path = "serial0:115200n8";
24 clock-frequency = <32768>;
28 clock-frequency = <18432000>;
36 compatible = "atmel,tcb-timer";
41 compatible = "atmel,tcb-timer";
47 atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
48 atmel,pullup-gpio = <&pioD 5 GPIO_ACTIVE_HIGH>;
[all …]
H A Dsama5d3xcm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module
14 stdout-path = "serial0:115200n8";
23 clock-frequency = <32768>;
27 clock-frequency = <12000000>;
34 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
39 compatible = "atmel,tcb-timer";
44 compatible = "atmel,tcb-timer";
51 pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>;
52 pinctr-name = "default";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx31-lite.dts1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
5 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "logicpd,imx31-lite", "fsl,imx31";
17 stdout-path = &uart1;
26 compatible = "gpio-leds";
43 nand-bus-width = <8>;
44 nand-ecc-mode = "hw";
[all …]
H A Dimx27-eukrea-cpuimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
18 clk14745600: clk-uart {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequenc
[all...]
H A Dimx27-phytec-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
11 compatible = "phytec,imx27-pcm038", "fsl,imx27";
18 reg_3v3: regulator-0 {
19 compatible = "regulator-fixed";
20 regulator-nam
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7280-herobrine.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
25 stdout-path = "serial0:115200n8";
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed";
40 regulator-name = "ppvar_sys";
[all …]
H A Dsc7280-herobrine-herobrine-r0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
24 #include "sc7280-chrome-common.dtsi"
28 compatible = "google,herobrine-rev0", "qcom,sc7280";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]