1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later 2f126890aSEmmanuel Vadot/* 3f126890aSEmmanuel Vadot * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 4f126890aSEmmanuel Vadot */ 5f126890aSEmmanuel Vadot 6f126890aSEmmanuel Vadot/dts-v1/; 7f126890aSEmmanuel Vadot#include "imx27.dtsi" 8f126890aSEmmanuel Vadot 9f126890aSEmmanuel Vadot/ { 10f126890aSEmmanuel Vadot model = "Eukrea CPUIMX27"; 11f126890aSEmmanuel Vadot compatible = "eukrea,cpuimx27", "fsl,imx27"; 12f126890aSEmmanuel Vadot 13f126890aSEmmanuel Vadot memory@a0000000 { 14f126890aSEmmanuel Vadot device_type = "memory"; 15f126890aSEmmanuel Vadot reg = <0xa0000000 0x04000000>; 16f126890aSEmmanuel Vadot }; 17f126890aSEmmanuel Vadot 18f126890aSEmmanuel Vadot clk14745600: clk-uart { 19f126890aSEmmanuel Vadot compatible = "fixed-clock"; 20f126890aSEmmanuel Vadot #clock-cells = <0>; 21f126890aSEmmanuel Vadot clock-frequency = <14745600>; 22f126890aSEmmanuel Vadot }; 23f126890aSEmmanuel Vadot}; 24f126890aSEmmanuel Vadot 25f126890aSEmmanuel Vadot&fec { 26f126890aSEmmanuel Vadot pinctrl-names = "default"; 27f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_fec>; 28f126890aSEmmanuel Vadot status = "okay"; 29f126890aSEmmanuel Vadot}; 30f126890aSEmmanuel Vadot 31f126890aSEmmanuel Vadot&i2c1 { 32f126890aSEmmanuel Vadot pinctrl-names = "default"; 33f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 34f126890aSEmmanuel Vadot status = "okay"; 35f126890aSEmmanuel Vadot 36*8d13bc63SEmmanuel Vadot rtc@51 { 37f126890aSEmmanuel Vadot compatible = "nxp,pcf8563"; 38f126890aSEmmanuel Vadot reg = <0x51>; 39f126890aSEmmanuel Vadot }; 40f126890aSEmmanuel Vadot}; 41f126890aSEmmanuel Vadot 42f126890aSEmmanuel Vadot&nfc { 43f126890aSEmmanuel Vadot pinctrl-names = "default"; 44f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_nfc>; 45f126890aSEmmanuel Vadot nand-bus-width = <8>; 46f126890aSEmmanuel Vadot nand-ecc-mode = "hw"; 47f126890aSEmmanuel Vadot nand-on-flash-bbt; 48f126890aSEmmanuel Vadot status = "okay"; 49f126890aSEmmanuel Vadot}; 50f126890aSEmmanuel Vadot 51f126890aSEmmanuel Vadot&owire { 52f126890aSEmmanuel Vadot pinctrl-names = "default"; 53f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_owire>; 54f126890aSEmmanuel Vadot status = "okay"; 55f126890aSEmmanuel Vadot}; 56f126890aSEmmanuel Vadot 57f126890aSEmmanuel Vadot&sdhci2 { 58f126890aSEmmanuel Vadot pinctrl-names = "default"; 59f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_sdhc2>; 60f126890aSEmmanuel Vadot bus-width = <4>; 61f126890aSEmmanuel Vadot non-removable; 62f126890aSEmmanuel Vadot status = "okay"; 63f126890aSEmmanuel Vadot}; 64f126890aSEmmanuel Vadot 65f126890aSEmmanuel Vadot&uart4 { 66f126890aSEmmanuel Vadot pinctrl-names = "default"; 67f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4>; 68f126890aSEmmanuel Vadot uart-has-rtscts; 69f126890aSEmmanuel Vadot status = "okay"; 70f126890aSEmmanuel Vadot}; 71f126890aSEmmanuel Vadot 72f126890aSEmmanuel Vadot&usbh2 { 73f126890aSEmmanuel Vadot pinctrl-names = "default"; 74f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbh2>; 75f126890aSEmmanuel Vadot dr_mode = "host"; 76f126890aSEmmanuel Vadot phy_type = "ulpi"; 77f126890aSEmmanuel Vadot disable-over-current; 78f126890aSEmmanuel Vadot status = "okay"; 79f126890aSEmmanuel Vadot}; 80f126890aSEmmanuel Vadot 81f126890aSEmmanuel Vadot&usbotg { 82f126890aSEmmanuel Vadot pinctrl-names = "default"; 83f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbotg>; 84f126890aSEmmanuel Vadot dr_mode = "otg"; 85f126890aSEmmanuel Vadot phy_type = "ulpi"; 86f126890aSEmmanuel Vadot disable-over-current; 87f126890aSEmmanuel Vadot status = "okay"; 88f126890aSEmmanuel Vadot}; 89f126890aSEmmanuel Vadot 90f126890aSEmmanuel Vadot&weim { 91f126890aSEmmanuel Vadot status = "okay"; 92f126890aSEmmanuel Vadot 93*8d13bc63SEmmanuel Vadot nor: flash@0,0 { 94f126890aSEmmanuel Vadot #address-cells = <1>; 95f126890aSEmmanuel Vadot #size-cells = <1>; 96f126890aSEmmanuel Vadot compatible = "cfi-flash"; 97f126890aSEmmanuel Vadot reg = <0 0x00000000 0x04000000>; 98f126890aSEmmanuel Vadot bank-width = <2>; 99f126890aSEmmanuel Vadot linux,mtd-name = "physmap-flash.0"; 100f126890aSEmmanuel Vadot fsl,weim-cs-timing = <0x00008f03 0xa0330d01 0x002208c0>; 101f126890aSEmmanuel Vadot }; 102f126890aSEmmanuel Vadot 103f126890aSEmmanuel Vadot uart8250@3,200000 { 104f126890aSEmmanuel Vadot pinctrl-names = "default"; 105f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart8250_1>; 106f126890aSEmmanuel Vadot compatible = "ns8250"; 107f126890aSEmmanuel Vadot clocks = <&clk14745600>; 108f126890aSEmmanuel Vadot fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>; 109f126890aSEmmanuel Vadot interrupts = <&gpio2 23 IRQ_TYPE_LEVEL_LOW>; 110f126890aSEmmanuel Vadot reg = <3 0x200000 0x1000>; 111f126890aSEmmanuel Vadot reg-shift = <1>; 112f126890aSEmmanuel Vadot reg-io-width = <1>; 113f126890aSEmmanuel Vadot no-loopback-test; 114f126890aSEmmanuel Vadot }; 115f126890aSEmmanuel Vadot 116f126890aSEmmanuel Vadot uart8250@3,400000 { 117f126890aSEmmanuel Vadot pinctrl-names = "default"; 118f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart8250_2>; 119f126890aSEmmanuel Vadot compatible = "ns8250"; 120f126890aSEmmanuel Vadot clocks = <&clk14745600>; 121f126890aSEmmanuel Vadot fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>; 122f126890aSEmmanuel Vadot interrupts = <&gpio2 22 IRQ_TYPE_LEVEL_LOW>; 123f126890aSEmmanuel Vadot reg = <3 0x400000 0x1000>; 124f126890aSEmmanuel Vadot reg-shift = <1>; 125f126890aSEmmanuel Vadot reg-io-width = <1>; 126f126890aSEmmanuel Vadot no-loopback-test; 127f126890aSEmmanuel Vadot }; 128f126890aSEmmanuel Vadot 129f126890aSEmmanuel Vadot uart8250@3,800000 { 130f126890aSEmmanuel Vadot pinctrl-names = "default"; 131f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart8250_3>; 132f126890aSEmmanuel Vadot compatible = "ns8250"; 133f126890aSEmmanuel Vadot clocks = <&clk14745600>; 134f126890aSEmmanuel Vadot fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>; 135f126890aSEmmanuel Vadot interrupts = <&gpio2 27 IRQ_TYPE_LEVEL_LOW>; 136f126890aSEmmanuel Vadot reg = <3 0x800000 0x1000>; 137f126890aSEmmanuel Vadot reg-shift = <1>; 138f126890aSEmmanuel Vadot reg-io-width = <1>; 139f126890aSEmmanuel Vadot no-loopback-test; 140f126890aSEmmanuel Vadot }; 141f126890aSEmmanuel Vadot 142f126890aSEmmanuel Vadot uart8250@3,1000000 { 143f126890aSEmmanuel Vadot pinctrl-names = "default"; 144f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart8250_4>; 145f126890aSEmmanuel Vadot compatible = "ns8250"; 146f126890aSEmmanuel Vadot clocks = <&clk14745600>; 147f126890aSEmmanuel Vadot fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>; 148f126890aSEmmanuel Vadot interrupts = <&gpio2 30 IRQ_TYPE_LEVEL_LOW>; 149f126890aSEmmanuel Vadot reg = <3 0x1000000 0x1000>; 150f126890aSEmmanuel Vadot reg-shift = <1>; 151f126890aSEmmanuel Vadot reg-io-width = <1>; 152f126890aSEmmanuel Vadot no-loopback-test; 153f126890aSEmmanuel Vadot }; 154f126890aSEmmanuel Vadot}; 155f126890aSEmmanuel Vadot 156f126890aSEmmanuel Vadot&iomuxc { 157f126890aSEmmanuel Vadot imx27-eukrea-cpuimx27 { 158f126890aSEmmanuel Vadot pinctrl_fec: fecgrp { 159f126890aSEmmanuel Vadot fsl,pins = < 160f126890aSEmmanuel Vadot MX27_PAD_SD3_CMD__FEC_TXD0 0x0 161f126890aSEmmanuel Vadot MX27_PAD_SD3_CLK__FEC_TXD1 0x0 162f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 163f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 164f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 165f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 166f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 167f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 168f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 169f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA7__FEC_MDC 0x0 170f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA8__FEC_CRS 0x0 171f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 172f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 173f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 174f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 175f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA13__FEC_COL 0x0 176f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 177f126890aSEmmanuel Vadot MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 178f126890aSEmmanuel Vadot >; 179f126890aSEmmanuel Vadot }; 180f126890aSEmmanuel Vadot 181f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 182f126890aSEmmanuel Vadot fsl,pins = < 183f126890aSEmmanuel Vadot MX27_PAD_I2C_DATA__I2C_DATA 0x0 184f126890aSEmmanuel Vadot MX27_PAD_I2C_CLK__I2C_CLK 0x0 185f126890aSEmmanuel Vadot >; 186f126890aSEmmanuel Vadot }; 187f126890aSEmmanuel Vadot 188f126890aSEmmanuel Vadot pinctrl_nfc: nfcgrp { 189f126890aSEmmanuel Vadot fsl,pins = < 190f126890aSEmmanuel Vadot MX27_PAD_NFRB__NFRB 0x0 191f126890aSEmmanuel Vadot MX27_PAD_NFCLE__NFCLE 0x0 192f126890aSEmmanuel Vadot MX27_PAD_NFWP_B__NFWP_B 0x0 193f126890aSEmmanuel Vadot MX27_PAD_NFCE_B__NFCE_B 0x0 194f126890aSEmmanuel Vadot MX27_PAD_NFALE__NFALE 0x0 195f126890aSEmmanuel Vadot MX27_PAD_NFRE_B__NFRE_B 0x0 196f126890aSEmmanuel Vadot MX27_PAD_NFWE_B__NFWE_B 0x0 197f126890aSEmmanuel Vadot >; 198f126890aSEmmanuel Vadot }; 199f126890aSEmmanuel Vadot 200f126890aSEmmanuel Vadot pinctrl_owire: owiregrp { 201f126890aSEmmanuel Vadot fsl,pins = < 202f126890aSEmmanuel Vadot MX27_PAD_RTCK__OWIRE 0x0 203f126890aSEmmanuel Vadot >; 204f126890aSEmmanuel Vadot }; 205f126890aSEmmanuel Vadot 206f126890aSEmmanuel Vadot pinctrl_sdhc2: sdhc2grp { 207f126890aSEmmanuel Vadot fsl,pins = < 208f126890aSEmmanuel Vadot MX27_PAD_SD2_CLK__SD2_CLK 0x0 209f126890aSEmmanuel Vadot MX27_PAD_SD2_CMD__SD2_CMD 0x0 210f126890aSEmmanuel Vadot MX27_PAD_SD2_D0__SD2_D0 0x0 211f126890aSEmmanuel Vadot MX27_PAD_SD2_D1__SD2_D1 0x0 212f126890aSEmmanuel Vadot MX27_PAD_SD2_D2__SD2_D2 0x0 213f126890aSEmmanuel Vadot MX27_PAD_SD2_D3__SD2_D3 0x0 214f126890aSEmmanuel Vadot >; 215f126890aSEmmanuel Vadot }; 216f126890aSEmmanuel Vadot 217f126890aSEmmanuel Vadot pinctrl_uart4: uart4grp { 218f126890aSEmmanuel Vadot fsl,pins = < 219f126890aSEmmanuel Vadot MX27_PAD_USBH1_TXDM__UART4_TXD 0x0 220f126890aSEmmanuel Vadot MX27_PAD_USBH1_RXDP__UART4_RXD 0x0 221f126890aSEmmanuel Vadot MX27_PAD_USBH1_TXDP__UART4_CTS 0x0 222f126890aSEmmanuel Vadot MX27_PAD_USBH1_FS__UART4_RTS 0x0 223f126890aSEmmanuel Vadot >; 224f126890aSEmmanuel Vadot }; 225f126890aSEmmanuel Vadot 226f126890aSEmmanuel Vadot pinctrl_uart8250_1: uart82501grp { 227f126890aSEmmanuel Vadot fsl,pins = < 228f126890aSEmmanuel Vadot MX27_PAD_USB_PWR__GPIO2_23 0x0 229f126890aSEmmanuel Vadot >; 230f126890aSEmmanuel Vadot }; 231f126890aSEmmanuel Vadot 232f126890aSEmmanuel Vadot pinctrl_uart8250_2: uart82502grp { 233f126890aSEmmanuel Vadot fsl,pins = < 234f126890aSEmmanuel Vadot MX27_PAD_USBH1_SUSP__GPIO2_22 0x0 235f126890aSEmmanuel Vadot >; 236f126890aSEmmanuel Vadot }; 237f126890aSEmmanuel Vadot 238f126890aSEmmanuel Vadot pinctrl_uart8250_3: uart82503grp { 239f126890aSEmmanuel Vadot fsl,pins = < 240f126890aSEmmanuel Vadot MX27_PAD_USBH1_OE_B__GPIO2_27 0x0 241f126890aSEmmanuel Vadot >; 242f126890aSEmmanuel Vadot }; 243f126890aSEmmanuel Vadot 244f126890aSEmmanuel Vadot pinctrl_uart8250_4: uart82504grp { 245f126890aSEmmanuel Vadot fsl,pins = < 246f126890aSEmmanuel Vadot MX27_PAD_USBH1_RXDM__GPIO2_30 0x0 247f126890aSEmmanuel Vadot >; 248f126890aSEmmanuel Vadot }; 249f126890aSEmmanuel Vadot 250f126890aSEmmanuel Vadot pinctrl_usbh2: usbh2grp { 251f126890aSEmmanuel Vadot fsl,pins = < 252f126890aSEmmanuel Vadot MX27_PAD_USBH2_CLK__USBH2_CLK 0x0 253f126890aSEmmanuel Vadot MX27_PAD_USBH2_DIR__USBH2_DIR 0x0 254f126890aSEmmanuel Vadot MX27_PAD_USBH2_NXT__USBH2_NXT 0x0 255f126890aSEmmanuel Vadot MX27_PAD_USBH2_STP__USBH2_STP 0x0 256f126890aSEmmanuel Vadot MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0 257f126890aSEmmanuel Vadot MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0 258f126890aSEmmanuel Vadot MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0 259f126890aSEmmanuel Vadot MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0 260f126890aSEmmanuel Vadot MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0 261f126890aSEmmanuel Vadot MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0 262f126890aSEmmanuel Vadot MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0 263f126890aSEmmanuel Vadot MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0 264f126890aSEmmanuel Vadot >; 265f126890aSEmmanuel Vadot }; 266f126890aSEmmanuel Vadot 267f126890aSEmmanuel Vadot pinctrl_usbotg: usbotggrp { 268f126890aSEmmanuel Vadot fsl,pins = < 269f126890aSEmmanuel Vadot MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0 270f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0 271f126890aSEmmanuel Vadot MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0 272f126890aSEmmanuel Vadot MX27_PAD_USBOTG_STP__USBOTG_STP 0x0 273f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0 274f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0 275f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0 276f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0 277f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0 278f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0 279f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0 280f126890aSEmmanuel Vadot MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0 281f126890aSEmmanuel Vadot >; 282f126890aSEmmanuel Vadot }; 283f126890aSEmmanuel Vadot }; 284f126890aSEmmanuel Vadot}; 285