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/freebsd/sys/dev/ixgbe/
H A Dixgbe_phy.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
54 * ixgbe_out_i2c_byte_ack - Send I2C byte with ack
71 * ixgbe_in_i2c_byte_ack - Receive an I2C byte and send ack
85 * ixgbe_ones_comp_byte_add - Perform one's complement addition
89 * Returns one's complement 8-bit sum.
100 * ixgbe_read_i2c_combined_generic_int - Perform I2C read combined operation
102 * @addr: I2C bus address to read from
103 * @reg: I2C device register to read from
112 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear1310.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
15 compatible = "st,spear-spics-gpio";
17 st-spics,peripcfg-reg = <0x3b0>;
18 st-spics,sw-enable-bit = <12>;
19 st-spics,cs-value-bit = <11>;
20 st-spics,cs-enable-mask = <3>;
21 st-spics,cs-enable-shift = <8>;
22 gpio-controller;
23 #gpio-cells = <2>;
27 compatible = "st,spear1310-miphy";
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/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Dsamsung,s3c2410-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/samsun
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-lx2160a-bluebox3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2020-2021 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
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H A Dfsl-ls1088a-ten64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on fsl-ls1088a-rdb.dts
5 * Copyright 2017-2020 NXP
6 * Copyright 2019-2021 Traverse Technologies
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
28 stdout-path = "serial0:115200n8";
32 compatible = "gpio-keys";
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dsamsung-phy.txt2 -------------------------------------------------
5 - compatible : should be one of the listed compatibles:
6 - "samsung,s5pv210-mipi-video-phy"
7 - "samsung,exynos5420-mipi-video-phy"
8 - "samsung,exynos5433-mipi-video-phy"
9 - #phy-cells : from the generic phy bindings, must be 1;
12 - syscon - phandle to the PMU system controller
14 In case of exynos5433 compatible PHY:
15 - samsung,pmu-syscon - phandle to the PMU system controller
16 - samsung,disp-sysreg - phandle to the DISP system registers controller
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H A Dsamsung,exynos5250-sata-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,exynos5250-sata-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos5250 SoC SATA PHY
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
16 const: samsung,exynos5250-sata-phy
21 clock-names:
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
29 i2c-mux {
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,hdmi.txt8 - compatible: Should be "mediatek,<chip>-hdmi".
9 - the supported chips are mt2701, mt7623 and mt8173
10 - reg: Physical base address and length of the controller's registers
11 - interrupts: The interrupt signal from the function block.
12 - clocks: device clocks
13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
14 - clock-names: must contain "pixel", "pll", "bclk", and "spdif".
15 - phys: phandle link to the HDMI PHY node.
16 See Documentation/devicetree/bindings/phy/phy-bindings.txt for details.
17 - phy-names: must contain "hdmi"
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/freebsd/sys/contrib/device-tree/src/arm/nxp/vf/
H A Dvf610-zii-scu4-aib.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Copyright (C) 2016-2018 Zodiac Inflight Innovations
5 /dts-v1/;
10 compatible = "zii,vf610scu4-aib", "zii,vf610dev", "fsl,vf610";
13 stdout-path = &uart0;
21 gpio-leds {
22 compatible = "gpio-leds";
23 pinctrl-
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H A Dvf610-zii-dev-rev-c.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
20 mdio-parent-bus = <&mdio1>;
21 #address-cells = <1>;
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/freebsd/sys/dev/e1000/
H A De1000_82575.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
121 * e1000_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
124 * Called to determine if the I2C pins are being used for I2C or as an
134 switch (hw->mac.type) { in e1000_sgmii_uses_mdio_82575()
155 * e1000_init_phy_params_82575 - Initialize PHY function ptrs
160 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82575() local
166 phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic; in e1000_init_phy_params_82575()
167 phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic; in e1000_init_phy_params_82575()
169 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82575()
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/freebsd/sys/contrib/device-tree/Bindings/display/rockchip/
H A Ddw_hdmi-rockchip.txt5 with a companion PHY IP.
9 following device-specific properties.
14 - compatible: should be one of the following:
15 "rockchip,rk3228-dw-hdmi"
16 "rockchip,rk3288-dw-hdmi"
17 "rockchip,rk3328-dw-hdmi"
18 "rockchip,rk3399-dw-hdmi"
19 - reg: See dw_hdmi.txt.
20 - reg-io-width: See dw_hdmi.txt. Shall be 4.
21 - interrupts: HDMI interrupt number
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H A Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Yao <markyao0591@gmail.com>
14 with a companion PHY IP.
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - rockchip,rk3228-dw-hdmi
23 - rockchip,rk3288-dw-hdmi
24 - rockchip,rk3328-dw-hdmi
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra194-p3668.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
9 i2c0 = "/bpmp/i2c";
10 i2c1 = "/bus@0/i2c@3160000";
11 i2c2 = "/bus@0/i2c@c240000";
12 i2c3 = "/bus@0/i2c@3180000";
13 i2c4 = "/bus@0/i2c@3190000";
14 i2c5 = "/bus@0/i2c@31c0000";
15 i2c6 = "/bus@0/i2c@c250000";
16 i2c7 = "/bus@0/i2c@31e0000";
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H A Dtegra186-p3310.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
12 i2c0 = "/bpmp/i2c";
13 i2c1 = "/i2c@3160000";
14 i2c2 = "/i2c@c240000";
15 i2c3 = "/i2c@3180000";
16 i2c4 = "/i2c@3190000";
17 i2c5 = "/i2c@31c0000";
18 i2c6 = "/i2c@c250000";
19 i2c7 = "/i2c@31e0000";
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H A Dtegra234-p3740-0002+p3701-0008.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include "tegra234-p370
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-8040-mcbin.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "armada-8040.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
15 "marvell,armada-ap806-quad", "marvell,armada-ap806";
18 stdout-path = "serial0:115200n8";
34 v_3_3: regulator-3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "v_3_3";
37 regulator-min-microvolt = <3300000>;
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H A Dcn9132-db.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device tree for the CN9132-DB board.
8 #include "cn9131-db.dtsi"
12 "marvell,armada-ap807-quad", "marvell,armada-ap807";
21 compatible = "regulator-fixed";
22 regulator-name = "cp2-xhci0-vbus";
23 regulator-min-microvolt = <5000000>;
24 regulator-max-microvolt = <5000000>;
25 enable-active-high;
30 compatible = "usb-nop-xceiv";
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/freebsd/sys/contrib/device-tree/src/arm64/microchip/
H A Dsparx5_pcb134_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
17 compatible = "gpio-leds";
53 default-state = "off";
58 default-state = "off";
63 default-state = "off";
68 default-state = "off";
73 default-state = "off";
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dsff,sfp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-zcu104-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-binding
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H A Dzynqmp-zcu104-revC.dts1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-binding
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam3874-iceboard.dts1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright (c) 2019 Three-Speed Logic, Inc. <gsmecher@threespeedlogic.com>
15 /dts-v1/;
18 #include <dt-bindings/interrupt-controller/irq.h>
25 stdout-path = "serial1:115200n8";
35 compatible = "regulator-fixed";
36 regulator-name = "vmmcsd_fixed";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 regulator-always-on;
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
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