| /linux/drivers/clk/qcom/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
23 tristate "GLYMUR Display Clock Controller"
33 tristate "GLYMUR Global Clock Controller"
37 Support for the global clock controller on GLYMUR devices.
38 Say Y if you want to use peripheral devices such as UART, SPI,
42 tristate "GLYMUR TCSR Clock Controller"
46 Support for the TCSR clock controller on GLYMUR devices.
47 Say Y if you want to use peripheral devices such as USB/PCIe/EDP.
50 tristate "X1E80100 Camera Clock Controller"
54 Support for the camera clock controller on X1E80100 devices.
[all …]
|
| /linux/drivers/usb/gadget/udc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 # (a) a peripheral controller, and
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
18 # USB Peripheral Controller Support
22 # - integrated/SOC controllers first
[all …]
|
| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cs-high, etc. or they could
12 be controller specific like delay in clock or data lines, etc. These
13 properties need to be defined in the peripheral node because they are
14 per-peripheral and there can be multiple peripherals attached to a
[all …]
|
| /linux/include/soc/canaan/ |
| H A D | k210-sysctl.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
10 * Kendryte K210 SoC system controller registers offsets.
11 * Taken from Kendryte SDK (kendryte-standalone-sdk).
15 #define K210_SYSCTL_PLL0 0x08 /* PLL0 controller */
16 #define K210_SYSCTL_PLL1 0x0C /* PLL1 controller */
17 #define K210_SYSCTL_PLL2 0x10 /* PLL2 controller */
20 #define K210_SYSCTL_SEL0 0x20 /* Clock select controller 0 */
21 #define K210_SYSCTL_SEL1 0x24 /* Clock select controller 1 */
23 #define K210_SYSCTL_EN_PERI 0x2C /* Peripheral clock enable */
[all …]
|
| /linux/Documentation/driver-api/memory-devices/ |
| H A D | ti-gpmc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 GPMC (General Purpose Memory Controller)
7 GPMC is an unified memory controller dedicated to interfacing external
14 * Pseudo-SRAM devices
24 functioning of the peripheral, while peripheral has another set of
25 timings. To have peripheral work with gpmc, peripheral timings has to
27 translated depends on the connected peripheral. Also there is a
32 from gpmc peripheral timings. struct gpmc_device_timings fields has to
33 be updated with timings from the datasheet of the peripheral that is
34 connected to gpmc. A few of the peripheral timings can be fed either
[all …]
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 XUSB pad controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
[all …]
|
| H A D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 XUSB pad controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
[all …]
|
| H A D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 XUSB pad controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
[all …]
|
| H A D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra124 XUSB pad controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
[all …]
|
| /linux/drivers/dma/qcom/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
9 controller, as present on MSM8x60, APQ8064, and IPQ8064 devices.
10 This controller provides DMA capabilities for both general purpose
11 and on-chip peripheral devices.
19 Enable support for the QCOM BAM DMA controller. This controller
20 provides DMA capabilities for a variety of on-chip devices.
28 Enable support for the QCOM GPI DMA controller. This controller
29 provides DMA capabilities for a variety of peripheral buses such
32 transfer data between DDR and peripheral.
51 Enable support for the Qualcomm Technologies HIDMA controller.
[all …]
|
| /linux/arch/powerpc/platforms/52xx/ |
| H A D | mpc52xx_pic.c | 3 * Programmable Interrupt Controller functions for the Freescale MPC52xx.
20 * This is the device driver for the MPC5200 interrupt controller.
23 * -----------------
24 * The MPC5200 interrupt controller groups the all interrupt sources into
25 * three groups called 'critical', 'main', and 'peripheral'. The critical
28 * gpios, and the general purpose timers. Peripheral group contains the
29 * remaining irq sources from all of the on-chip peripherals (PSCs, Ethernet,
33 * -----
37 * infrastructure lets each interrupt controller to define a local set
41 * To define a range of virq numbers for this controller, this driver first
[all …]
|
| /linux/drivers/usb/cdns3/ |
| H A D | Kconfig | 8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
30 bool "Cadence USB3 device controller"
33 Say Y here to enable device controller functionality of the
34 Cadence USBSS-DEV driver.
36 This controller supports FF, HS and SS mode. It doesn't support
40 bool "Cadence USB3 host controller"
[all …]
|
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | img,pdc-intc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/img,pdc-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ImgTec Powerdown Controller (PDC) Interrupt Controller
10 - James Hogan <jhogan@kernel.org>
13 ImgTec Powerdown Controller (PDC) Interrupt Controller has a number of input
19 const: img,pdc-intc
24 interrupt-controller: true
26 '#interrupt-cells':
[all …]
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | stericsson,u8500-clks.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/stericsson,u8500-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 (U8500) clocks
10 - Ulf Hansson <ulf.hansson@linaro.org>
11 - Linus Walleij <linus.walleij@linaro.org>
14 DB8500 digital baseband system-on-chip and its siblings such as
16 itself, not off-chip clocks. There are four different on-chip
17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
[all …]
|
| H A D | st,stm32mp21-rcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp21-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32MP21 Reset Clock Controller
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
13 The RCC hardware block is both a reset and a clock controller.
17 include/dt-bindings/clock/st,stm32mp21-rcc.h
18 include/dt-bindings/reset/st,stm32mp21-rcc.h
23 - st,stm32mp21-rcc
[all …]
|
| /linux/Documentation/devicetree/bindings/soc/socionext/ |
| H A D | socionext,uniphier-perictrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier peripheral block controller
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 Peripheral block implemented on Socionext UniPhier SoCs is an integrated
15 Peripheral block controller is a logic to control the component.
20 - enum:
21 - socionext,uniphier-ld4-perictrl
[all …]
|
| /linux/drivers/usb/gadget/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 # (a) a peripheral controller, and
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
23 PC) controlling up to 127 peripheral devices.
25 you can't connect a "to-the-host" connector to a peripheral.
[all …]
|
| /linux/Documentation/driver-api/usb/ |
| H A D | gadget.rst | 11 This document presents a Linux-USB "Gadget" kernel mode API, for use
17 - Supports USB 2.0, for high speed devices which can stream data at
20 - Handles devices with dozens of endpoints just as well as ones with
21 just two fixed-function ones. Gadget drivers can be written so
24 - Flexible enough to expose more complex USB device capabilities such
28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the
29 Linux-USB host side.
31 - Sharing data structures and API models with the Linux-USB host side
32 API. This helps the OTG support, and looks forward to more-symmetric
36 - Minimalist, so it's easier to support new device controller hardware.
[all …]
|
| /linux/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| H A D | hi3798cv200-perictrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/hi3798cv200-perictrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon Hi3798CV200 Peripheral Controller
10 - Wei Xu <xuwei5@hisilicon.com>
13 The Hi3798CV200 Peripheral Controller controls peripherals, queries
19 - const: hisilicon,hi3798cv200-perictrl
20 - const: syscon
21 - const: simple-mfd
[all …]
|
| /linux/arch/mips/include/asm/txx9/ |
| H A D | dmac.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * TXx9 SoC DMA Controller
14 * struct txx9dmac_platform_data - Controller configuration parameters
24 * struct txx9dmac_chan_platform_data - Channel configuration parameters
32 * struct txx9dmac_slave - Controller-specific information about a slave
34 * memory-to-peripheral transfers
36 * peripheral-to-memory transfers
37 * @reg_width: peripheral register width
|
| /linux/drivers/dma/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
65 Enable support for Altera / Intel mSGDMA controller.
93 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
96 tristate "Arm DMA-350 support"
101 Enable support for the Arm DMA-350 controller.
109 Support the Atmel AHB DMA controller.
116 Support the Atmel XDMA controller.
119 tristate "Analog Devices AXI-DMAC DMA support"
125 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
126 controller is often used in Analog Devices' reference designs for FPGA
[all …]
|
| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | st,stm32mp25-rifsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32 Resource isolation framework security controller
10 - Gatien Chevallier <gatien.chevallier@foss.st.com>
17 The RIFSC (RIF security controller) is composed of three sets of registers,
19 - RISC registers associated with RISUP logic (resource isolation device unit
20 for peripherals), assign all non-RIF aware peripherals to zero, one or
22 - RIMC registers: associated with RIMU logic (resource isolation master
[all …]
|
| /linux/include/linux/usb/ |
| H A D | otg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (for either host or peripheral roles) don't use these calls; they
27 /* bind/unbind the host controller */
30 /* bind/unbind the peripheral controller */
34 /* effective for A-peripheral, ignored for B devices */
37 /* for B devices only: start session with A-Host */
46 * struct usb_otg_caps - describes the otg capabilities of the device
48 * in binary-coded decimal (i.e. 2.0 is 0200H).
66 if (otg && otg->start_hnp) in otg_start_hnp()
67 return otg->start_hnp(otg); in otg_start_hnp()
[all …]
|
| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | atmel-usb.txt | 6 - compatible: Should be "atmel,at91rm9200-ohci" for USB controllers
8 - reg: Address and length of the register set for the device
9 - interrupts: Should contain ohci interrupt
10 - clocks: Should reference the peripheral, host and system clocks
11 - clock-names: Should contain three strings
12 "ohci_clk" for the peripheral clock
15 - num-ports: Number of ports.
16 - atmel,vbus-gpio: If present, specifies a gpio that needs to be
18 - atmel,oc-gpio: If present, specifies a gpio that needs to be
22 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
[all …]
|
| /linux/Documentation/userspace-api/media/ |
| H A D | glossary.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
58 **Field-programmable Gate Array**
63 See https://en.wikipedia.org/wiki/Field-programmable_gate_array.
70 Hardware Peripheral
72 together make a larger user-facing functional peripheral. For
75 peripheral.
77 Also known as :term:`Peripheral`.
80 **Inter-Integrated Circuit**
82 A multi-master, multi-slave, packet switched, single-ended,
84 like sub-device hardware components.
[all …]
|