1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2ea76f0b3SAtsushi Nemoto /* 3ea76f0b3SAtsushi Nemoto * TXx9 SoC DMA Controller 4ea76f0b3SAtsushi Nemoto */ 5ea76f0b3SAtsushi Nemoto 6ea76f0b3SAtsushi Nemoto #ifndef __ASM_TXX9_DMAC_H 7ea76f0b3SAtsushi Nemoto #define __ASM_TXX9_DMAC_H 8ea76f0b3SAtsushi Nemoto 9ea76f0b3SAtsushi Nemoto #include <linux/dmaengine.h> 10ea76f0b3SAtsushi Nemoto 11ea76f0b3SAtsushi Nemoto #define TXX9_DMA_MAX_NR_CHANNELS 4 12ea76f0b3SAtsushi Nemoto 13ea76f0b3SAtsushi Nemoto /** 14ea76f0b3SAtsushi Nemoto * struct txx9dmac_platform_data - Controller configuration parameters 15ea76f0b3SAtsushi Nemoto * @memcpy_chan: Channel used for DMA_MEMCPY 16ea76f0b3SAtsushi Nemoto * @have_64bit_regs: DMAC have 64 bit registers 17ea76f0b3SAtsushi Nemoto */ 18ea76f0b3SAtsushi Nemoto struct txx9dmac_platform_data { 19ea76f0b3SAtsushi Nemoto int memcpy_chan; 20ea76f0b3SAtsushi Nemoto bool have_64bit_regs; 21ea76f0b3SAtsushi Nemoto }; 22ea76f0b3SAtsushi Nemoto 23ea76f0b3SAtsushi Nemoto /** 24ea76f0b3SAtsushi Nemoto * struct txx9dmac_chan_platform_data - Channel configuration parameters 25ea76f0b3SAtsushi Nemoto * @dmac_dev: A platform device for DMAC 26ea76f0b3SAtsushi Nemoto */ 27ea76f0b3SAtsushi Nemoto struct txx9dmac_chan_platform_data { 28ea76f0b3SAtsushi Nemoto struct platform_device *dmac_dev; 29ea76f0b3SAtsushi Nemoto }; 30ea76f0b3SAtsushi Nemoto 31ea76f0b3SAtsushi Nemoto /** 32ea76f0b3SAtsushi Nemoto * struct txx9dmac_slave - Controller-specific information about a slave 33ea76f0b3SAtsushi Nemoto * @tx_reg: physical address of data register used for 34ea76f0b3SAtsushi Nemoto * memory-to-peripheral transfers 35ea76f0b3SAtsushi Nemoto * @rx_reg: physical address of data register used for 36ea76f0b3SAtsushi Nemoto * peripheral-to-memory transfers 37ea76f0b3SAtsushi Nemoto * @reg_width: peripheral register width 38ea76f0b3SAtsushi Nemoto */ 39ea76f0b3SAtsushi Nemoto struct txx9dmac_slave { 40ea76f0b3SAtsushi Nemoto u64 tx_reg; 41ea76f0b3SAtsushi Nemoto u64 rx_reg; 42ea76f0b3SAtsushi Nemoto unsigned int reg_width; 43ea76f0b3SAtsushi Nemoto }; 44ea76f0b3SAtsushi Nemoto 45f48c8c95SAtsushi Nemoto void txx9_dmac_init(int id, unsigned long baseaddr, int irq, 46f48c8c95SAtsushi Nemoto const struct txx9dmac_platform_data *pdata); 47f48c8c95SAtsushi Nemoto 48ea76f0b3SAtsushi Nemoto #endif /* __ASM_TXX9_DMAC_H */ 49