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/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_hsi_init_func.h2 * Copyright (c) 2017-2018 Cavium, Inc.
48 u32 guranteed_per_tc /* guaranteed size per TC, in bytes */;
49 u32 headroom_per_tc /* headroom size per TC, in bytes */;
52 u8 num_active_tcs[MAX_NUM_PORTS] /* number of active TCs per port */;
56 * ETS per-TC init requirements
60 …u8 use_sp /* if set, this TC participates in the arbitration with a strict priority (the priority …
61 …u8 use_wfq /* if set, this TC participates in the arbitration with a WFQ weight (indicated by the …
62 u16 weight /* An arbitration weight. Valid only if use_wfq is set. */;
71 struct init_ets_tc_req tc_req[NUM_OF_TCS] /* ETS initialization requirements per TC. */;
79 u16 lb_mac_rate /* Global MAC+LB RL rate (in Mbps). If set to 0, the RL will be disabled. */;
[all …]
H A Decore_init_fw_funcs.h2 * Copyright (c) 2017-2018 Cavium, Inc.
36 * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes
41 * @param num_pf_cids - number of connections used by this PF
42 * @param num_vf_cids - number of connections used by VFs of this PF
43 * @param num_tids - number of tasks used by this PF
44 * @param num_pf_pqs - number of PQs used by this PF
45 * @param num_vf_pqs - number of PQs used by VFs of this PF
56 * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for the
59 * @param p_hwfn - HW device data
60 * @param max_ports_per_engine - max number of ports per engine in HW
[all …]
/freebsd/sys/dev/isci/scil/
H A Dscu_bios_definitions.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
64 * stand-alone where the library is excluded. By excluding
100 // port configuration mode
124 * contains valid OEM Parameter data. The value must be set to
152 * time should set this field to SCI_PREBOOT_SOURCE_INIT. Then
154 * driver control, the OROM or UEFI driver can set this field
[all …]
/freebsd/sys/dev/cxgbe/firmware/
H A Dt5fw_cfg_uwire.txt3 # Copyright (C) 2010-2017 Chelsio Communications. All rights reserved.
6 # WILL RESULT IN A NON-FUNCTIONAL ADAPTER AND MAY RESULT IN PHYSICAL DAMAGE
10 # This file provides the default, power-on configuration for 4-port T5-based
25 # 4. MSI-X Vectors: 1088.
26 # 5. Multi-Port Support (MPS) TCAM: 336 entries to support MAC destination
34 # functions for ports 0-3 on PF0-3, FCoE on PF4, iSCSI on PF5, etc.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
40 # to be involved per port and per application function. For example,
46 # 3 application functions (NIC, FCoE, iSCSI) per port *
47 # 8 Ingress Queue/MSI-X Vectors per application function
[all …]
H A Dt5fw_cfg_fpga.txt3 # Copyright (C) 2010-2013 Chelsio Communications. All rights reserved.
6 # THIS FILE WILL RESULT IN A NON-FUNCTIONAL T4 ADAPTER AND MAY RESULT
9 # This file provides the default, power-on configuration for 4-port T4-based
22 # 2. Ingress Queues with Free Lists: 1024. PCI-E SR-IOV Virtual Functions
24 # 3. Egress Queues: 128K. PCI-E SR-IOV Virtual Functions must use a
26 # 4. MSI-X Vectors: 1088. A complication here is that the PCI-E SR-IOV
28 # same umber of MSI-X Vectors as the base Physical Function.
30 # not, their MSI-X "needs" are counted by the PCI-E implementation.
32 # Functions (PF0-3) must have the same number of configured TotalVFs in
33 # their SR-IOV Capabilities.
[all …]
H A Dt6fw_cfg_uwire.txt3 # Copyright (C) 2014-2015 Chelsio Communications. All rights reserved.
6 # WILL RESULT IN A NON-FUNCTIONAL ADAPTER AND MAY RESULT IN PHYSICAL DAMAGE
10 # This file provides the default, power-on configuration for 2-port T6-based
25 # 4. MSI-X Vectors: 1088.
26 # 5. Multi-Port Support (MPS) TCAM: 336 entries to support MAC destination
34 # functions for ports 0-1 on PF0-1, FCoE on PF4, iSCSI on PF5, etc.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
40 # to be involved per port and per application function. For example,
46 # 3 application functions (NIC, FCoE, iSCSI) per port *
47 # 16 Ingress Queue/MSI-X Vectors per application function
[all …]
H A Dt6fw_cfg_fpga.txt3 # Copyright (C) 2014-2015 Chelsio Communications. All rights reserved.
6 # WILL RESULT IN A NON-FUNCTIONAL ADAPTER AND MAY RESULT IN PHYSICAL DAMAGE
10 # This file provides the default, power-on configuration for 2-port T6-based
25 # 4. MSI-X Vectors: 1088.
26 # 5. Multi-Port Support (MPS) TCAM: 336 entries to support MAC destination
34 # functions for ports 0-1 on PF0-1, FCoE on PF4, iSCSI on PF5, etc.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
40 # to be involved per port and per application function. For example,
46 # 3 application functions (NIC, FCoE, iSCSI) per port *
47 # 16 Ingress Queue/MSI-X Vectors per application function
[all …]
/freebsd/share/man/man4/
H A Dmpr.44 .\" Copyright (c) 2015-2017 Avago Technologies
5 .\" Copyright (c) 2015-2022 Broadcom Ltd.
45 .Nd "LSI Fusion-MPT 3/3.5 IT/IR 12Gb/s Serial Attached SCSI/SATA/PCIe driver"
49 .Bd -ragged -offset indent
57 .Bd -literal -offset indent
64 Fusion-MPT 3/3.5 IT/IR
72 .Bl -bullet -compact
74 Broadcom Ltd./Avago Tech (LSI) SAS 3004 (4 Port SAS)
76 Broadcom Ltd./Avago Tech (LSI) SAS 3008 (8 Port SAS)
78 Broadcom Ltd./Avago Tech (LSI) SAS 3108 (8 Port SAS)
[all …]
H A Dtcp.43 .\" Copyright (c) 2010-2011 The FreeBSD Foundation
50 protocol provides reliable, flow-controlled, two-way
52 It is a byte-stream protocol used to
58 Internet address format and, in addition, provides a per-host
60 .Dq "port addresses" .
65 port on the host identifying the peer entity.
105 port may still be specified
106 at this time; if the port is not specified, the system will assign one.
115 supports a number of socket options which can be set with
119 .Bl -tag -width ".Dv TCP_FUNCTION_BLK"
[all …]
H A Dmps.44 .\" Copyright (c) 2015-2017 Avago Technologies
5 .\" Copyright (c) 2015-2017 Broadcom Ltd.
45 .Nd "LSI Fusion-MPT 2 IT/IR 6Gb/s Serial Attached SCSI/SATA driver"
49 .Bd -ragged -offset indent
57 .Bd -literal -offset indent
64 Fusion-MPT 2 IT/IR
72 .Bl -bullet -compact
74 Broadcom Ltd./Avago Tech (LSI) SAS 2004 (4 Port SAS)
76 Broadcom Ltd./Avago Tech (LSI) SAS 2008 (8 Port SAS)
78 Broadcom Ltd./Avago Tech (LSI) SAS 2108 (8 Port SAS)
[all …]
/freebsd/lib/libpmc/
H A Dpmc.cmn-600.328 .Nm pmc.cmn-600
29 .Nd Library for accessing the Arm CoreLink CMN-600 Coherent Mesh Network
36 CMN-600 PMU counters may be configured to count any one of a defined set of
38 Unlike other performance counters, counters for the CMN-600 require the
39 node ID to set up.
42 Using bootverbose, for example set sysctl debug.bootverbose=1 and then load the
52 Some BIOS versions of dual-socket machines have no NUMA domain information in
54 In such cases, to get more accurate events statistics, set the kernel
57 the CPU package containing that CMN-600 controller.
64 Arm CoreLink CMN-600 Coherent Mesh Network Controller performance counters are
[all …]
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dnvidia,tegra186-gpio.txt9 The Tegra186 GPIO controller allows software to set the IO direction of, and
15 register set. These registers exist in a single contiguous block of physical
19 Access to this set of registers is not necessary in all circumstances. Code
31 implemented by the SoC. Each GPIO is assigned to a port, and a port may control
32 a number of GPIOs. Thus, each GPIO is named according to an alphabetical port
33 name and an integer GPIO name within the port. For example, GPIO_PA0, GPIO_PN6,
37 implemented GPIOs within each port varies. GPIO registers within a controller
38 are grouped and laid out according to the port they affect.
40 The mapping from port name to the GPIO controller that implements that port, and
41 the mapping from port name to register offset within a controller, are both
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dcdns,csi2tx.txt1 Cadence MIPI-CSI2 TX controller
4 The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to
8 - compatible: must be set to "cdns,csi2tx" or "cdns,csi2tx-1.3"
9 for version 1.3 of the controller, "cdns,csi2tx-2.1" for v2.1
10 - reg: base address and size of the memory mapped region
11 - clocks: phandles to the clocks driving the controller
12 - clock-names: must contain:
15 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
19 - phys: phandle to the D-PHY. If it is set, phy-names need to be set
20 - phy-names: must contain "dphy"
[all …]
/freebsd/contrib/unbound/doc/
H A Dexample.conf.in13 #include-toplevel: "otherfile.conf"
23 # Set to "" or 0 to disable. Default is disabled.
24 # statistics-interval: 0
27 # statistics-interval, every time it also writes stats to the
28 # shared memory segment keyed with shm-key.
29 # shm-enable: no
32 # shm-key: 11777
35 # statistics-cumulative: no
38 # printed from unbound-control. Default off, because of speed.
39 # extended-statistics: no
[all …]
H A Dexample.conf13 #include-toplevel: "otherfile.conf"
23 # Set to "" or 0 to disable. Default is disabled.
24 # statistics-interval: 0
27 # statistics-interval, every time it also writes stats to the
28 # shared memory segment keyed with shm-key.
29 # shm-enable: no
32 # shm-key: 11777
35 # statistics-cumulative: no
38 # printed from unbound-control. Default off, because of speed.
39 # extended-statistics: no
[all …]
H A Dunbound.conf.53 .\" unbound.conf.5 -- unbound.conf manual
12 \- Unbound configuration file.
27 \fIunbound\-checkconf\fR(8)
34 $ unbound \-c /etc/unbound/unbound.conf
53 # mount \-\-bind \-n /dev/urandom /etc/unbound/dev/urandom
54 # and mount \-\-bind \-n /dev/log /etc/unbound/dev/log
62 access\-control: 10.0.0.0/8 allow
63 access\-control: 2001:DB8::/64 allow
82 .B include\-toplevel:
94 information including short information per query. Level 3 gives query level
[all …]
/freebsd/contrib/ofed/infiniband-diags/man/
H A Dperfquery.85 PERFQUERY \-
7 .nr rst2man-indent-level 0
10 \\$1 \\n[an-margin]
11 level \\n[rst2man-indent-level]
12 level margin: \\n[rst2man-indent\\n[rst2man-indent-level]]
13 -
14 \\n[rst2man-indent0]
15 \\n[rst2man-indent1]
16 \\n[rst2man-indent2]
21 . nr rst2man-indent\\n[rst2man-indent-level] \\n[an-margin]
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/
H A Dpipeline.json20 …"PublicDescription": "Cycles that the divider is active, includes INT and FP. Set 'edge =1, cmask=…
35 "BriefDescription": "Speculative and retired macro-conditional branches",
40 "PublicDescription": "Speculative and retired macro-conditional branches.",
45 …"BriefDescription": "Speculative and retired macro-unconditional branches excluding calls and indi…
50 …"PublicDescription": "Speculative and retired macro-unconditional branches excluding calls and ind…
84 "BriefDescription": "Not taken macro-conditional branches",
89 "PublicDescription": "Not taken macro-conditional branches.",
94 "BriefDescription": "Taken speculative and retired macro-conditional branches",
99 "PublicDescription": "Taken speculative and retired macro-conditional branches.",
104 …"BriefDescription": "Taken speculative and retired macro-conditional branch instructions excluding…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/ivybridge/
H A Dpipeline.json20 …"PublicDescription": "Cycles that the divider is active, includes INT and FP. Set 'edge =1, cmask=…
35 "BriefDescription": "Speculative and retired macro-conditional branches",
40 "PublicDescription": "Speculative and retired macro-conditional branches.",
45 …"BriefDescription": "Speculative and retired macro-unconditional branches excluding calls and indi…
50 …"PublicDescription": "Speculative and retired macro-unconditional branches excluding calls and ind…
84 "BriefDescription": "Not taken macro-conditional branches",
89 "PublicDescription": "Not taken macro-conditional branches.",
94 "BriefDescription": "Taken speculative and retired macro-conditional branches",
99 "PublicDescription": "Taken speculative and retired macro-conditional branches.",
104 …"BriefDescription": "Taken speculative and retired macro-conditional branch instructions excluding…
[all …]
/freebsd/sys/dev/cxgbe/
H A Dt4_ioctl.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
46 T4_SET_FILTER_MODE, /* set global filter mode */
54 T4_CLEAR_STATS, /* clear a port's MAC statistics */
55 T4_SET_OFLD_POLICY, /* Set offload policy */
56 T4_SET_SCHED_CLASS, /* set sched class */
57 T4_SET_SCHED_QUEUE, /* set queu
319 uint8_t port; global() member
353 uint8_t port; global() member
[all...]
/freebsd/crypto/openssh/
H A Dssh.149 .Op Fl D Oo Ar bind_address : Oc Ns Ar port
62 .Op Fl p Ar port
65 .Op Fl W Ar host : Ns Ar port
78 .Ux Ns -domain
90 .No ssh:// Oo user @ Oc hostname Op : port .
108 .Bl -tag -width Ds -compact
121 .Xr ssh-agent 1 .
122 This can also be specified on a per-host basis in a configuration file.
127 .Ux Ns -domain
155 .Ux Ns -domain
[all …]
/freebsd/sys/contrib/xen/
H A Devent_channel.h24 * Copyright (c) 2003-2004, K A Fraser.
43 * guests must check the value of the bit after re-enabling event
58 * @cmd == EVTCHNOP_* (event-channel operation).
59 * @args == struct evtchn_* Operation-specific extra arguments (NULL if none).
86 * EVTCHNOP_alloc_unbound: Allocate a port in domain <dom> and mark as
87 * accepting interdomain bindings from domain <remote_dom>. A fresh port
88 * is allocated in <dom> and returned as <port>.
97 evtchn_port_t port; member
104 * a port that is unbound and marked as accepting bindings from the calling
105 * domain. A fresh port is allocated in the calling domain and returned as
[all …]
/freebsd/contrib/ofed/opensm/man/
H A Dopensm.84 opensm \- InfiniBand subnet manager and administration (SM/SA)
8 [\-\-version]]
9 [\-F | \-\-config <file_name>]
10 [\-c(reate-config) <file_name>]
11 [\-g(uid) <GUID in hex>]
12 [\-l(mc) <LMC>]
13 [\-p(riority) <PRIORITY>]
14 [\-\-smkey <SM_Key>]
15 [\-\-sm_sl <SL number>]
16 [\-r(eassign_lids)]
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/haswell/
H A Dpipeline.json22 "BriefDescription": "Speculative and retired macro-conditional branches.",
31 …"BriefDescription": "Speculative and retired macro-unconditional branches excluding calls and indi…
67 "BriefDescription": "Not taken macro-conditional branches.",
76 "BriefDescription": "Taken speculative and retired macro-conditional branches.",
85 …"BriefDescription": "Taken speculative and retired macro-conditional branch instructions excluding…
447 … "PublicDescription": "Cycles with pending L1 data cache miss loads. Set Cmask=8 to count cycle.",
459 "PublicDescription": "Cycles with pending L2 miss loads. Set Cmask=2 to count cycle.",
470 "PublicDescription": "Cycles with pending memory loads. Set Cmask=2 to count cycle.",
492 "PublicDescription": "Execution stalls due to L1 data cache miss loads. Set Cmask=0CH.",
545 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/haswellx/
H A Dpipeline.json22 "BriefDescription": "Speculative and retired macro-conditional branches.",
31 …"BriefDescription": "Speculative and retired macro-unconditional branches excluding calls and indi…
67 "BriefDescription": "Not taken macro-conditional branches.",
76 "BriefDescription": "Taken speculative and retired macro-conditional branches.",
85 …"BriefDescription": "Taken speculative and retired macro-conditional branch instructions excluding…
447 … "PublicDescription": "Cycles with pending L1 data cache miss loads. Set Cmask=8 to count cycle.",
459 "PublicDescription": "Cycles with pending L2 miss loads. Set Cmask=2 to count cycle.",
470 "PublicDescription": "Cycles with pending memory loads. Set Cmask=2 to count cycle.",
492 "PublicDescription": "Execution stalls due to L1 data cache miss loads. Set Cmask=0CH.",
545 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
[all …]

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