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/linux/drivers/pci/controller/
H A D	pcie-altera.c	6 * Description: Altera PCIe host controller driver 45 #define S10_RP_CFG_ADDR(pcie, reg) \ argument 46 (((pcie)->hip_base) + (reg) + (1 << 20)) 47 #define S10_RP_SECONDARY(pcie) \ argument 48 readb(S10_RP_CFG_ADDR(pcie, PCI_SECONDARY_BUS)) 59 #define TLP_CFG_DW0(pcie, cfg) \ argument 62 #define TLP_CFG_DW1(pcie, tag, be) \ argument 63 (((PCI_DEVID(pcie->root_bus_nr, RP_DEVFN)) << 16) \| (tag << 8) \| (be)) 81 #define AGLX_RP_CFG_ADDR(pcie, reg) (((pcie) argument 82 AGLX_RP_SECONDARY(pcie) global() argument 148 cra_writel(struct altera_pcie * pcie,const u32 value,const u32 reg) cra_writel() argument 154 cra_readl(struct altera_pcie * pcie,const u32 reg) cra_readl() argument 159 cra_writew(struct altera_pcie * pcie,const u32 value,const u32 reg) cra_writew() argument 165 cra_readw(struct altera_pcie * pcie,const u32 reg) cra_readw() argument 170 cra_writeb(struct altera_pcie * pcie,const u32 value,const u32 reg) cra_writeb() argument 176 cra_readb(struct altera_pcie * pcie,const u32 reg) cra_readb() argument 181 altera_pcie_link_up(struct altera_pcie * pcie) altera_pcie_link_up() argument 186 s10_altera_pcie_link_up(struct altera_pcie * pcie) s10_altera_pcie_link_up() argument 195 aglx_altera_pcie_link_up(struct altera_pcie * pcie) aglx_altera_pcie_link_up() argument 223 tlp_write_tx(struct altera_pcie * pcie,struct tlp_rp_regpair_t * tlp_rp_regdata) tlp_write_tx() argument 231 s10_tlp_write_tx(struct altera_pcie * pcie,u32 reg0,u32 ctrl) s10_tlp_write_tx() argument 237 altera_pcie_valid_device(struct altera_pcie * pcie,struct pci_bus * bus,int dev) altera_pcie_valid_device() argument 253 tlp_read_packet(struct altera_pcie * pcie,u32 * value) tlp_read_packet() argument 292 s10_tlp_read_packet(struct altera_pcie * pcie,u32 * value) s10_tlp_read_packet() argument 339 tlp_write_packet(struct altera_pcie * pcie,u32 * headers,u32 data,bool align) tlp_write_packet() argument 366 s10_tlp_write_packet(struct altera_pcie * pcie,u32 * headers,u32 data,bool dummy) s10_tlp_write_packet() argument 375 get_tlp_header(struct altera_pcie * pcie,u8 bus,u32 devfn,int where,u8 byte_en,bool read,u32 * headers) get_tlp_header() argument 393 tlp_cfg_dword_read(struct altera_pcie * pcie,u8 bus,u32 devfn,int where,u8 byte_en,u32 * value) tlp_cfg_dword_read() argument 406 tlp_cfg_dword_write(struct altera_pcie * pcie,u8 bus,u32 devfn,int where,u8 byte_en,u32 value) tlp_cfg_dword_write() argument 437 s10_rp_read_cfg(struct altera_pcie * pcie,int where,int size,u32 * value) s10_rp_read_cfg() argument 457 s10_rp_write_cfg(struct altera_pcie * pcie,u8 busno,int where,int size,u32 value) s10_rp_write_cfg() argument 484 aglx_rp_read_cfg(struct altera_pcie * pcie,int where,int size,u32 * value) aglx_rp_read_cfg() argument 510 aglx_rp_write_cfg(struct altera_pcie * pcie,u8 busno,int where,int size,u32 value) aglx_rp_write_cfg() argument 537 aglx_ep_write_cfg(struct altera_pcie * pcie,u8 busno,unsigned int devfn,int where,int size,u32 value) aglx_ep_write_cfg() argument 559 aglx_ep_read_cfg(struct altera_pcie * pcie,u8 busno,unsigned int devfn,int where,int size,u32 * value) aglx_ep_read_cfg() argument 581 _altera_pcie_cfg_read(struct altera_pcie * pcie,u8 busno,unsigned int devfn,int where,int size,u32 * value) _altera_pcie_cfg_read() argument 629 _altera_pcie_cfg_write(struct altera_pcie * pcie,u8 busno,unsigned int devfn,int where,int size,u32 value) _altera_pcie_cfg_write() argument 667 struct altera_pcie pcie = bus->sysdata; altera_pcie_cfg_read() local 682 struct altera_pcie pcie = bus->sysdata; altera_pcie_cfg_write() local 699 altera_read_cap_word(struct altera_pcie * pcie,u8 busno,unsigned int devfn,int offset,u16 * value) altera_read_cap_word() argument 713 altera_write_cap_word(struct altera_pcie * pcie,u8 busno,unsigned int devfn,int offset,u16 value) altera_write_cap_word() argument 722 altera_wait_link_retrain(struct altera_pcie * pcie) altera_wait_link_retrain() argument 757 altera_pcie_retrain(struct altera_pcie * pcie) altera_pcie_retrain() argument 802 struct altera_pcie pcie; altera_pcie_isr() local 829 struct altera_pcie pcie; aglx_isr() local 852 altera_pcie_init_irq_domain(struct altera_pcie * pcie) altera_pcie_init_irq_domain() argument 867 altera_pcie_irq_teardown(struct altera_pcie * pcie) altera_pcie_irq_teardown() argument 874 altera_pcie_parse_dt(struct altera_pcie * pcie) altera_pcie_parse_dt() argument 898 altera_pcie_host_init(struct altera_pcie * pcie) altera_pcie_host_init() argument 992 struct altera_pcie pcie; altera_pcie_probe() local 1045 struct altera_pcie pcie = platform_get_drvdata(pdev); altera_pcie_remove() local [all...]
H A D	pcie-xilinx-nwl.c	3 * PCIe host controller driver for NWL PCIe Bridge 4 * Based on pcie-xilinx.c, pci-tegra.c 163 phys_addr_t phys_pcie_reg_base; /* Physical PCIe Controller Base / 176 static inline u32 nwl_bridge_readl(struct nwl_pcie pcie, u32 off) in nwl_bridge_readl() argument 178 return readl(pcie->breg_base + off); in nwl_bridge_readl() 181 static inline void nwl_bridge_writel(struct nwl_pcie pcie, u32 val, u32 off) in nwl_bridge_writel() argument 183 writel(val, pcie->breg_base + off); in nwl_bridge_writel() 186 static bool nwl_pcie_link_up(struct nwl_pcie pcie) in nwl_pcie_link_up() argument 188 if (readl(pcie->pcireg_base + PS_LINKUP_OFFSET) & PCIE_PHY_LINKUP_BIT) in nwl_pcie_link_up() 193 static bool nwl_phy_link_up(struct nwl_pcie *pcie) in nwl_phy_link_up() argument [all …]
H A D	pci-aardvark.c	3 * Driver for the Aardvark PCIe controller, used on Marvell Armada 33 /* PCIe core registers / 126 / PCIe window configuration / 217 / PCIe core controller registers / 225 / PCIe Central Interrupts Registers / 293 static inline void advk_writel(struct advk_pcie pcie, u32 val, u64 reg) in advk_writel() 295 writel(val, pcie->base + reg); in advk_writel() 298 static inline u32 advk_readl(struct advk_pcie pcie, u64 reg) in advk_readl() 300 return readl(pcie->base + reg); in advk_readl() 303 static u8 advk_pcie_ltssm_state(struct advk_pcie pcie) in advk_pcie_ltssm_state() 292 advk_writel(struct advk_pcie * pcie,u32 val,u64 reg) advk_writel() argument 297 advk_readl(struct advk_pcie * pcie,u64 reg) advk_readl() argument 302 advk_pcie_ltssm_state(struct advk_pcie * pcie) advk_pcie_ltssm_state() argument 312 advk_pcie_link_up(struct advk_pcie * pcie) advk_pcie_link_up() argument 319 advk_pcie_link_active(struct advk_pcie * pcie) advk_pcie_link_active() argument 333 advk_pcie_link_training(struct advk_pcie * pcie) advk_pcie_link_training() argument 347 advk_pcie_wait_for_link(struct advk_pcie * pcie) advk_pcie_wait_for_link() argument 362 advk_pcie_wait_for_retrain(struct advk_pcie * pcie) advk_pcie_wait_for_retrain() argument 373 advk_pcie_issue_perst(struct advk_pcie * pcie) advk_pcie_issue_perst() argument 385 advk_pcie_train_link(struct advk_pcie * pcie) advk_pcie_train_link() argument 453 advk_pcie_set_ob_win(struct advk_pcie * pcie,u8 win_num,phys_addr_t match,phys_addr_t remap,phys_addr_t mask,u32 actions) advk_pcie_set_ob_win() argument 467 advk_pcie_disable_ob_win(struct advk_pcie * pcie,u8 win_num) advk_pcie_disable_ob_win() argument 478 advk_pcie_setup_hw(struct advk_pcie * pcie) advk_pcie_setup_hw() argument 652 advk_pcie_check_pio_status(struct advk_pcie * pcie,bool allow_rrs,u32 * val) advk_pcie_check_pio_status() argument 759 advk_pcie_wait_pio(struct advk_pcie * pcie) advk_pcie_wait_pio() argument 782 struct advk_pcie pcie = bridge->data; advk_pci_bridge_emul_base_conf_read() local 818 struct advk_pcie pcie = bridge->data; advk_pci_bridge_emul_base_conf_write() local 858 struct advk_pcie pcie = bridge->data; advk_pci_bridge_emul_pcie_conf_read() local 912 struct advk_pcie pcie = bridge->data; advk_pci_bridge_emul_pcie_conf_write() local 950 struct advk_pcie pcie = bridge->data; advk_pci_bridge_emul_ext_conf_read() local 994 struct advk_pcie pcie = bridge->data; advk_pci_bridge_emul_ext_conf_write() local 1035 advk_sw_pci_bridge_init(struct advk_pcie * pcie) advk_sw_pci_bridge_init() argument 1090 advk_pcie_valid_device(struct advk_pcie * pcie,struct pci_bus * bus,int devfn) advk_pcie_valid_device() argument 1110 advk_pcie_pio_is_running(struct advk_pcie * pcie) advk_pcie_pio_is_running() argument 1142 struct advk_pcie pcie = bus->sysdata; advk_pcie_rd_conf() local 1228 struct advk_pcie pcie = bus->sysdata; advk_pcie_wr_conf() local 1299 struct advk_pcie pcie = irq_data_get_irq_chip_data(data); advk_msi_irq_compose_msi_msg() local 1309 struct advk_pcie pcie = d->domain->host_data; advk_msi_irq_mask() local 1323 struct advk_pcie pcie = d->domain->host_data; advk_msi_irq_unmask() local 1346 struct advk_pcie pcie = domain->host_data; advk_msi_irq_domain_alloc() local 1369 struct advk_pcie pcie = domain->host_data; advk_msi_irq_domain_free() local 1383 struct advk_pcie pcie = d->domain->host_data; advk_pcie_irq_mask() local 1397 struct advk_pcie pcie = d->domain->host_data; advk_pcie_irq_unmask() local 1412 struct advk_pcie pcie = h->host_data; advk_pcie_irq_map() local 1443 advk_pcie_init_msi_irq_domain(struct advk_pcie * pcie) advk_pcie_init_msi_irq_domain() argument 1464 advk_pcie_remove_msi_irq_domain(struct advk_pcie * pcie) advk_pcie_remove_msi_irq_domain() argument 1469 advk_pcie_init_irq_domain(struct advk_pcie * pcie) advk_pcie_init_irq_domain() argument 1510 advk_pcie_remove_irq_domain(struct advk_pcie * pcie) advk_pcie_remove_irq_domain() argument 1522 struct advk_pcie pcie = h->host_data; advk_pcie_rp_irq_map() local 1535 advk_pcie_init_rp_irq_domain(struct advk_pcie pcie) advk_pcie_init_rp_irq_domain() argument 1546 advk_pcie_remove_rp_irq_domain(struct advk_pcie * pcie) advk_pcie_remove_rp_irq_domain() argument 1551 advk_pcie_handle_pme(struct advk_pcie * pcie) advk_pcie_handle_pme() argument 1577 advk_pcie_handle_msi(struct advk_pcie * pcie) advk_pcie_handle_msi() argument 1598 advk_pcie_handle_int(struct advk_pcie * pcie) advk_pcie_handle_int() argument 1648 struct advk_pcie pcie = arg; advk_pcie_irq_handler() local 1665 struct advk_pcie pcie = dev->bus->sysdata; advk_pcie_map_irq() local 1678 advk_pcie_disable_phy(struct advk_pcie * pcie) advk_pcie_disable_phy() argument 1684 advk_pcie_enable_phy(struct advk_pcie * pcie) advk_pcie_enable_phy() argument 1710 advk_pcie_setup_phy(struct advk_pcie * pcie) advk_pcie_setup_phy() argument 1737 struct advk_pcie pcie; advk_pcie_probe() local 1908 struct advk_pcie pcie = platform_get_drvdata(pdev); advk_pcie_remove() local [all...]
H A D	pcie-brcmstb.c	46 /* Broadcom STB PCIe Register Offsets / 202 / PCIe parameters / 237 #define IDX_ADDR(pcie) ((pcie)->cfg->offsets[EXT_CFG_INDEX]) argument 238 #define DATA_ADDR(pcie) ((pcie)->cfg->offsets[EXT_CFG_DATA]) argument 239 #define PCIE_RGR1_SW_INIT_1(pcie) ((pcie)->cfg->offsets[RGR1_SW_INIT_1]) argument 240 #define HARD_DEBUG(pcie) ((pcie) argument 241 INTR2_CPU_BASE(pcie) global() argument 349 is_bmips(const struct brcm_pcie pcie) is_bmips() argument 354 brcm_pcie_bridge_sw_init_set(struct brcm_pcie * pcie,u32 val) brcm_pcie_bridge_sw_init_set() argument 439 brcm_pcie_set_ssc(struct brcm_pcie * pcie) brcm_pcie_set_ssc() argument 475 brcm_pcie_set_gen(struct brcm_pcie * pcie,int gen) brcm_pcie_set_gen() argument 487 brcm_pcie_set_outbound_win(struct brcm_pcie * pcie,u8 win,u64 cpu_addr,u64 pcie_addr,u64 size) brcm_pcie_set_outbound_win() argument 673 brcm_msi_remove(struct brcm_pcie * pcie) brcm_msi_remove() argument 704 brcm_pcie_enable_msi(struct brcm_pcie * pcie) brcm_pcie_enable_msi() argument 757 brcm_pcie_rc_mode(struct brcm_pcie * pcie) brcm_pcie_rc_mode() argument 765 brcm_pcie_link_up(struct brcm_pcie * pcie) brcm_pcie_link_up() argument 777 struct brcm_pcie pcie = bus->sysdata; brcm_pcie_map_bus() local 798 struct brcm_pcie pcie = bus->sysdata; brcm7425_pcie_map_bus() local 816 brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie * pcie,u32 val) brcm_pcie_bridge_sw_init_set_generic() argument 842 brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie * pcie,u32 val) brcm_pcie_bridge_sw_init_set_7278() argument 854 brcm_pcie_perst_set_4908(struct brcm_pcie * pcie,u32 val) brcm_pcie_perst_set_4908() argument 872 brcm_pcie_perst_set_7278(struct brcm_pcie * pcie,u32 val) brcm_pcie_perst_set_7278() argument 884 brcm_pcie_perst_set_generic(struct brcm_pcie * pcie,u32 val) brcm_pcie_perst_set_generic() argument 895 brcm_pcie_post_setup_bcm2712(struct brcm_pcie * pcie) brcm_pcie_post_setup_bcm2712() argument 937 brcm_pcie_get_inbound_wins(struct brcm_pcie * pcie,struct inbound_win inbound_wins[]) brcm_pcie_get_inbound_wins() argument 1091 set_inbound_win_registers(struct brcm_pcie * pcie,const struct inbound_win * inbound_wins,u8 num_inbound_wins) set_inbound_win_registers() argument 1131 brcm_pcie_setup(struct brcm_pcie * pcie) brcm_pcie_setup() argument 1323 brcm_extend_rbus_timeout(struct brcm_pcie * pcie) brcm_extend_rbus_timeout() argument 1337 brcm_config_clkreq(struct brcm_pcie * pcie) brcm_config_clkreq() argument 1399 brcm_pcie_start_link(struct brcm_pcie * pcie) brcm_pcie_start_link() argument 1476 struct brcm_pcie pcie = bus->sysdata; brcm_pcie_add_bus() local 1515 struct brcm_pcie pcie = bus->sysdata; brcm_pcie_remove_bus() local 1529 brcm_pcie_enter_l23(struct brcm_pcie * pcie) brcm_pcie_enter_l23() argument 1554 brcm_phy_cntl(struct brcm_pcie * pcie,const int start) brcm_phy_cntl() argument 1590 brcm_phy_start(struct brcm_pcie * pcie) brcm_phy_start() argument 1595 brcm_phy_stop(struct brcm_pcie * pcie) brcm_phy_stop() argument 1600 brcm_pcie_turn_off(struct brcm_pcie * pcie) brcm_pcie_turn_off() argument 1642 struct brcm_pcie pcie = dev_get_drvdata(dev); brcm_pcie_suspend_noirq() local 1693 struct brcm_pcie pcie = dev_get_drvdata(dev); brcm_pcie_resume_noirq() local 1769 brcm_pcie_dump_err(struct brcm_pcie * pcie,const char * type) brcm_pcie_dump_err() argument 1849 struct brcm_pcie pcie = brcm_pcie_die_notify_cb() local 1858 struct brcm_pcie pcie = brcm_pcie_panic_notify_cb() local 1864 brcm_register_die_notifiers(struct brcm_pcie * pcie) brcm_register_die_notifiers() argument 1874 brcm_unregister_die_notifiers(struct brcm_pcie * pcie) brcm_unregister_die_notifiers() argument 1881 __brcm_pcie_remove(struct brcm_pcie * pcie) __brcm_pcie_remove() argument 1894 struct brcm_pcie pcie = platform_get_drvdata(pdev); brcm_pcie_remove() local 2048 struct brcm_pcie pcie; brcm_pcie_probe() local [all...]
H A D	pcie-rcar-host.c	3 * PCIe driver for Renesas R-Car SoCs 7 * arch/sh/drivers/pci/pcie-sh7786.c 36 #include "pcie-rcar.h" 47 /* Structure representing the PCIe interface / 49 struct rcar_pcie pcie; member 67 Test if the PCIe controller received PM_ENTER_L1 DLLP and in rcar_pcie_wakeup() 68 * the PCIe controller is not in L1 link state. If true, apply in rcar_pcie_wakeup() 92 static u32 rcar_read_conf(struct rcar_pcie pcie, int where) in rcar_read_conf() argument 95 u32 val = rcar_pci_read_reg(pcie, where & ~3); in rcar_read_conf() 117 static int rcar_pci_write_reg_workaround(struct rcar_pcie pcie, u3 argument 131 rcar_pci_read_reg_workaround(struct rcar_pcie * pcie,u32 * val,unsigned int reg) rcar_pci_read_reg_workaround() argument 153 struct rcar_pcie pcie = &host->pcie; rcar_pcie_config_access() local 290 rcar_pcie_force_speedup(struct rcar_pcie pcie) rcar_pcie_force_speedup() argument 346 struct rcar_pcie pcie = &host->pcie; rcar_pcie_hw_enable() local 386 phy_wait_for_ack(struct rcar_pcie pcie) phy_wait_for_ack() argument 403 phy_write_reg(struct rcar_pcie * pcie,unsigned int rate,u32 addr,unsigned int lane,u32 data) phy_write_reg() argument 429 rcar_pcie_hw_init(struct rcar_pcie * pcie) rcar_pcie_hw_init() argument 501 struct rcar_pcie pcie = &host->pcie; rcar_pcie_phy_init_h1() local 526 struct rcar_pcie pcie = &host->pcie; rcar_pcie_phy_init_gen2() local 564 struct rcar_pcie pcie = &host->pcie; rcar_pcie_msi_irq() local 596 struct rcar_pcie pcie = &msi_to_host(msi)->pcie; rcar_msi_irq_ack() local 605 struct rcar_pcie pcie = &msi_to_host(msi)->pcie; rcar_msi_irq_mask() local 618 struct rcar_pcie pcie = &msi_to_host(msi)->pcie; rcar_msi_irq_unmask() local 631 struct rcar_pcie pcie = &msi_to_host(msi)->pcie; rcar_compose_msi_msg() local 707 struct rcar_pcie pcie = &msi_to_host(msi)->pcie; rcar_allocate_domains() local 731 struct rcar_pcie pcie = &host->pcie; rcar_pcie_enable_msi() local 784 struct rcar_pcie pcie = &host->pcie; rcar_pcie_teardown_msi() local 797 struct rcar_pcie pcie = &host->pcie; rcar_pcie_get_resources() local 844 rcar_pcie_inbound_ranges(struct rcar_pcie pcie,struct resource_entry * entry,int * index) rcar_pcie_inbound_ranges() argument 939 struct rcar_pcie pcie; rcar_pcie_probe() local 1043 struct rcar_pcie pcie = &host->pcie; rcar_pcie_resume() local 1082 struct rcar_pcie *pcie = &host->pcie; rcar_pcie_resume_noirq() local [all...]
H A D	Kconfig	11 tristate "Aardvark PCIe controller" 18 Add support for Aardvark 64bit PCIe Host Controller. This 23 tristate "Altera PCIe controller" 26 Say Y here if you want to enable PCIe controller support on Altera 30 tristate "Altera PCIe MSI feature" 35 Say Y here if you want PCIe MSI support for the Altera FPGA. 44 tristate "Apple PCIe controller" 51 Say Y here if you want to enable PCIe controller support on Apple 62 bool "ASPEED PCIe controller" 68 Enable this option to support the PCIe controller found on ASPEED [all …]
H A D	pcie-rcar.c	3 * PCIe driver for Renesas R-Car SoCs 12 #include "pcie-rcar.h" 14 void rcar_pci_write_reg(struct rcar_pcie pcie, u32 val, unsigned int reg) in rcar_pci_write_reg() argument 16 writel(val, pcie->base + reg); in rcar_pci_write_reg() 19 u32 rcar_pci_read_reg(struct rcar_pcie pcie, unsigned int reg) in rcar_pci_read_reg() argument 21 return readl(pcie->base + reg); in rcar_pci_read_reg() 24 void rcar_rmw32(struct rcar_pcie pcie, int where, u32 mask, u32 data) in rcar_rmw32() argument 27 u32 val = rcar_pci_read_reg(pcie, where & ~3); in rcar_rmw32() 31 rcar_pci_write_reg(pcie, val, where & ~3); in rcar_rmw32() 34 int rcar_pcie_wait_for_phyrdy(struct rcar_pcie pcie) in rcar_pcie_wait_for_phyrdy() argument [all …]
H A D	pcie-iproc-bcma.c	15 #include "pcie-iproc.h" 28 struct iproc_pcie pcie = dev->sysdata; in iproc_bcma_pcie_map_irq() local 29 struct bcma_device bdev = container_of(pcie->dev, struct bcma_device, dev); in iproc_bcma_pcie_map_irq() 37 struct iproc_pcie pcie; in iproc_bcma_pcie_probe() local 41 bridge = devm_pci_alloc_host_bridge(dev, sizeof(pcie)); in iproc_bcma_pcie_probe() 45 pcie = pci_host_bridge_priv(bridge); in iproc_bcma_pcie_probe() 47 pcie->dev = dev; in iproc_bcma_pcie_probe() 49 pcie->type = IPROC_PCIE_PAXB_BCMA; in iproc_bcma_pcie_probe() 50 pcie->base = bdev->io_addr; in iproc_bcma_pcie_probe() 51 if (!pcie in iproc_bcma_pcie_probe() 76 struct iproc_pcie *pcie = bcma_get_drvdata(bdev); iproc_bcma_pcie_remove() local [all...]
/linux/Documentation/devicetree/bindings/phy/
H A D	qcom,sc8280xp-qmp-pcie-phy.yaml	`4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml# 7 title: Qualcomm QMP PHY controller (PCIe, SC8280XP) 14 controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. 19 - qcom,eliza-qmp-gen3x1-pcie-phy 20 - qcom,eliza-qmp-gen3x2-pcie-phy 21 - qcom,glymur-qmp-gen4x2-pcie-phy 22 - qcom,glymur-qmp-gen5x4-pcie-phy 23 - qcom,kaanapali-qmp-gen3x2-pcie-phy 24 - qcom,qcs615-qmp-gen3x1-pcie-phy 25 - qcom,qcs8300-qmp-gen4x2-pcie [all...]`
/linux/drivers/pci/controller/dwc/
H A D	pcie-visconti.c	3 * DWC PCIe RC driver for Toshiba Visconti ARM SoC 23 #include "pcie-designware.h" 95 /* Access registers in PCIe ulreg / 96 static void visconti_ulreg_writel(struct visconti_pcie pcie, u32 val, u32 reg) 98 writel_relaxed(val, pcie->ulreg_base + reg); in visconti_ulreg_writel() 101 static u32 visconti_ulreg_readl(struct visconti_pcie pcie, u32 reg) 103 return readl_relaxed(pcie->ulreg_base + reg); in visconti_ulreg_readl() 106 / Access registers in PCIe smu / 107 static void visconti_smu_writel(struct visconti_pcie pcie, u32 val, u32 reg) 109 writel_relaxed(val, pcie in visconti_smu_writel() 97 visconti_ulreg_writel(struct visconti_pcie * pcie,u32 val,u32 reg) visconti_ulreg_writel() argument 102 visconti_ulreg_readl(struct visconti_pcie * pcie,u32 reg) visconti_ulreg_readl() argument 108 visconti_smu_writel(struct visconti_pcie * pcie,u32 val,u32 reg) visconti_smu_writel() argument 114 visconti_mpu_writel(struct visconti_pcie * pcie,u32 val,u32 reg) visconti_mpu_writel() argument 119 visconti_mpu_readl(struct visconti_pcie * pcie,u32 reg) visconti_mpu_readl() argument 126 struct visconti_pcie pcie = dev_get_drvdata(pci->dev); visconti_pcie_link_up() local 135 struct visconti_pcie pcie = dev_get_drvdata(pci->dev); visconti_pcie_start_link() local 163 struct visconti_pcie pcie = dev_get_drvdata(pci->dev); visconti_pcie_stop_link() local 196 struct visconti_pcie pcie = dev_get_drvdata(pci->dev); visconti_pcie_host_init() local 243 visconti_get_resources(struct platform_device * pdev,struct visconti_pcie * pcie) visconti_get_resources() argument 277 visconti_add_pcie_port(struct visconti_pcie * pcie,struct platform_device * pdev) visconti_add_pcie_port() argument 295 struct visconti_pcie *pcie; visconti_pcie_probe() local [all...]
H A D	pcie-uniphier.c	3 * PCIe host controller driver for UniPhier SoCs 23 #include "pcie-designware.h" 75 static void uniphier_pcie_ltssm_enable(struct uniphier_pcie pcie, in uniphier_pcie_ltssm_enable() argument 80 val = readl(pcie->base + PCL_APP_READY_CTRL); in uniphier_pcie_ltssm_enable() 85 writel(val, pcie->base + PCL_APP_READY_CTRL); in uniphier_pcie_ltssm_enable() 88 static void uniphier_pcie_init_rc(struct uniphier_pcie pcie) in uniphier_pcie_init_rc() argument 93 val = readl(pcie->base + PCL_MODE); in uniphier_pcie_init_rc() 96 writel(val, pcie->base + PCL_MODE); in uniphier_pcie_init_rc() 99 val = readl(pcie->base + PCL_APP_PM0); in uniphier_pcie_init_rc() 101 writel(val, pcie->base + PCL_APP_PM0); in uniphier_pcie_init_rc() [all …]
H A D	pcie-armada8k.c	3 * PCIe host controller driver for Marvell Armada-8K SoCs 5 * Armada-8K PCIe Glue Layer Source Code 25 #include "pcie-designware.h" 73 static void armada8k_pcie_disable_phys(struct armada8k_pcie pcie) in armada8k_pcie_disable_phys() argument 78 phy_power_off(pcie->phy[i]); in armada8k_pcie_disable_phys() 79 phy_exit(pcie->phy[i]); in armada8k_pcie_disable_phys() 83 static int armada8k_pcie_enable_phys(struct armada8k_pcie pcie) in armada8k_pcie_enable_phys() argument 89 ret = phy_init(pcie->phy[i]); in armada8k_pcie_enable_phys() 93 ret = phy_set_mode_ext(pcie->phy[i], PHY_MODE_PCIE, in armada8k_pcie_enable_phys() 94 pcie->phy_count); in armada8k_pcie_enable_phys() [all …]
H A D	pcie-al.c	3 * PCIe host controller driver for Amazon's Annapurna Labs IP (used in chips 26 struct al_pcie_acpi pcie = cfg->priv; in al_pcie_map_bus() local 27 void __iomem dbi_base = pcie->dbi_base; in al_pcie_map_bus() 31 * The DW PCIe core doesn't filter out transactions to other in al_pcie_map_bus() 92 #include "pcie-designware.h" 132 void __iomem controller_base; / base of PCIe unit (not DW core) / 142 static inline u32 al_pcie_controller_readl(struct al_pcie pcie, u32 offset) in al_pcie_controller_readl() argument 144 return readl_relaxed(pcie->controller_base + offset); in al_pcie_controller_readl() 147 static inline void al_pcie_controller_writel(struct al_pcie pcie, u32 offset, in al_pcie_controller_writel() argument 150 writel_relaxed(val, pcie in al_pcie_controller_writel() 153 al_pcie_rev_id_get(struct al_pcie pcie,unsigned int * rev_id) al_pcie_rev_id_get() argument 184 al_pcie_reg_offsets_set(struct al_pcie * pcie) al_pcie_reg_offsets_set() argument 203 al_pcie_target_bus_set(struct al_pcie * pcie,u8 target_bus,u8 mask_target_bus) al_pcie_target_bus_set() argument 221 struct al_pcie pcie = to_al_pcie(to_dw_pcie_from_pp(pp)); al_pcie_conf_addr_map_bus() local 245 al_pcie_config_prepare(struct al_pcie pcie) al_pcie_config_prepare() argument 303 struct al_pcie *pcie = to_al_pcie(pci); al_pcie_host_init() local [all...]
/linux/drivers/pci/controller/mobiveil/
H A D	pcie-mobiveil-host.c	3 * PCIe host controller driver for Mobiveil PCIe Host controller 26 #include "pcie-mobiveil.h" 51 struct mobiveil_pcie pcie = bus->sysdata; in mobiveil_pcie_map_bus() local 52 struct mobiveil_root_port rp = &pcie->rp; in mobiveil_pcie_map_bus() 60 return pcie->csr_axi_slave_base + where; in mobiveil_pcie_map_bus() 72 mobiveil_csr_writel(pcie, value, PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); in mobiveil_pcie_map_bus() 86 struct mobiveil_pcie pcie = irq_desc_get_handler_data(desc); in mobiveil_pcie_isr() local 87 struct device dev = &pcie->pdev->dev; in mobiveil_pcie_isr() 88 struct mobiveil_root_port *rp = &pcie->rp; in mobiveil_pcie_isr() 103 val = mobiveil_csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); in mobiveil_pcie_isr() [all …]
H A D	pcie-mobiveil.c	3 * PCIe host controller driver for Mobiveil PCIe Host controller 18 #include "pcie-mobiveil.h" 28 static void mobiveil_pcie_sel_page(struct mobiveil_pcie pcie, u8 pg_idx) in mobiveil_pcie_sel_page() argument 32 val = readl(pcie->csr_axi_slave_base + PAB_CTRL); in mobiveil_pcie_sel_page() 36 writel(val, pcie->csr_axi_slave_base + PAB_CTRL); in mobiveil_pcie_sel_page() 39 static void __iomem mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, in mobiveil_pcie_comp_addr() argument 44 mobiveil_pcie_sel_page(pcie, 0); in mobiveil_pcie_comp_addr() 45 return pcie->csr_axi_slave_base + off; in mobiveil_pcie_comp_addr() 48 mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off)); in mobiveil_pcie_comp_addr() 49 return pcie->csr_axi_slave_base + OFFSET_TO_PAGE_ADDR(off); in mobiveil_pcie_comp_addr() [all …]
H A D	pcie-layerscape-gen4.c	3 * PCIe Gen4 host controller driver for NXP Layerscape SoCs 23 #include "pcie-mobiveil.h" 45 static inline u32 ls_g4_pcie_pf_readl(struct ls_g4_pcie pcie, u32 off) in ls_g4_pcie_pf_readl() argument 47 return ioread32(pcie->pci.csr_axi_slave_base + PCIE_PF_OFF + off); in ls_g4_pcie_pf_readl() 50 static inline void ls_g4_pcie_pf_writel(struct ls_g4_pcie pcie, in ls_g4_pcie_pf_writel() argument 53 iowrite32(val, pcie->pci.csr_axi_slave_base + PCIE_PF_OFF + off); in ls_g4_pcie_pf_writel() 58 struct ls_g4_pcie pcie = to_ls_g4_pcie(pci); in ls_g4_pcie_link_up() local 61 state = ls_g4_pcie_pf_readl(pcie, PCIE_PF_DBG); in ls_g4_pcie_link_up() 65 static void ls_g4_pcie_disable_interrupt(struct ls_g4_pcie pcie) in ls_g4_pcie_disable_interrupt() argument 67 struct mobiveil_pcie *mv_pci = &pcie->pci; in ls_g4_pcie_disable_interrupt() [all …]
H A D	pcie-mobiveil.h	3 * PCIe host controller driver for Mobiveil PCIe Host controller 147 int (interrupt_init)(struct mobiveil_pcie pcie); 162 bool (link_up)(struct mobiveil_pcie pcie); 169 phys_addr_t pcie_reg_base; /* Physical PCIe Controller Base / 178 int mobiveil_pcie_host_probe(struct mobiveil_pcie pcie); 179 int mobiveil_host_init(struct mobiveil_pcie pcie, bool reinit); 180 bool mobiveil_pcie_link_up(struct mobiveil_pcie pcie); 181 int mobiveil_bringup_link(struct mobiveil_pcie pcie); 182 void program_ob_windows(struct mobiveil_pcie pcie, int win_num, u64 cpu_addr, 184 void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, [all …]
/linux/drivers/pci/controller/cadence/
H A D	pcie-cadence-ep.c	3 // Cadence PCIe endpoint controller driver. 15 #include "pcie-cadence.h" 22 static u8 cdns_pcie_get_fn_from_vfn(struct cdns_pcie pcie, u8 fn, u8 vfn) in cdns_pcie_get_fn_from_vfn() argument 30 cap = cdns_pcie_find_ext_capability(pcie, PCI_EXT_CAP_ID_SRIOV); in cdns_pcie_get_fn_from_vfn() 31 first_vf_offset = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_SRIOV_VF_OFFSET); in cdns_pcie_get_fn_from_vfn() 32 stride = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_SRIOV_VF_STRIDE); in cdns_pcie_get_fn_from_vfn() 42 struct cdns_pcie pcie = &ep->pcie; in cdns_pcie_ep_write_header() local 46 cap = cdns_pcie_find_ext_capability(pcie, PCI_EXT_CAP_ID_SRIOV); in cdns_pcie_ep_write_header() 52 cdns_pcie_ep_fn_writew(pcie, fn, reg, hdr->deviceid); in cdns_pcie_ep_write_header() 56 cdns_pcie_ep_fn_writew(pcie, fn, PCI_DEVICE_ID, hdr->deviceid); in cdns_pcie_ep_write_header() [all …]
/linux/Documentation/devicetree/bindings/pci/
H A D	rcar-pci-host.yaml	`8 title: Renesas R-Car PCIe Host 20 - const: renesas,pcie-r8a7779 # R-Car H1 23 - renesas,pcie-r8a7742 # RZ/G1H 24 - renesas,pcie-r8a7743 # RZ/G1M 25 - renesas,pcie-r8a7744 # RZ/G1N 26 - renesas,pcie-r8a7790 # R-Car H2 27 - renesas,pcie-r8a7791 # R-Car M2-W 28 - renesas,pcie-r8a7793 # R-Car M2-N 29 - const: renesas,pcie-rcar-gen2 # R-Car Gen2 and RZ/G1 32 - renesas,pcie-r8a774a1 # RZ/G2M [all …]`
H A D	fsl,layerscape-pcie.yaml	`4 $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml# 7 title: Freescale Layerscape PCIe Root Complex(RC) controller 13 This PCIe RC controller is based on the Synopsys DesignWare PCIe IP 19 register available in the Freescale PCIe controller register set, 20 which can allow determining the underlying DesignWare PCIe controller version 27 - fsl,ls1012a-pcie 28 - fsl,ls1021a-pcie 29 - fsl,ls1028a-pcie 30 - fsl,ls1043a-pcie 31 - fsl,ls1046a-pcie [all …]`
H A D	ti,j721e-pci-ep.yaml	`8 title: TI J721E PCI EP (PCIe Wrapper) 16 - const: ti,j721e-pcie-ep 17 - const: ti,j784s4-pcie-ep 18 - description: PCIe EP controller in AM64 20 - const: ti,am64-pcie-ep 21 - const: ti,j721e-pcie-ep 22 - description: PCIe EP controller in J7200 24 - const: ti,j7200-pcie-ep 25 - const: ti,j721e-pcie-ep 37 ti,syscon-pcie-ctrl: [all …]`
H A D	axis,artpec6-pcie.yaml	`5 $id: http://devicetree.org/schemas/pci/axis,artpec6-pcie.yaml# 8 title: Axis ARTPEC-6 PCIe host controller 14 This PCIe host controller is based on the Synopsys DesignWare PCIe IP. 21 - axis,artpec6-pcie 22 - axis,artpec6-pcie-ep 23 - axis,artpec7-pcie 24 - axis,artpec7-pcie-ep 32 - axis,artpec6-pcie 33 - axis,artpec6-pcie-ep 34 - axis,artpec7-pcie [all …]`
H A D	nvidia,tegra20-pcie.txt	`1 NVIDIA Tegra PCIe controller 5 - "nvidia,tegra20-pcie": for Tegra20 6 - "nvidia,tegra30-pcie": for Tegra30 7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132 8 - "nvidia,tegra210-pcie": for Tegra210 9 - "nvidia,tegra186-pcie": for Tegra186 11 contain BPMP phandle and PCIe power partition ID. This is required only 71 - "default": active state, puts PCIe I/O out of deep power down state 72 - "idle": puts PCIe I/O into deep power down state 79 - pcie [all …]`
H A D	brcm,stb-pcie.yaml	`4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml# 7 title: Brcmstb PCIe Host Controller 16 - brcm,bcm2711-pcie # The Raspberry Pi 4 17 - brcm,bcm2712-pcie # Raspberry Pi 5 18 - brcm,bcm4908-pcie 19 - brcm,bcm7211-pcie # Broadcom STB version of RPi4 20 - brcm,bcm7216-pcie # Broadcom 7216 Arm 21 - brcm,bcm7278-pcie # Broadcom 7278 Arm 22 - brcm,bcm7425-pcie # Broadcom 7425 MIPs 23 - brcm,bcm7435-pcie # Broadcom 7435 MIPs [all …]`
/linux/arch/powerpc/sysdev/
H A D	fsl_pci.h	19 #define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status / 22 #define PCIE_IP_REV_2_2 0x02080202 / PCIE IP block version Rev2.2 / 23 #define PCIE_IP_REV_3_0 0x02080300 / PCIE IP block version Rev3.0 / 60 __be32 config_addr; / 0x.000 - PCI/PCIE Configuration Address Register / 61 __be32 config_data; / 0x.004 - PCI/PCIE Configuration Data Register / 63 __be32 pex_otb_cpl_tor; / 0x.00c - PCIE Outbound completion timeout register / 64 __be32 pex_conf_tor; / 0x.010 - PCIE configuration timeout register / 65 __be32 pex_config; / 0x.014 - PCIE CONFIG Register / 66 __be32 pex_int_status; / 0x.018 - PCIE interrupt status / 68 __be32 pex_pme_mes_dr; / 0x.020 - PCIE PME and message detect register */ [all …]

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