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/linux/drivers/firmware/efi/
H A Dcper.c1 // SPDX-License-Identifier: GPL-2.0
33 * multiple boot may co-exist in ERST.
74 * cper_print_bits - print strings for set bits
104 len += scnprintf(buf+len, sizeof(buf)-len, ", %s", str); in cper_print_bits()
111 * cper_bits_to_str - return a string for set bits
154 len--; in cper_print_proc_generic()
162 len - in cper_print_proc_generic()
241 cper_mem_err_location(struct cper_mem_err_compact * mem,char * msg) cper_mem_err_location() argument
296 cper_dimm_err_location(struct cper_mem_err_compact * mem,char * msg) cper_dimm_err_location() argument
317 cper_mem_err_pack(const struct cper_sec_mem_err * mem,struct cper_mem_err_compact * cmem) cper_mem_err_pack() argument
354 cper_print_mem(const char * pfx,const struct cper_sec_mem_err * mem,int len) cper_print_mem() argument
402 cper_print_pcie(const char * pfx,const struct cper_sec_pcie * pcie,const struct acpi_hest_generic_data * gdata) cper_print_pcie() argument
589 struct cper_sec_pcie *pcie = acpi_hest_get_payload(gdata); cper_estatus_print_section() local
[all...]
/linux/drivers/pci/controller/
H A Dpcie-iproc-bcma.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
15 #include "pcie-iproc.h"
21 dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL; in bcma_pcie2_fixup_class()
28 struct iproc_pcie *pcie = dev->sysdata; in iproc_bcma_pcie_map_irq() local
29 struct bcma_device *bdev = container_of(pcie->dev, struct bcma_device, dev); in iproc_bcma_pcie_map_irq()
36 struct device *dev = &bdev->dev; in iproc_bcma_pcie_probe()
37 struct iproc_pcie *pcie; in iproc_bcma_pcie_probe() local
41 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in iproc_bcma_pcie_probe()
43 return -ENOMEM; in iproc_bcma_pcie_probe()
[all …]
H A Dpcie-iproc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2014-2015 Broadcom Corporation
10 * enum iproc_pcie_type - iProc PCIe interface type
11 * @IPROC_PCIE_PAXB_BCMA: BCMA-based host controllers
12 * @IPROC_PCIE_PAXB: PAXB-based host controllers for
14 * @IPROC_PCIE_PAXB_V2: PAXB-based host controllers for Stingray SoCs
15 * @IPROC_PCIE_PAXC: PAXC-based host controllers
16 * @IPROC_PCIE_PAXC_V2: PAXC-based host controllers (second generation)
33 * struct iproc_pcie_ob - iProc PCIe outbound mapping
35 * the iProc PCIe core
[all …]
H A Dpci-mvebu.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Marvell Armada 370 and Armada XP SoCs
5 * Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
27 #include "../pci-bridge-emul.h"
30 * PCIe unit register offsets.
40 #define PCIE_BAR_CTRL_OFF(n) (0x1804 + (((n) - 1) * 4))
83 /* Structure representing all PCIe interfaces */
89 struct resource mem; member
99 /* Structure representing one PCIe interface */
116 struct mvebu_pcie *pcie; member
[all …]
H A Dpcie-mediatek.c1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek PCIe host controller driver.
15 #include <linux/irqchip/irq-msi-lib.h>
33 /* PCIe shared registers */
39 /* PCIe per port registers */
70 /* PCIe V2 share registers */
75 /* PCIe V
190 struct mtk_pcie *pcie; global() member
226 mtk_pcie_subsys_powerdown(struct mtk_pcie * pcie) mtk_pcie_subsys_powerdown() argument
238 struct mtk_pcie *pcie = port->pcie; mtk_pcie_port_free() local
246 mtk_pcie_put_resources(struct mtk_pcie * pcie) mtk_pcie_put_resources() argument
340 struct mtk_pcie *pcie = bus->sysdata; mtk_pcie_find_port() local
522 mtk_pcie_irq_teardown(struct mtk_pcie * pcie) mtk_pcie_irq_teardown() argument
629 struct mtk_pcie *pcie = port->pcie; mtk_pcie_setup_irq() local
656 struct mtk_pcie *pcie = port->pcie; mtk_pcie_startup_port_v2() local
658 struct resource *mem = NULL; mtk_pcie_startup_port_v2() local
750 struct mtk_pcie *pcie = bus->sysdata; mtk_pcie_map_bus() local
766 struct mtk_pcie *pcie = port->pcie; mtk_pcie_startup_port() local
826 struct mtk_pcie *pcie = port->pcie; mtk_pcie_enable_port() local
905 mtk_pcie_parse_port(struct mtk_pcie * pcie,struct device_node * node,int slot) mtk_pcie_parse_port() argument
985 mtk_pcie_subsys_powerup(struct mtk_pcie * pcie) mtk_pcie_subsys_powerup() argument
1037 mtk_pcie_setup(struct mtk_pcie * pcie) mtk_pcie_setup() argument
1081 struct mtk_pcie *pcie; mtk_pcie_probe() local
1118 mtk_pcie_free_resources(struct mtk_pcie * pcie) mtk_pcie_free_resources() argument
1128 struct mtk_pcie *pcie = platform_get_drvdata(pdev); mtk_pcie_remove() local
1142 struct mtk_pcie *pcie = dev_get_drvdata(dev); mtk_pcie_suspend_noirq() local
1166 struct mtk_pcie *pcie = dev_get_drvdata(dev); mtk_pcie_resume_noirq() local
[all...]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-mv78460.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-xp-mv78260.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-385.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
30 compatible = "arm,cortex-a9";
36 pciec: pcie {
[all …]
H A Darmada-xp-mv78230.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-380.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
31 internal-regs {
33 compatible = "marvell,mv88f6810-pinctrl";
[all …]
H A Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 enable-method = "marvell,armada-390-smp";
37 compatible = "arm,cortex-a9";
[all …]
H A Dkirkwood-6282.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 pciec: pcie@82000000 {
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
18 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
20 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
23 pcie0: pcie@1,0 {
25 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
[all …]
/linux/arch/powerpc/sysdev/
H A Dfsl_pci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC83xx/85xx/86xx PCI/PCIE support routing.
5 * Copyright 2007-2012 Freescale Semiconductor, Inc.
6 * Copyright 2008-2009 MontaVista Software, Inc.
11 * Roy Zang <tie-fei.zang@freescale.com>
12 * MPC83xx PCI-Express support:
34 #include <asm/pci-bridge.h>
35 #include <asm/ppc-pci.h>
39 #include <asm/ppc-opcode.h>
51 /* if we aren't a PCIe don't bother */ in quirk_fsl_pcie_early()
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dsifive,fu740-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive FU740 PCIe host controller
10 SiFive FU740 PCIe host controller is based on the Synopsys DesignWare
11 PCI core. It shares common features with the PCIe DesignWare core and
13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
16 - Paul Walmsley <paul.walmsley@sifive.com>
17 - Greentime Hu <greentime.hu@sifive.com>
[all …]
H A Dcdns,cdns-pcie-ep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence PCIe EP Controller
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: cdns-pcie-ep.yaml#
17 const: cdns,cdns-pcie-ep
22 reg-names:
24 - const: reg
[all …]
H A Dti,j721e-pci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: TI J721E PCI EP (PCIe Wrapper)
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - const: ti,j721e-pcie-ep
17 - const: ti,j784s4-pcie-ep
18 - description: PCIe EP controller in AM64
[all …]
H A Drockchip,rk3399-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip AXI PCIe Endpoint
10 - Shawn Lin <shawn.lin@rock-chips.com>
13 - $ref: /schemas/pci/pci-ep.yaml#
14 - $ref: rockchip,rk3399-pcie-common.yaml#
18 const: rockchip,rk3399-pcie-ep
22 reg-names:
[all …]
/linux/arch/powerpc/boot/dts/
H A Dturris1x.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
[all …]
/linux/arch/mips/pci/
H A Dpcie-octeon.c17 #include <asm/octeon/cvmx-npei-defs.h>
18 #include <asm/octeon/cvmx-pciercx-defs.h>
19 #include <asm/octeon/cvmx-pescx-defs.h>
20 #include <asm/octeon/cvmx-pexp-defs.h>
21 #include <asm/octeon/cvmx-pemx-defs.h>
22 #include <asm/octeon/cvmx-dpi-defs.h>
23 #include <asm/octeon/cvmx-sli-defs.h>
24 #include <asm/octeon/cvmx-sriox-defs.h>
25 #include <asm/octeon/cvmx-helper-errata.h>
26 #include <asm/octeon/pci-octeon.h>
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-evm-pcie0-pcie1-ep.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
8 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/ti,sci_pm_domain.h>
17 #include "k3-pinctrl.h"
32 #address-cells = <2>;
33 #size-cells = <2>;
34 interrupt-parent = <&gic500>;
36 pcie0_ep: pcie-ep@2900000 {
[all …]
/linux/Documentation/driver-api/cxl/
H A Dtheory-of-operation.rst1 .. SPDX-License-Identifier: GPL-2.0
9 CXL.mem protocol. It contains some amount of volatile memory, persistent memory,
14 range across multiple devices underneath a host-bridge or interleaved
15 across host-bridges.
20 logical device, the CXL subsystem is tasked to take PCIe and ACPI objects and
21 assemble them into a CXL.mem decode topology. The need for runtime configuration
22 of the CXL.mem topology is also similar to RAID in that different environments
26 and disable any striping in the CXL.mem topology.
29 (Linux term for the top of the CXL decode topology). From there, PCIe topology
31 Each PCIe Switch in the path between the root and an endpoint introduces a point
[all …]
/linux/Documentation/devicetree/bindings/bus/
H A Dmvebu-mbus.txt6 - compatible: Should be set to one of the following:
7 marvell,armada370-mbus
8 marvell,armadaxp-mbus
9 marvell,armada375-mbus
10 marvell,armada380-mbus
11 marvell,kirkwood-mbus
12 marvell,dove-mbus
13 marvell,orion5x-88f5281-mbus
14 marvell,orion5x-88f5182-mbus
15 marvell,orion5x-88f5181-mbus
[all …]
/linux/arch/sh/drivers/pci/
H A Dpcie-sh7786.c1 // SPDX-License-Identifier: GPL-2.0
3 * Low-Level PCI Express Support for the SH7786
5 * Copyright (C) 2009 - 2011 Paul Mundt
15 #include <linux/dma-map-ops.h>
21 #include "pcie-sh7786.h"
44 .name = "PCIe0 MEM 0",
46 .end = 0xfd000000 + SZ_8M - 1,
49 .name = "PCIe0 MEM 1",
51 .end = 0xc0000000 + SZ_512M - 1,
54 .name = "PCIe0 MEM 2",
[all …]
/linux/Documentation/firmware-guide/acpi/apei/
H A Doutput_format.rst1 .. SPDX-License-Identifier: GPL-2.0
28 PCIe error | unknown, <uuid string>
32 <pcie section data> | <null>
55 [cache error][, TLB error][, bus error][, micro-architectural error]
78 [error_type: <integer>, <mem error type string>]
80 <mem error type string>* :=
81 unknown | no error | single-bit ECC | multi-bit ECC | \
82 single-symbol chipkill ECC | multi-symbol chipkill ECC | master abort | \
87 <pcie section data> :=
88 [port_type: <integer>, <pcie port type string>]
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3576-luckfox-core3576.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,vop2.h>
24 stdout-path = "serial0:1500000n8";
27 hdmi-con {
28 compatible = "hdmi-connector";
29 hdmi-pwr-supply = <&vcc_5v0_hdmi>;
[all …]

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