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/freebsd/sys/dev/bnxt/bnxt_re/
H A Dqplib_res.c61 /* PBL */
63 struct bnxt_qplib_pbl *pbl, bool is_umem) in __free_pbl() argument
70 for (i = 0; i < pbl->pg_count; i++) { in __free_pbl()
71 if (pbl->pg_arr[i]) { in __free_pbl()
72 dma_free_coherent(&pdev->dev, pbl->pg_size, in __free_pbl()
73 (void *)((u64)pbl->pg_arr[i] & in __free_pbl()
75 pbl->pg_map_arr[i]); in __free_pbl()
79 "QPLIB: PBL free pg_arr[%d] empty?!\n", in __free_pbl()
81 pbl->pg_arr[i] = NULL; in __free_pbl()
85 if (pbl->pg_arr) { in __free_pbl()
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H A Dqplib_res.h255 struct bnxt_qplib_pbl pbl[PBL_LVL_MAX]; member
258 to the PBL entries */
539 struct bnxt_qplib_pbl *pbl; in _get_pte_pg_size() local
541 pbl = &hwq->pbl[hwq->level]; in _get_pte_pg_size()
542 switch (pbl->pg_size) { in _get_pte_pg_size()
563 return hwq->pbl[PBL_LVL_0].pg_map_arr[0]; in _get_base_addr()
569 struct bnxt_qplib_pbl *pbl; in _get_base_pg_size() local
571 pbl = &hwq->pbl[PBL_LVL_0]; in _get_base_pg_size()
572 switch (pbl->pg_size) { in _get_base_pg_size()
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_chain.h105 /* Fastpath portions of the PBL [if exists] */
109 * respectively to the physical addresses in the pbl table.
117 } pbl; member
147 /* Base address of a pre-allocated buffer for pbl */
357 *p_next_elem = p_chain->pbl.pp_virt_addr_tbl[page_index]; in ecore_chain_advance_page()
442 p_prod_page_idx = &p_chain->pbl.c.pbl_u16.prod_page_idx; in ecore_chain_produce()
452 p_prod_page_idx = &p_chain->pbl.c.pbl_u32.prod_page_idx; in ecore_chain_produce()
518 p_cons_page_idx = &p_chain->pbl.c.pbl_u16.cons_page_idx; in ecore_chain_consume()
528 p_cons_page_idx = &p_chain->pbl.c.pbl_u32.cons_page_idx; in ecore_chain_consume()
572 p_chain->pbl.c.pbl_u16.prod_page_idx = (u16)reset_val; in ecore_chain_reset()
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H A Dstorage_common.h163 u8 bdq_pbl_num_entries[BDQ_NUM_IDS] /* Per BDQ ID, the PBL page size (number of entries in PBL) */;
165 struct regpair bdq_pbl_base_address[BDQ_NUM_IDS] /* Per BDQ ID, the PBL page Base Address */;
H A Diwarp_common.h44 #define IWARP_SHARED_QUEUE_PAGE_RQ_PBL_MAX_SIZE (0x1000) //Max RQ PBL Size is 4KB
46 #define IWARP_SHARED_QUEUE_PAGE_SQ_PBL_MAX_SIZE (0x3000) //Max SQ PBL Size is 12KB
H A Decore_l2_api.h246 * @param cqe_pbl_addr Physical address of the CQE PBL Table.
247 * @param cqe_pbl_size Size of the CQE PBL Table
292 * @param pbl_addr address of the pbl array
293 * @param pbl_size number of entries in pbl
H A Decore_roce_api.h225 u8 num_pbl_pages; /* Number of pages in the PBL allocated
228 u64 pbl_ptr; /* Address to the first entry of the queue PBL */
549 u32 prod; /* CQ producer value on old PBL */
550 u32 cons; /* CQ consumer value on old PBL */
H A Decore_rdma_api.h236 u8 num_pbl_pages; /* Number of pages in the PBL allocated
239 u64 pbl_ptr; /* Address to the first entry of the queue PBL */
613 u32 prod; /* CQ producer value on old PBL */
614 u32 cons; /* CQ consumer value on old PBL */
H A Decore_hsi_fcoe.h198 __le16 num_pages_in_pbl /* Num of pages in SQ/RESPQ/XFERQ Pbl */;
213 __le16 sq_pbl_next_index /* Next index of SQ Pbl */;
214 __le16 respq_pbl_next_index /* Next index of RESPQ Pbl */;
230 __le16 xferq_pbl_next_index /* Next index of XFERQ Pbl */;
481 struct regpair respq_pbl_addr /* RespQ Pbl base address */;
482 __le16 num_pages_in_pbl /* Number of RespQ pbl pages (both have same wqe size) */;
742 __le16 num_pages_in_pbl /* Number of XferQ/RespQ pbl pages (both have same wqe size) */;
749 struct regpair xferq_pbl_addr /* XferQ Pbl base address */;
H A Drdma_common.h87 …lid completion written by FW. FW toggle this bit each time it finishes producing all PBL entries */
112 …lid completion written by FW. FW toggle this bit each time it finishes producing all PBL entries */
127 …lid completion written by FW. FW toggle this bit each time it finishes producing all PBL entries */
527 struct regpair pbl_addr /* Address of PBL */;
611 struct regpair pbl_addr /* Address of PBL */;
/freebsd/sys/dev/cxgbe/iw_cxgbe/
H A Dresource.c251 /* PBL Memory Manager. */
253 #define MIN_PBL_SHIFT 5 /* 32B == min PBL size (4 entries) */
265 rdev->stats.pbl.cur += roundup(size, 1 << MIN_PBL_SHIFT); in c4iw_pblpool_alloc()
266 if (rdev->stats.pbl.cur > rdev->stats.pbl.max) in c4iw_pblpool_alloc()
267 rdev->stats.pbl.max = rdev->stats.pbl.cur; in c4iw_pblpool_alloc()
269 rdev->stats.pbl.fail++; in c4iw_pblpool_alloc()
278 rdev->stats.pbl.cur -= roundup(size, 1 << MIN_PBL_SHIFT); in c4iw_pblpool_free()
286 rdev->adap->vres.pbl.start, in c4iw_pblpool_create()
287 rdev->adap->vres.pbl.size, in c4iw_pblpool_create()
H A Ddevice.c131 rdev->stats.pbl.total = sc->vres.pbl.size; in c4iw_rdev_open()
142 device_printf(sc->dev, "error %d initializing pbl pool\n", rc); in c4iw_rdev_open()
/freebsd/sys/dev/qlnx/qlnxr/
H A Dqlnxr_verbs.c213 struct ecore_chain *pbl; in qlnxr_create_srq() local
217 pbl = &hw_srq->pbl; in qlnxr_create_srq()
219 page_cnt = ecore_chain_get_page_cnt(pbl); in qlnxr_create_srq()
220 pbl_base_addr = ecore_chain_get_pbl_phys(pbl); in qlnxr_create_srq()
222 page_size = pbl->elem_per_page << 4; in qlnxr_create_srq()
390 struct ecore_chain *pbl; in qlnxr_post_srq_recv() local
403 pbl = &srq->hw_srq.pbl; in qlnxr_post_srq_recv()
419 hdr = ecore_chain_produce(pbl); in qlnxr_post_srq_recv()
424 /* PBL is maintained in case of WR granularity. in qlnxr_post_srq_recv()
436 ecore_chain_produce(pbl); in qlnxr_post_srq_recv()
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H A Dqlnxr_def.h142 * An S/RQ PBL contains a list a pointers to pages. Each page contains S/RQE
144 * is different between SQ and RQ. The size of the PBL was chosen such as not to
168 * Although FW supports two layer PBL we use single layer since it is more
232 struct ecore_chain pbl; member
521 struct ecore_chain pbl; member
553 struct ecore_chain pbl; member
576 ecore_chain_get_capacity(p_info->pbl) \
582 struct ecore_chain pbl; member
H A Dqlnxr_os.c312 sw_comp_cons = ecore_chain_get_cons_idx(&cnq->pbl); in qlnxr_intr()
320 cq_handle = (struct regpair *)ecore_chain_consume(&cnq->pbl); in qlnxr_intr()
346 sw_comp_cons = ecore_chain_get_cons_idx(&cnq->pbl); in qlnxr_intr()
455 ecore_chain_free(&dev->ha->cdev, &dev->cnq_array[i].pbl); in qlnxr_free_resources()
513 &dev->cnq_array[i].pbl, in qlnxr_alloc_resources()
769 page_cnt = ecore_chain_get_page_cnt(&dev->cnq_array[i].pbl); in qlnxr_init_hw()
772 p_phys_table = ecore_chain_get_pbl_phys(&dev->cnq_array[i].pbl); in qlnxr_init_hw()
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dstm32-dwmac.yaml174 snps,pbl = <2>;
191 snps,pbl = <8>;
207 snps,pbl = <8>;
H A Dsamsung-sxgbe.txt15 - samsung,pbl: Integer, Programmable Burst Length.
47 samsung,pbl = <0x08>
H A Dsnps,dwmac.yaml440 snps,pbl:
449 value rather than snps,pbl.
456 value rather than snps,pbl.
460 snps,no-pbl-x8:
463 Don\'t multiply the pbl/txpbl/rxpbl values by 8. For core
H A Dsti-dwmac.txt50 snps,pbl = <32>;
/freebsd/sys/dev/dwc/
H A Dif_dwc.c499 uint32_t pbl; in dwc_attach() local
522 if (OF_getencprop(sc->node, "snps,pbl", &pbl, sizeof(uint32_t)) <= 0) in dwc_attach()
523 pbl = DMA_DEFAULT_PBL; in dwc_attach()
525 sc->txpbl = pbl; in dwc_attach()
527 sc->rxpbl = pbl; in dwc_attach()
528 if (OF_hasprop(sc->node, "snps,no-pbl-x8") == 1) in dwc_attach()
/freebsd/sys/dev/cxgb/common/
H A Dcxgb_ctl_defs.h118 unsigned int pbl_base; /* PBL base address */
119 unsigned int pbl_top; /* PBL last entry address */
/freebsd/sys/dev/irdma/
H A Dfbsd_kcompat.h103 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo, in irdma_next_pbl_addr() argument
108 return ++pbl; in irdma_next_pbl_addr()
256 void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
H A Dirdma_verbs.c244 * irdma_get_pbl - Retrieve pbl from a list given a virtual
247 * @pbl_list: pbl list to search in (QP's or CQ's)
410 "no pbl info\n"); in irdma_setup_umode_qp()
1660 * @arr: lvl1 pbl array
1680 * @palloc: pbl allocation struct
1728 u64 *pbl; in irdma_setup_pbles() local
1742 pbl = pinfo->addr; in irdma_setup_pbles()
1744 pbl = iwmr->pgaddrmem; in irdma_setup_pbles()
1747 irdma_copy_user_pgaddrs(iwmr, pbl, level); in irdma_setup_pbles()
1750 iwmr->pgaddrmem[0] = *pbl; in irdma_setup_pbles()
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/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h18985 * store PBL.
19145 /* TQM ring PBL indirect levels. */
19148 /* PBL pointer is physical start address. */
19150 /* PBL pointer points to PTE table. */
19153 * PBL pointer points to PDE table with each entry pointing to
19343 /* QPC PBL indirect levels. */
19346 /* PBL pointer is physical start address. */
19348 /* PBL pointer points to PTE table. */
19351 * PBL pointer points to PDE table with each entry pointing to PTE
19374 /* SRQ PBL indirect levels. */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/st/
H A Dstm32mp253.dtsi68 snps,pbl = <2>;

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