xref: /freebsd/sys/dev/cxgb/common/cxgb_ctl_defs.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1d1b41c9bSKip Macy /*
2ac3a6d9cSKip Macy  * Copyright (C) 2003-2006 Chelsio Communications.  All rights reserved.
3d1b41c9bSKip Macy  *
4d1b41c9bSKip Macy  * This program is distributed in the hope that it will be useful, but WITHOUT
5d1b41c9bSKip Macy  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6d1b41c9bSKip Macy  * FITNESS FOR A PARTICULAR PURPOSE.  See the LICENSE file included in this
7d1b41c9bSKip Macy  * release for licensing terms and conditions.
8d1b41c9bSKip Macy  */
9d1b41c9bSKip Macy 
10d1b41c9bSKip Macy #ifndef _CXGB3_OFFLOAD_CTL_DEFS_H
11d1b41c9bSKip Macy #define _CXGB3_OFFLOAD_CTL_DEFS_H
12d1b41c9bSKip Macy 
13d1b41c9bSKip Macy enum {
14d1b41c9bSKip Macy 	GET_MAX_OUTSTANDING_WR,
15d1b41c9bSKip Macy 	GET_TX_MAX_CHUNK,
16d1b41c9bSKip Macy 	GET_TID_RANGE,
17d1b41c9bSKip Macy 	GET_STID_RANGE,
18d1b41c9bSKip Macy 	GET_RTBL_RANGE,
19d1b41c9bSKip Macy 	GET_L2T_CAPACITY,
20d1b41c9bSKip Macy 	GET_MTUS,
21d1b41c9bSKip Macy 	GET_WR_LEN,
22d1b41c9bSKip Macy 	GET_IFF_FROM_MAC,
23d1b41c9bSKip Macy 	GET_DDP_PARAMS,
24d1b41c9bSKip Macy 	GET_PORTS,
25d1b41c9bSKip Macy 
26d1b41c9bSKip Macy 	ULP_ISCSI_GET_PARAMS,
27d1b41c9bSKip Macy 	ULP_ISCSI_SET_PARAMS,
28d1b41c9bSKip Macy 
29d1b41c9bSKip Macy 	RDMA_GET_PARAMS,
30d1b41c9bSKip Macy 	RDMA_CQ_OP,
31d1b41c9bSKip Macy 	RDMA_CQ_SETUP,
32d1b41c9bSKip Macy 	RDMA_CQ_DISABLE,
33d1b41c9bSKip Macy 	RDMA_CTRL_QP_SETUP,
34d1b41c9bSKip Macy 	RDMA_GET_MEM,
35ac3a6d9cSKip Macy 
365c5df3daSKip Macy 	FAILOVER           = 30,
375c5df3daSKip Macy 	FAILOVER_DONE      = 31,
385c5df3daSKip Macy 	FAILOVER_CLEAR     = 32,
39ac3a6d9cSKip Macy 
405c5df3daSKip Macy 	GET_CPUIDX_OF_QSET = 40,
41ac3a6d9cSKip Macy 
425c5df3daSKip Macy 	GET_RX_PAGE_INFO   = 50,
43d1b41c9bSKip Macy };
44d1b41c9bSKip Macy 
45d1b41c9bSKip Macy /*
46d1b41c9bSKip Macy  * Structure used to describe a TID range.  Valid TIDs are [base, base+num).
47d1b41c9bSKip Macy  */
48d1b41c9bSKip Macy struct tid_range {
49d1b41c9bSKip Macy 	unsigned int base;   /* first TID */
50d1b41c9bSKip Macy 	unsigned int num;    /* number of TIDs in range */
51d1b41c9bSKip Macy };
52d1b41c9bSKip Macy 
53d1b41c9bSKip Macy /*
54d1b41c9bSKip Macy  * Structure used to request the size and contents of the MTU table.
55d1b41c9bSKip Macy  */
56d1b41c9bSKip Macy struct mtutab {
57d1b41c9bSKip Macy 	unsigned int size;          /* # of entries in the MTU table */
58d1b41c9bSKip Macy 	const unsigned short *mtus; /* the MTU table values */
59d1b41c9bSKip Macy };
60d1b41c9bSKip Macy 
61d1b41c9bSKip Macy /*
6209fe6320SNavdeep Parhar  * Structure used to request the ifnet that owns a given MAC address.
63d1b41c9bSKip Macy  */
64d1b41c9bSKip Macy struct iff_mac {
65*954712e8SJustin Hibbits 	if_t dev;
6609fe6320SNavdeep Parhar 	const unsigned char *mac_addr;
67d1b41c9bSKip Macy 	u16 vlan_tag;
68d1b41c9bSKip Macy };
69d1b41c9bSKip Macy 
70d1b41c9bSKip Macy struct pci_dev;
71d1b41c9bSKip Macy 
72d1b41c9bSKip Macy /*
73d1b41c9bSKip Macy  * Structure used to request the TCP DDP parameters.
74d1b41c9bSKip Macy  */
75d1b41c9bSKip Macy struct ddp_params {
76d1b41c9bSKip Macy 	unsigned int llimit;     /* TDDP region start address */
77d1b41c9bSKip Macy 	unsigned int ulimit;     /* TDDP region end address */
78d1b41c9bSKip Macy 	unsigned int tag_mask;   /* TDDP tag mask */
79d1b41c9bSKip Macy 	struct pci_dev *pdev;
80d1b41c9bSKip Macy };
81d1b41c9bSKip Macy 
82d1b41c9bSKip Macy struct adap_ports {
83d1b41c9bSKip Macy 	unsigned int nports;     /* number of ports on this adapter */
84*954712e8SJustin Hibbits 	if_t devs[MAX_NPORTS];
85d1b41c9bSKip Macy };
86d1b41c9bSKip Macy 
87d1b41c9bSKip Macy /*
88d1b41c9bSKip Macy  * Structure used to return information to the iscsi layer.
89d1b41c9bSKip Macy  */
90d1b41c9bSKip Macy struct ulp_iscsi_info {
91d1b41c9bSKip Macy 	unsigned int	offset;
92d1b41c9bSKip Macy 	unsigned int	llimit;
93d1b41c9bSKip Macy 	unsigned int	ulimit;
94d1b41c9bSKip Macy 	unsigned int	tagmask;
95d1b41c9bSKip Macy 	unsigned int	pgsz3;
96d1b41c9bSKip Macy 	unsigned int	pgsz2;
97d1b41c9bSKip Macy 	unsigned int	pgsz1;
98d1b41c9bSKip Macy 	unsigned int	pgsz0;
99d1b41c9bSKip Macy 	unsigned int	max_rxsz;
100d1b41c9bSKip Macy 	unsigned int	max_txsz;
101d1b41c9bSKip Macy 	struct pci_dev	*pdev;
102d1b41c9bSKip Macy };
103d1b41c9bSKip Macy 
104d1b41c9bSKip Macy /*
105ac3a6d9cSKip Macy  * Offload TX/RX page information.
106ac3a6d9cSKip Macy  */
107ac3a6d9cSKip Macy struct ofld_page_info {
108ac3a6d9cSKip Macy 	unsigned int page_size;  /* Page size, should be a power of 2 */
109ac3a6d9cSKip Macy 	unsigned int num;        /* Number of pages */
110ac3a6d9cSKip Macy };
111ac3a6d9cSKip Macy 
112ac3a6d9cSKip Macy /*
113d1b41c9bSKip Macy  * Structure used to return information to the RDMA layer.
114d1b41c9bSKip Macy  */
115d1b41c9bSKip Macy struct rdma_info {
116d1b41c9bSKip Macy 	unsigned int tpt_base;   /* TPT base address */
117d1b41c9bSKip Macy 	unsigned int tpt_top;	 /* TPT last entry address */
118d1b41c9bSKip Macy 	unsigned int pbl_base;   /* PBL base address */
119d1b41c9bSKip Macy 	unsigned int pbl_top;	 /* PBL last entry address */
120d1b41c9bSKip Macy 	unsigned int rqt_base;   /* RQT base address */
121d1b41c9bSKip Macy 	unsigned int rqt_top;	 /* RQT last entry address */
122d1b41c9bSKip Macy 	unsigned int udbell_len; /* user doorbell region length */
123d1b41c9bSKip Macy 	unsigned long udbell_physbase;  /* user doorbell physical start addr */
1248e10660fSKip Macy 	void *kdb_addr;  /* kernel doorbell register address */
1259771af49SMark Johnston 	device_t pdev;   /* associated PCI device */
126d1b41c9bSKip Macy };
127d1b41c9bSKip Macy 
128d1b41c9bSKip Macy /*
129d1b41c9bSKip Macy  * Structure used to request an operation on an RDMA completion queue.
130d1b41c9bSKip Macy  */
131d1b41c9bSKip Macy struct rdma_cq_op {
132d1b41c9bSKip Macy 	unsigned int id;
133d1b41c9bSKip Macy 	unsigned int op;
134d1b41c9bSKip Macy 	unsigned int credits;
135d1b41c9bSKip Macy };
136d1b41c9bSKip Macy 
137d1b41c9bSKip Macy /*
138d1b41c9bSKip Macy  * Structure used to setup RDMA completion queues.
139d1b41c9bSKip Macy  */
140d1b41c9bSKip Macy struct rdma_cq_setup {
141d1b41c9bSKip Macy 	unsigned int id;
142d1b41c9bSKip Macy 	unsigned long long base_addr;
143d1b41c9bSKip Macy 	unsigned int size;
144d1b41c9bSKip Macy 	unsigned int credits;
145d1b41c9bSKip Macy 	unsigned int credit_thres;
146d1b41c9bSKip Macy 	unsigned int ovfl_mode;
147d1b41c9bSKip Macy };
148d1b41c9bSKip Macy 
149d1b41c9bSKip Macy /*
150d1b41c9bSKip Macy  * Structure used to setup the RDMA control egress context.
151d1b41c9bSKip Macy  */
152d1b41c9bSKip Macy struct rdma_ctrlqp_setup {
153d1b41c9bSKip Macy 	unsigned long long base_addr;
154d1b41c9bSKip Macy 	unsigned int size;
155d1b41c9bSKip Macy };
156d1b41c9bSKip Macy #endif /* _CXGB3_OFFLOAD_CTL_DEFS_H */
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