1c66ec88fSEmmanuel VadotSTMicroelectronics SoC DWMAC glue layer controller 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotThis file documents differences between the core properties in 4c66ec88fSEmmanuel VadotDocumentation/devicetree/bindings/net/stmmac.txt 5c66ec88fSEmmanuel Vadotand what is needed on STi platforms to program the stmmac glue logic. 6c66ec88fSEmmanuel Vadot 7c66ec88fSEmmanuel VadotThe device node has following properties. 8c66ec88fSEmmanuel Vadot 9c66ec88fSEmmanuel VadotRequired properties: 10fac71e4eSEmmanuel Vadot - compatible : "st,stih407-dwmac" 11c66ec88fSEmmanuel Vadot - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which 12c66ec88fSEmmanuel Vadot encompases the glue register, and the offset of the control register. 13c66ec88fSEmmanuel Vadot - st,gmac_en: this is to enable the gmac into a dedicated sysctl control 14c66ec88fSEmmanuel Vadot register available on STiH407 SoC. 15c66ec88fSEmmanuel Vadot - pinctrl-0: pin-control for all the MII mode supported. 16c66ec88fSEmmanuel Vadot 17c66ec88fSEmmanuel VadotOptional properties: 18c66ec88fSEmmanuel Vadot - resets : phandle pointing to the system reset controller with correct 19c66ec88fSEmmanuel Vadot reset line index for ethernet reset. 20c66ec88fSEmmanuel Vadot - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or 21c66ec88fSEmmanuel Vadot MAC can generate it. 22c66ec88fSEmmanuel Vadot - st,tx-retime-src: This specifies which clk is wired up to the mac for 23c66ec88fSEmmanuel Vadot retimeing tx lines. This is totally board dependent and can take one of the 24*aa1a8ff2SEmmanuel Vadot possible values from "txclk", "clk_125" or "clkgen". 25c66ec88fSEmmanuel Vadot If not passed, the internal clock will be used by default. 26c66ec88fSEmmanuel Vadot - sti-ethclk: this is the phy clock. 27c66ec88fSEmmanuel Vadot - sti-clkconf: this is an extra sysconfig register, available in new SoCs, 28c66ec88fSEmmanuel Vadot to program the clk retiming. 29c66ec88fSEmmanuel Vadot - st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g. 30c66ec88fSEmmanuel Vadot STiH407. 31c66ec88fSEmmanuel Vadot 32c66ec88fSEmmanuel VadotExample: 33c66ec88fSEmmanuel Vadot 34c66ec88fSEmmanuel Vadotethernet0: dwmac@9630000 { 35c66ec88fSEmmanuel Vadot device_type = "network"; 36c66ec88fSEmmanuel Vadot compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710"; 37c66ec88fSEmmanuel Vadot reg = <0x9630000 0x8000>; 38c66ec88fSEmmanuel Vadot reg-names = "stmmaceth"; 39c66ec88fSEmmanuel Vadot 40c66ec88fSEmmanuel Vadot st,syscon = <&syscfg_sbc_reg 0x80>; 41c66ec88fSEmmanuel Vadot st,gmac_en; 42c66ec88fSEmmanuel Vadot resets = <&softreset STIH407_ETH1_SOFTRESET>; 43c66ec88fSEmmanuel Vadot reset-names = "stmmaceth"; 44c66ec88fSEmmanuel Vadot 45c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>, 46c66ec88fSEmmanuel Vadot <GIC_SPI 99 IRQ_TYPE_NONE>, 47c66ec88fSEmmanuel Vadot <GIC_SPI 100 IRQ_TYPE_NONE>; 48c66ec88fSEmmanuel Vadot interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; 49c66ec88fSEmmanuel Vadot 50c66ec88fSEmmanuel Vadot snps,pbl = <32>; 51c66ec88fSEmmanuel Vadot snps,mixed-burst; 52c66ec88fSEmmanuel Vadot 53c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 54c66ec88fSEmmanuel Vadot pinctrl-0 = <&pinctrl_rgmii1>; 55c66ec88fSEmmanuel Vadot 56c66ec88fSEmmanuel Vadot clock-names = "stmmaceth", "sti-ethclk"; 57c66ec88fSEmmanuel Vadot clocks = <&CLK_S_C0_FLEXGEN CLK_EXT2F_A9>, 58c66ec88fSEmmanuel Vadot <&CLK_S_C0_FLEXGEN CLK_ETH_PHY>; 59c66ec88fSEmmanuel Vadot}; 60