Home
last modified time | relevance | path

Searched +full:osc +full:- +full:bypass (Results 1 – 25 of 38) sorted by relevance

12

/linux/drivers/clk/at91/
H A Dclk-main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/clk-provider.h>
73 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_prepare() local
74 struct regmap *regmap = osc->regmap; in clk_main_osc_prepare()
96 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_unprepare() local
97 struct regmap *regmap = osc->regmap; in clk_main_osc_unprepare()
113 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_is_prepared() local
114 struct regmap *regmap = osc->regmap; in clk_main_osc_is_prepared()
128 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_save_context() local
130 osc->pms.status = clk_main_osc_is_prepared(hw); in clk_main_osc_save_context()
[all …]
H A Dat91rm9200.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
86 bool bypass; in at91rm9200_pmc_setup() local
88 i = of_property_match_string(np, "clock-names", "slow_xtal"); in at91rm9200_pmc_setup()
94 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91rm9200_pmc_setup()
109 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91rm9200_pmc_setup()
112 bypass); in at91rm9200_pmc_setup()
120 at91rm9200_pmc->chws[PMC_MAIN] = hw; in at91rm9200_pmc_setup()
128 at91rm9200_pmc->chws[PMC_PLLACK] = hw; in at91rm9200_pmc_setup()
[all …]
H A Dat91sam9g45.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
101 bool bypass; in at91sam9g45_pmc_setup() local
103 i = of_property_match_string(np, "clock-names", "slow_clk"); in at91sam9g45_pmc_setup()
109 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91sam9g45_pmc_setup()
124 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9g45_pmc_setup()
127 bypass); in at91sam9g45_pmc_setup()
135 at91sam9g45_pmc->chws[PMC_MAIN] = hw; in at91sam9g45_pmc_setup()
146 at91sam9g45_pmc->chws[PMC_PLLACK] = hw; in at91sam9g45_pmc_setup()
[all …]
H A Dat91sam9n12.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
121 bool bypass; in at91sam9n12_pmc_setup() local
123 i = of_property_match_string(np, "clock-names", "slow_clk"); in at91sam9n12_pmc_setup()
129 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91sam9n12_pmc_setup()
148 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9n12_pmc_setup()
151 bypass); in at91sam9n12_pmc_setup()
161 at91sam9n12_pmc->chws[PMC_MAIN] = hw; in at91sam9n12_pmc_setup()
172 at91sam9n12_pmc->chws[PMC_PLLACK] = hw; in at91sam9n12_pmc_setup()
[all …]
H A Ddt-compat.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
33 const char *name = np->name; in of_sama5d2_clk_audio_pll_frac_setup()
53 "atmel,sama5d2-clk-audio-pll-frac",
59 const char *name = np->name; in of_sama5d2_clk_audio_pll_pad_setup()
79 "atmel,sama5d2-clk-audio-pll-pad",
85 const char *name = np->name; in of_sama5d2_clk_audio_pll_pmc_setup()
105 "atmel,sama5d2-clk-audio-pll-pmc",
161 if (of_property_read_string(np, "clock-output-names", &name)) in of_sama5d2_clk_generated_setup()
162 name = gcknp->name; in of_sama5d2_clk_generated_setup()
[all …]
H A Dat91sam9x5.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
143 bool bypass; in at91sam9x5_pmc_setup() local
145 i = of_property_match_string(np, "clock-names", "slow_clk"); in at91sam9x5_pmc_setup()
151 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91sam9x5_pmc_setup()
170 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9x5_pmc_setup()
173 bypass); in at91sam9x5_pmc_setup()
183 at91sam9x5_pmc->chws[PMC_MAIN] = hw; in at91sam9x5_pmc_setup()
194 at91sam9x5_pmc->chws[PMC_PLLACK] = hw; in at91sam9x5_pmc_setup()
[all …]
H A Dsama5d4.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
138 bool bypass; in sama5d4_pmc_setup() local
140 i = of_property_match_string(np, "clock-names", "slow_clk"); in sama5d4_pmc_setup()
146 i = of_property_match_string(np, "clock-names", "main_xtal"); in sama5d4_pmc_setup()
166 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in sama5d4_pmc_setup()
169 bypass); in sama5d4_pmc_setup()
188 sama5d4_pmc->chws[PMC_PLLACK] = hw; in sama5d4_pmc_setup()
194 sama5d4_pmc->chws[PMC_UTMI] = hw; in sama5d4_pmc_setup()
[all …]
H A Dsama5d3.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
123 bool bypass; in sama5d3_pmc_setup() local
125 i = of_property_match_string(np, "clock-names", "slow_clk"); in sama5d3_pmc_setup()
131 i = of_property_match_string(np, "clock-names", "main_xtal"); in sama5d3_pmc_setup()
151 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in sama5d3_pmc_setup()
154 bypass); in sama5d3_pmc_setup()
173 sama5d3_pmc->chws[PMC_PLLACK] = hw; in sama5d3_pmc_setup()
179 sama5d3_pmc->chws[PMC_UTMI] = hw; in sama5d3_pmc_setup()
[all …]
H A Dat91sam9260.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
340 bool bypass; in at91sam926x_pmc_setup() local
342 i = of_property_match_string(np, "clock-names", "slow_xtal"); in at91sam926x_pmc_setup()
348 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91sam926x_pmc_setup()
358 ndck(data->sck, data->num_sck), in at91sam926x_pmc_setup()
359 ndck(data->pck, data->num_pck), in at91sam926x_pmc_setup()
360 0, data->num_progck); in at91sam926x_pmc_setup()
364 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam926x_pmc_setup()
[all …]
H A Dsama5d2.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
174 bool bypass; in sama5d2_pmc_setup() local
176 i = of_property_match_string(np, "clock-names", "slow_clk"); in sama5d2_pmc_setup()
182 i = of_property_match_string(np, "clock-names", "main_xtal"); in sama5d2_pmc_setup()
203 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in sama5d2_pmc_setup()
206 bypass); in sama5d2_pmc_setup()
216 sama5d2_pmc->chws[PMC_MAIN] = hw; in sama5d2_pmc_setup()
227 sama5d2_pmc->chws[PMC_PLLACK] = hw; in sama5d2_pmc_setup()
[all …]
/linux/drivers/clk/imx/
H A Dclk-imx6q.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
12 #include <linux/clk-provider.h>
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 #include <dt-bindings/clock/imx6qdl-clock.h>
24 static const char *step_sels[] = { "osc", "pll2_pfd2_396m", };
27 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
60 static const char *uart_sels[] = { "pll3_80m", "osc", };
61 static const char *ipg_per_sels[] = { "ipg", "osc", };
62 static const char *ecspi_sels[] = { "pll3_60m", "osc", };
[all …]
H A Dclk-imxrt1050.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
12 #include <dt-bindings/clock/imxrt1050-clock.h>
16 static const char * const pll_ref_sels[] = {"osc", "dummy", };
17 static const char * const per_sels[] = {"ipg_pdof", "osc", };
26 static const char *const lpuart_sels[] = { "pll3_80m", "osc", };
40 struct device *dev = &pdev->dev; in imxrt1050_clocks_probe()
41 struct device_node *np = dev->of_node; in imxrt1050_clocks_probe()
48 return -ENOMEM; in imxrt1050_clocks_probe()
50 clk_hw_data->num = IMXRT1050_CLK_END; in imxrt1050_clocks_probe()
51 hws = clk_hw_data->hws; in imxrt1050_clocks_probe()
[all …]
H A Dclk-imx6sl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
14 #include <dt-bindings/clock/imx6sl-clock.h>
34 static const char *step_sels[] = { "osc", "pll2_pfd2", };
39 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
43 static const char *csi_sels[] = { "osc", "pll2_pfd2", "pll3_120m", "pll3_pfd1", };
47 static const char *perclk_sels[] = { "ipg", "osc", };
55 static const char *ecspi_sels[] = { "pll3_60m", "osc", };
56 static const char *uart_sels[] = { "pll3_80m", "osc", };
60 "pll3_pfd2", "pll3_pfd3", "osc", "dummy", "dummy", "dummy", "dummy", "dummy",
[all …]
H A Dclk-imx6sll.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2017-2018 NXP.
7 #include <dt-bindings/clock/imx6sll-clock.h>
10 #include <linux/clk-provider.h>
22 static const char *pll_bypass_src_sels[] = { "osc", "dummy", };
30 static const char *step_sels[] = { "osc", "pll2_pfd2_396m", };
36 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", };
37 static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "osc", };
48 static const char *ecspi_sels[] = { "pll3_60m", "osc", };
49 static const char *uart_sels[] = { "pll3_80m", "osc", };
[all …]
H A Dclk-imx6ul.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/clock/imx6ul-clock.h>
9 #include <linux/clk-provider.h>
13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
21 static const char *pll_bypass_src_sels[] = { "osc", "dummy", };
30 static const char *step_sels[] = { "osc", "ca7_secondary_sel", };
36 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "pll2_bypass_src", };
37 static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "osc", };
53 static const char *can_sels[] = { "pll3_60m", "osc", "pll3_80m", "dummy", };
54 static const char *ecspi_sels[] = { "pll3_60m", "osc", };
[all …]
H A Dclk-imx6sx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/clock/imx6sx-clock.h>
10 #include <linux/clk-provider.h>
21 static const char *step_sels[] = { "osc", "pll2_pfd2_396m", };
25 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", };
26 static const char *periph2_clk2_sels[] = { "pll3_usb_otg", "osc", };
40 static const char *perclk_sels[] = { "ipg", "osc", };
43 static const char *can_sels[] = { "pll3_60m", "osc", "pll3_80m", "dummy", };
44 static const char *uart_sels[] = { "pll3_80m", "osc", };
48 static const char *m4_pre_sels[] = { "pll2_bus", "pll3_usb_otg", "osc", "pll2_pfd0_352m", "pll2_pfd…
[all …]
/linux/include/linux/iio/frequency/
H A Dad9523.h1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct ad9523_channel_spec - Output channel configuration
42 * @sync_ignore_en: Ignore chip-level SYNC signal.
49 * @channel_divider: 10-bit channel divider.
106 * struct ad9523_platform_data - platform specific information
109 * @refa_diff_rcv_en: REFA differential/single-ended input selection.
110 * @refb_diff_rcv_en: REFB differential/single-ended input selection.
111 * @zd_in_diff_en: Zero Delay differential/single-ended input selection.
112 * @osc_in_diff_en: OSC differential/ single-ended input selection.
113 * @refa_cmos_neg_inp_en: REFA single-ended neg./pos. input enable.
[all …]
/linux/drivers/regulator/
H A Danatop-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
20 #define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
30 bool bypass; member
43 if (anatop_reg->delay_bit_width && new_sel > old_sel) { in anatop_regmap_set_voltage_time_sel()
50 regmap_read(reg->regmap, anatop_reg->delay_reg, &val); in anatop_regmap_set_voltage_time_sel()
51 val = (val >> anatop_reg->delay_bit_shift) & in anatop_regmap_set_voltage_time_sel()
52 ((1 << anatop_reg->delay_bit_width) - 1); in anatop_regmap_set_voltage_time_sel()
53 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << in anatop_regmap_set_voltage_time_sel()
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel()
[all …]
/linux/sound/soc/codecs/
H A Dwm8731.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8731.c -- WM8731 ALSA SoC Audio driver
6 * Copyright 2006-12 Wolfson Microelectronics, plc
76 if (wm8731->deemph) { in wm8731_set_deemph()
79 if (abs(wm8731_deemph[i] - wm8731->playback_fs) < in wm8731_set_deemph()
80 abs(wm8731_deemph[best] - wm8731->playback_fs)) in wm8731_set_deemph()
90 dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n", in wm8731_set_deemph()
102 ucontrol->value.integer.value[0] = wm8731->deemph; in wm8731_get_deemph()
112 unsigned int deemph = ucontrol->value.integer.value[0]; in wm8731_put_deemph()
116 return -EINVAL; in wm8731_put_deemph()
[all …]
H A Dtlv320aic23.c1 // SPDX-License-Identifier: GPL-2.0-only
73 static const DECLARE_TLV_DB_SCALE(out_gain_tlv, -12100, 100, 0);
74 static const DECLARE_TLV_DB_SCALE(input_gain_tlv, -1725, 75, 0);
75 static const DECLARE_TLV_DB_SCALE(sidetone_vol_tlv, -1800, 300, 0);
83 val = (ucontrol->value.integer.value[0] & 0x07); in snd_soc_tlv320aic23_put_volsw()
86 * 000 = -6db in snd_soc_tlv320aic23_put_volsw()
87 * 001 = -9db in snd_soc_tlv320aic23_put_volsw()
88 * 010 = -12db in snd_soc_tlv320aic23_put_volsw()
89 * 011 = -18db (Min) in snd_soc_tlv320aic23_put_volsw()
92 val = (val >= 4) ? 4 : (3 - val); in snd_soc_tlv320aic23_put_volsw()
[all …]
/linux/drivers/mfd/
H A Dtwl-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
6 * Copyright (C) 2005-2006 Texas Instruments, Inc.
39 #include <linux/mfd/twl4030-audio.h>
41 #include "twl-core.h"
44 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
62 /* subchip/slave 0 - USB ID */
65 /* subchip/slave 1 - AUD ID */
72 /* subchip/slave 2 - AUX ID */
85 /* subchip/slave 3 - POWER ID */
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-wb50n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-wb50n.dtsi - Device Tree include file for wb50n cpu module
12 model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
17 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
42 clock-frequency = <12000000>;
46 atmel,osc-bypass;
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
52 cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>;
[all …]
H A Dat91-sama5d27_wlsom1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
11 #include "sama5d2-pinfunc.h"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/pinctrl/at91.h>
18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
26 clock-frequency = <32768>;
30 clock-frequency = <24000000>;
34 reg_5v: regulator-5v {
[all …]
/linux/drivers/clk/mediatek/
H A Dclk-mt8183.c1 // SPDX-License-Identifier: GPL-2.0
12 #include "clk-gate.h"
13 #include "clk-mtk.h"
14 #include "clk-mux.h"
16 #include <dt-bindings/clock/mt8183-clk.h>
22 FIXED_CLK(CLK_TOP_ULPOSC, "osc", NULL, 250000),
99 FACTOR(CLK_TOP_AD_OSC_CK, "ad_osc_ck", "osc", 1, 1),
100 FACTOR(CLK_TOP_OSC_D2, "osc_d2", "osc", 1, 2),
101 FACTOR(CLK_TOP_OSC_D4, "osc_d4", "osc", 1, 4),
102 FACTOR(CLK_TOP_OSC_D8, "osc_d8", "osc", 1, 8),
[all …]
/linux/arch/powerpc/platforms/512x/
H A Dclock-commonclk.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/mpc512x-clock.h>
89 * interpretation, no CFM, different fourth PSC/CAN mux0 input -- yet
292 val &= (1 << len) - 1; in get_bit_field()
305 spmf = get_bit_field(&clkregs->spmr, 24, 4); in get_spmf_mult()
326 divcode = get_bit_field(&clkregs->scfr2, 26, 6); in get_sys_div_x2()
343 /* 0b000 is "bypass" */ in get_cpmf_mult_x2()
350 cpmf = get_bit_field(&clkregs->spmr, 16, 4); in get_cpmf_mult_x2()
389 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-immr"); in get_freq_from_dt()
[all …]

12