| /linux/Documentation/arch/openrisc/ |
| H A D | openrisc_port.rst | 2 OpenRISC Linux
5 This is a port of Linux to the OpenRISC class of microprocessors; the initial
6 target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
8 For information about OpenRISC processors and ongoing development:
11 website https://openrisc.io
12 email linux-openrisc@vger.kernel.org
17 Build instructions for OpenRISC toolchain and Linux
20 In order to build and run Linux for OpenRISC, you'll need at least a basic
26 Toolchain binaries can be obtained from openrisc.io or our github releases page.
27 Instructions for building the different toolchains can be found on openrisc.io
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| /linux/Documentation/translations/zh_CN/arch/openrisc/ |
| H A D | openrisc_port.rst | 3 :Original: Documentation/arch/openrisc/openrisc_port.rst
12 OpenRISC Linux
16 OpenRISC 1000系列（或1k）。
21 网站 https://openrisc.io
22 邮箱 linux-openrisc@vger.kernel.org
30 为了构建和运行Linux for OpenRISC，你至少需要一个基本的工具链，或许
41 工具链 https://openrisc.io/software
49 make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig
50 make ARCH=openrisc CROSS_COMPILE="or1k-linux-"
55 OpenRISC SoC对De0 Nano开发板进行编程的一个例子。 在构建过程中，
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| H A D | todo.rst | 3 :Original: Documentation/arch/openrisc/todo.rst
15 OpenRISC Linux的移植已经完全投入使用，并且从 2.6.35 开始就一直在上游同步。
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| H A D | index.rst | 5 :Original: Documentation/arch/openrisc/index.rst
14 OpenRISC 体系架构
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| /linux/Documentation/translations/zh_TW/arch/openrisc/ |
| H A D | openrisc_port.rst | 3 :Original: Documentation/arch/openrisc/openrisc_port.rst
12 OpenRISC Linux
16 OpenRISC 1000系列（或1k）。
21 網站 https://openrisc.io
22 郵箱 linux-openrisc@vger.kernel.org
30 爲了構建和運行Linux for OpenRISC，你至少需要一個基本的工具鏈，或許
41 工具鏈 https://openrisc.io/software
49 make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig
50 make ARCH=openrisc CROSS_COMPILE="or1k-linux-"
55 OpenRISC SoC對De0 Nano開發板進行編程的一個例子。 在構建過程中，
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| H A D | todo.rst | 3 :Original: Documentation/arch/openrisc/todo.rst
15 OpenRISC Linux的移植已經完全投入使用，並且從 2.6.35 開始就一直在上游同步。
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| H A D | index.rst | 5 :Original: Documentation/arch/openrisc/index.rst
14 OpenRISC 體系架構
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| /linux/arch/openrisc/include/asm/ |
| H A D | io.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
22 * PCI: We do not use IO ports in OpenRISC
26 /* OpenRISC has no port IO */
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| H A D | tlb.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
19 * OpenRISC doesn't have an efficient flush_tlb_range() so use flush_tlb_mm()
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| H A D | mmu_context.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
33 extern volatile pgd_t *current_pgd[]; /* defined in arch/openrisc/mm/fault.c */
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| H A D | delay.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
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| H A D | thread_info.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
111 /* For OpenRISC, this is anything in the LSW other than syscall trace */
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| H A D | mmu.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
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| H A D | linkage.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
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| H A D | irq.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
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| H A D | irqflags.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
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| H A D | timex.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
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| H A D | cache.h | 3 * OpenRISC Linux
9 * OpenRISC implementation:
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| /linux/arch/openrisc/ |
| H A D | Kconfig | 7 config OPENRISC config
85 Generic OpenRISC 1200 architecture
95 caches at relevant times. Most OpenRISC implementations support write-
217 OpenRISC architecture makes it optional to have it implemented
220 Say N here if you know that your OpenRISC processor has
227 Say Y here if your OpenRISC processor features shadowed
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | openrisc,ompic.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/openrisc,ompic.yaml#
15 - const: openrisc,ompic
40 compatible = "openrisc,ompic";
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| /linux/Documentation/devicetree/bindings/openrisc/opencores/ |
| H A D | or1ksim.txt | 1 OpenRISC Generic SoC
4 Boards and FPGA SoC's which support the OpenRISC standard platform. The
5 platform essentially follows the conventions of the OpenRISC architecture
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| /linux/arch/openrisc/kernel/ |
| H A D | setup.c | 3 * OpenRISC setup.c
9 * Modifications for the OpenRISC architecture:
107 printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n", in print_cpuinfo()
260 printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n"); in setup_arch()
281 "OpenRISC 1000 (%d.%d-rev%d)\n", in show_cpuinfo()
290 seq_printf(m, "cpu\t\t\t: OpenRISC-%x\n", version); in show_cpuinfo()
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| H A D | vmlinux.lds.S | 3 * OpenRISC vmlinux.lds.S
9 * Modifications for the OpenRISC architecture:
13 * ld script for OpenRISC architecture
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| H A D | time.c | 3 * OpenRISC time.c
9 * Modifications for the OpenRISC architecture:
135 * Clocksource: Based on OpenRISC timer/counter
137 * This sets up the OpenRISC Tick Timer as a clock source. The tick timer
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| /linux/arch/openrisc/mm/ |
| H A D | cache.c | 3 * OpenRISC cache.c
9 * Modifications for the OpenRISC architecture:
89 * Since icaches do not snoop for updated data on OpenRISC, we in update_cache()
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