Searched full:onchip (Results 1 – 22 of 22) sorted by relevance
28 the MAC and PHY functions only, onchip TCP/IP is unused.41 the MAC and PHY functions only, onchip TCP/IP is unused.
10 - Most onchip peripherals are wired directly to an L1 input
18 - Most onchip peripherals are wired directly to an L1 input
13 The IDT821034 codec is a four channel PCM codec with onchip filters and
60 #define MAC_CTRL_PHY_PDOWN 0x00000004 /* Onchip EPHY Powerdown */61 #define MAC_CTRL_PHY_EDET 0x00000008 /* Onchip EPHY Energy Detected */62 #define MAC_CTRL_PHY_LEDCTRL 0x000000e0 /* Onchip EPHY LED Control */
7 * Driver for the PWRficient onchip rng
5 * Ethtool hooks for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5 * Driver for the PA6T-1682M onchip 1G/10G Ethernet MACs, soft state and
5 * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
78 * we are using the onchip r4k counter/compare register to serve this in plat_time_init()
122 * we are using the onchip r4k counter/compare register to serve this in plat_time_init()
8 * Driver for the PWRficient onchip NAND flash interface
3 * Intel OnChip System Fabric MailBox access support
8 * Driver for the PWRficient onchip memory controllers
90 tristate "Atmel AT91 onchip CAN controller"
4 * Definitions of consts/structs to drive the Freescale MPC52xx OnChip
761 * the routing registers, particularly for the onchip devices766 * bits [6:4] reserved (sometimes used for onchip devices)788 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:809 * Onchip routing for router rev-id 0x04 (try-and-error observation)
310 * The vendor code uses ESRAM (onchip RAM) and need to activate in mcde_probe()
1475 * dump is located in the upper 512KB of the onchip SRAM. Make sure in esas2r_reset_chip()
1158 * queue_base specified => using internal or onchip in knav_get_link_ram()
3764 /* [WB 53] Onchip address table */3766 /* [WB 53] Onchip address table - B0 */
603 #define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */