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/linux/Documentation/devicetree/bindings/soc/ti/
H A Dk3-ringacc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Santosh Shilimkar <ssantosh@kernel.org>
12 - Grygorii Strashko <grygorii.strashko@ti.com>
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
34 - const: ti,am654-navss-ringacc
39 - description: real time registers regions
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/linux/drivers/net/ethernet/cavium/liquidio/
H A Docteon_device.c7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
80 /* Num of desc for rx rings */
83 /* Num of desc for tx rings */
109 /* Num of desc for rx rings */
112 /* Num of desc for tx rings */
188 /* Num of desc for rx rings */
191 /* Num of desc for tx rings */
217 /* Num of desc for rx rings */
220 /* Num of desc for tx rings */
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H A Docteon_config.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
25 /*--------------------------CONFIG VALUES------------------------*/
121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq)
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs)
123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size)
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type)
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min)
126 #define CFG_GET_IQ_DB_TIMEOUT(cfg) ((cfg)->iq.db_timeout)
128 #define CFG_GET_IQ_INTR_PKT(cfg) ((cfg)->iq.iq_intr_pkt)
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H A Docteon_device.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
53 /** Endian-swap modes supported by Octeon. */
78 /*--------------- PCI BAR1 index registers -------------*/
123 /*---------------------------DISPATCH LIST-------------------------------*/
160 /*----------------------- THE OCTEON DEVICE ---------------------------*/
213 u32 num, char *pre, char *suf);
283 u32 num_gmx_ports; /** num gmx ports */
287 * See octeon-drv-opcodes.h for values.
368 /* Number of rings assigned to VF */
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/linux/net/9p/
H A Dtrans_xen.c1 // SPDX-License-Identifier: GPL-2.0-only
24 #define XEN_9PFS_RING_SIZE(ring) XEN_FLEX_RING_SIZE(ring->intf->ring_order)
57 struct xen_9pfs_dataring *rings; member
74 return -EINVAL; in p9_xen_create()
78 if (!strcmp(priv->tag, addr)) { in p9_xen_create()
79 priv->client = client; in p9_xen_create()
85 return -EINVAL; in p9_xen_create()
94 if (priv->client == client) { in p9_xen_close()
95 priv->client = NULL; in p9_xen_close()
107 cons = ring->intf->out_cons; in p9_xen_write_todo()
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/linux/drivers/mailbox/
H A Dbcm-flexrm-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * manager provides a set of rings which can be used to submit
13 * rings where each mailbox channel represents a separate FlexRM ring.
23 #include <linux/dma-mapping.h>
30 #include <linux/mailbox/brcm-message.h>
50 (!((addr) & ((0x1 << RING_BD_ALIGN_ORDER) - 1)))
66 /* Per-Ring register offsets */
258 int num; member
285 struct flexrm_ring *rings; member
316 return -EIO; in flexrm_cmpl_desc_to_error()
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H A Dbcm-pdc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
21 * rings. The tx_msg_start descriptor index indicates where the last message
41 #include <linux/mailbox/brcm-message.h>
43 #include <linux/dma-direction.h>
44 #include <linux/dma-mapping.h>
61 /* Rings are 8k aligned */
73 #define PREVTXD(i, max_mask) TXD((i) - 1, (max_mask))
75 #define PREVRXD(i, max_mask) RXD((i) - 1, (max_mask))
76 #define NTXDACTIVE(h, t, max_mask) TXD((t) - (h), (max_mask))
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/linux/drivers/net/ethernet/intel/idpf/
H A Didpf_controlq_setup.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * idpf_ctlq_alloc_desc_ring - Allocate Control Queue (CQ) rings
14 size_t size = cq->ring_size * sizeof(struct idpf_ctlq_desc); in idpf_ctlq_alloc_desc_ring()
16 cq->desc_ring.va = idpf_alloc_dma_mem(hw, &cq->desc_ring, size); in idpf_ctlq_alloc_desc_ring()
17 if (!cq->desc_ring.va) in idpf_ctlq_alloc_desc_ring()
18 return -ENOMEM; in idpf_ctlq_alloc_desc_ring()
24 * idpf_ctlq_alloc_bufs - Allocate Control Queue (CQ) buffers
37 if (cq->cq_type == IDPF_CTLQ_TYPE_MAILBOX_TX) in idpf_ctlq_alloc_bufs()
43 cq->bi.rx_buff = kcalloc(cq->ring_size, sizeof(struct idpf_dma_mem *), in idpf_ctlq_alloc_bufs()
45 if (!cq->bi.rx_buff) in idpf_ctlq_alloc_bufs()
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/linux/include/linux/
H A Dmhi_ep.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/dma-direction.h>
15 * struct mhi_ep_channel_config - Channel configuration structure for controller
17 * @num: The number assigned to this channel
23 u32 num; member
29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
43 * struct mhi_ep_db_info - MHI Endpoint doorbell info
53 * struct mhi_ep_buf_info - MHI Endpoint transfer buffer info
74 * struct mhi_ep_cntrl - MHI Endpoint controller structure
93 * @event_lock: Lock for protecting event rings
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H A Dmhi.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
10 #include <linux/dma-direction.h>
27 * enum mhi_callback - MHI callback
51 * enum mhi_flags - Transfer flags
63 * enum mhi_device_type - Device types
73 * enum mhi_ch_type - Channel types
89 * struct image_info - Firmware and RDDM table
102 * struct mhi_link_info - BW requirement
103 * target_link_speed - Link speed as defined by TLS bits in LinkControl reg
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/linux/drivers/soc/ti/
H A Dk3-ringacc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
8 #include <linux/dma-mapping.h>
14 #include <linux/dma/ti-cppi5.h>
15 #include <linux/soc/ti/k3-ringacc.h>
28 * struct k3_ring_rt_regs - The RA realtime Control/Status Registers region
57 * struct k3_ring_fifo_regs - The Ring Accelerator Queues Registers region
72 * struct k3_ringacc_proxy_gcfg_regs - RA Proxy Global Config MMIO Region
85 * struct k3_ringacc_proxy_target_regs - Proxy Datapath MMIO Region
100 #define K3_RINGACC_PROXY_NOT_USED (-1)
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/linux/include/xen/interface/io/
H A Dblkif.h1 /* SPDX-License-Identifier: MIT */
5 * Unified block-device I/O interface for Xen guest OSes.
7 * Copyright (c) 2003-2004, Keir Fraser
17 * Front->back notifications: When enqueuing a new request, sending a
19 * hold-off mechanism provided by the ring macros). Backends must set
22 * Back->front notifications: When enqueuing a new response, sending a
24 * hold-off mechanism provided by the ring macros). Frontends must set
32 * Multiple hardware queues/rings:
33 * If supported, the backend will write the key "multi-queue-max-queues" to
37 * key "multi-queue-num-queues" with the number they wish to use, which must be
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/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen4_tl.h1 /* SPDX-License-Identifier: GPL-2.0-only */
17 /* Num of buffers to store historic values. */
28 * struct adf_gen4_tl_slice_data_regs - HW slice data as populated by FW.
40 * struct adf_gen4_tl_device_data_regs - This structure stores device telemetry
43 * @reg_tl_gp_lat_acc: get-put latency accumulator
51 * @reg_tl_ae_put_cnt: Accelerator Engine put counts across all rings
99 * struct adf_gen4_tl_ring_pair_data_regs - This structure stores Ring Pair
101 * @reg_tl_gp_lat_acc: get-put latency accumulator
104 * @reg_tl_ae_put_cnt: Accelerator Engine put counts across all rings
132 * struct adf_gen4_tl_layout - This structure represents entire telemetry
H A Dadf_transport_debug.c1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2 /* Copyright(c) 2014 - 2020 Intel Corporation */
15 struct adf_etr_ring_data *ring = sfile->private; in adf_ring_start()
21 if (*pos >= (ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size) / in adf_ring_start()
22 ADF_MSG_SIZE_TO_BYTES(ring->msg_size))) in adf_ring_start()
25 return ring->base_addr + in adf_ring_start()
26 (ADF_MSG_SIZE_TO_BYTES(ring->msg_size) * (*pos)++); in adf_ring_start()
31 struct adf_etr_ring_data *ring = sfile->private; in adf_ring_next()
33 if (*pos >= (ADF_SIZE_TO_RING_SIZE_IN_BYTES(ring->ring_size) / in adf_ring_next()
34 ADF_MSG_SIZE_TO_BYTES(ring->msg_size))) in adf_ring_next()
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/linux/drivers/scsi/lpfc/
H A Dlpfc_sli.h4 * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
73 uint16_t iotag; /* pre-assigned IO tag */
74 uint16_t sli4_lxritag; /* logical pre-assigned XRI. */
75 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
80 union lpfc_wqe128 wqe; /* SLI-4 */
81 IOCB_t iocb; /* SLI-3 */
86 /* Pack the u8's together and make them module-4. */
91 u8 retry; /* retry counter for IOCB cmd - if needed */
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/linux/Documentation/netlink/specs/
H A Dethtool.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 protocol: genetlink-legacy
10 -
11 name: udp-tunnel-type
12 enum-name:
14 entries: [ vxlan, geneve, vxlan-gpe ]
15 -
19 -
20 name: header-flags
22 entries: [ compact-bitsets, omit-reply, stats ]
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/linux/drivers/net/ethernet/agere/
H A Det131x.c2 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
10 *------------------------------------------------------------------------------
87 MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver for the ET1310 by Agere Systems");
106 * In both cases, when flow control is enabled for either Tx or bi-direction,
108 * buffer rings are running low.
156 #define ET131X_PCI_DEVICE_ID_GIG 0xED00 /* ET1310 1000 Base-T 8 */
157 #define ET131X_PCI_DEVICE_ID_FAST 0xED01 /* ET1310 100 Base-T */
173 /* number of RFDs - default and min */
189 u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */
197 * PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2)
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/linux/drivers/usb/host/
H A Dxhci-mem.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/dma-mapping.h>
19 #include "xhci-trace.h"
20 #include "xhci-debugfs.h"
31 unsigned int num, in xhci_segment_alloc() argument
36 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_segment_alloc()
42 seg->trbs = dma_pool_zalloc(xhci->segment_pool, flags, &dma); in xhci_segment_alloc()
43 if (!seg->trbs) { in xhci_segment_alloc()
49 seg->bounce_buf = kzalloc_node(max_packet, flags, in xhci_segment_alloc()
51 if (!seg->bounce_buf) { in xhci_segment_alloc()
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/linux/drivers/net/ethernet/sun/
H A Dsunhme.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 #define GREG_STAT_ACNTEXP 0x00000004 /* Align-error counter expired */
39 #define GREG_STAT_CCNTEXP 0x00000008 /* CRC-error counter expired */
40 #define GREG_STAT_LCNTEXP 0x00000010 /* Length-error counter expired */
42 #define GREG_STAT_CVCNTEXP 0x00000040 /* Code-violation counter expired */
46 #define GREG_STAT_MAXPKTERR 0x00000400 /* Max-packet size error */
47 #define GREG_STAT_NCNTEXP 0x00000800 /* Normal-collision counter expired */
48 #define GREG_STAT_ECNTEXP 0x00001000 /* Excess-collision counter expired */
49 #define GREG_STAT_LCCNTEXP 0x00002000 /* Late-collision counter expired */
50 #define GREG_STAT_FCNTEXP 0x00004000 /* First-collision counter expired */
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/linux/arch/sparc/include/asm/
H A Dvio.h1 /* SPDX-License-Identifier: GPL-2.0 */
84 #define VIO_DESC_MODE 0x02 /* In-band descriptors */
85 #define VIO_DRING_MODE 0x03 /* Descriptor rings */
147 #define VD_OP_GET_WCE 0x04 /* Get write-cache status */
148 #define VD_OP_SET_WCE 0x05 /* Enable/disable write-cache */
186 u16 num_cyl; /* Num data cylinders */
187 u16 alt_cyl; /* Num alternate cylinders */
189 u16 num_hd; /* Num heads */
190 u16 num_sec; /* Num sectors */
194 u16 phy_cyl; /* Num physical cylinders */
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/linux/drivers/block/xen-blkback/
H A Dxenbus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #define pr_fmt(fmt) "xen-blkback: " fmt
18 /* On the XenBus the max length of 'ring-ref%u'. */
40 return be->dev; in xen_blkbk_xenbus()
58 struct xenbus_device *dev = blkif->be->dev; in blkback_name()
60 devpath = xenbus_read(XBT_NIL, dev->nodename, "dev", NULL); in blkback_name()
70 snprintf(buf, TASK_COMM_LEN, "%d.%s", blkif->domid, devname); in blkback_name()
84 if (!blkif->rings || !blkif->rings[0].irq || !blkif->vbd.bdev_file) in xen_update_blkif_status()
88 if (blkif->be->dev->state == XenbusStateConnected) in xen_update_blkif_status()
92 connect(blkif->be); in xen_update_blkif_status()
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_base.c1 // SPDX-License-Identifier: GPL-2.0
11 * __ice_vsi_get_qs_contig - Assign a contiguous chunk of queues to VSI
12 * @qs_cfg: gathered variables needed for PF->VSI queues assignment
14 * Return 0 on success and -ENOMEM in case of no left space in PF queue bitmap
20 mutex_lock(qs_cfg->qs_mutex); in __ice_vsi_get_qs_contig()
21 offset = bitmap_find_next_zero_area(qs_cfg->pf_map, qs_cfg->pf_map_size, in __ice_vsi_get_qs_contig()
22 0, qs_cfg->q_count, 0); in __ice_vsi_get_qs_contig()
23 if (offset >= qs_cfg->pf_map_size) { in __ice_vsi_get_qs_contig()
24 mutex_unlock(qs_cfg->qs_mutex); in __ice_vsi_get_qs_contig()
25 return -ENOMEM; in __ice_vsi_get_qs_contig()
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H A Dice.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #include <linux/dma-mapping.h>
122 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
130 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
131 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
132 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
133 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
159 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
163 for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
166 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
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/linux/drivers/net/ethernet/atheros/atlx/
H A Datl1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
4 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
5 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
8 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
82 /* Wake-On-Lan control register */
215 /* RX/TX count-down timer to trigger CMB-write. 2us resolution. */
302 #define AUTONEG_ADVERTISE_SPEED_DEFAULT 0x002F /* All but 1000-Half */
431 * The L1 transmit packet descriptor is comprised of four 32-bit words.
434 * +---------------------------------------+
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/linux/drivers/net/ethernet/hisilicon/hns3/hns3_common/
H A Dhclge_comm_cmd.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2021-2021 Hisilicon Limited.
10 dma_addr_t dma = ring->desc_dma_addr; in hclge_comm_cmd_config_regs()
13 if (ring->ring_type == HCLGE_COMM_TYPE_CSQ) { in hclge_comm_cmd_config_regs()
20 reg_val |= ring->desc_num >> HCLGE_COMM_NIC_CMQ_DESC_NUM_S; in hclge_comm_cmd_config_regs()
29 reg_val = ring->desc_num >> HCLGE_COMM_NIC_CMQ_DESC_NUM_S; in hclge_comm_cmd_config_regs()
38 hclge_comm_cmd_config_regs(hw, &hw->cmq.csq); in hclge_comm_cmd_init_regs()
39 hclge_comm_cmd_config_regs(hw, &hw->cmq.crq); in hclge_comm_cmd_init_regs()
44 desc->flag = cpu_to_le16(HCLGE_COMM_CMD_FLAG_NO_INTR | in hclge_comm_cmd_reuse_desc()
47 desc->flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_WR); in hclge_comm_cmd_reuse_desc()
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