Home
last modified time | relevance | path

Searched +full:num +full:- +full:rings (Results 1 – 25 of 79) sorted by relevance

1234

/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dk3-ringacc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
[all...]
H A Dk3-ringacc.txt17 - compatible : Must be "ti,am654-navss-ringacc";
18 - reg : Should contain register location and length of the following
20 - reg-names : should be
21 "rt" - The RA Ring Real-time Control/Status Registers
22 "fifos" - The RA Queues Registers
23 "proxy_gcfg" - The RA Proxy Global Config Registers
24 "proxy_target" - The RA Proxy Datapath Registers
25 - ti,num-rings : Number of rings supported by RA
26 - ti,sci-rm-range-gp-rings : TI-SCI RM subtype for GP ring range
27 - ti,sci : phandle on TI-SCI compatible System controller node
[all …]
/freebsd/sys/dev/liquidio/base/
H A Dlio_config.h41 /*--------------------------CONFIG VALUES------------------------*/
90 #define LIO_CN23XX_MAX_INPUT_JABBER (LIO_CN23XX_PKI_MAX_FRAME_SIZE - \
102 #define LIO_GET_IQ_CFG(cfg) ((cfg)->iq)
103 #define LIO_GET_IQ_MAX_Q_CFG(cfg) ((cfg)->iq.max_iqs)
104 #define LIO_GET_IQ_INSTR_TYPE_CFG(cfg) ((cfg)->iq.instr_type)
106 #define LIO_GET_IQ_INTR_PKT_CFG(cfg) ((cfg)->iq.iq_intr_pkt)
108 #define LIO_GET_OQ_MAX_Q_CFG(cfg) ((cfg)->oq.max_oqs)
109 #define LIO_GET_OQ_PKTS_PER_INTR_CFG(cfg) ((cfg)->oq.pkts_per_intr)
110 #define LIO_GET_OQ_REFILL_THRESHOLD_CFG(cfg) ((cfg)->oq.refill_threshold)
111 #define LIO_GET_OQ_INTR_PKT_CFG(cfg) ((cfg)->oq.oq_intr_pkt)
[all …]
H A Dlio_device.c88 /* Num of desc for rx rings */
91 /* Num of desc for tx rings */
118 /* Num of desc for rx rings */
121 /* Num of desc for tx rings */
165 "BEGIN", "PCI-ENABLE-DONE", "PCI-MAP-DONE", "DISPATCH-INIT-DONE",
166 "IQ-INIT-DONE", "SCBUFF-POOL-INIT-DONE", "RESPLIST-INIT-DONE",
167 "DROQ-INIT-DONE", "MBOX-SETUP-DONE", "MSIX-ALLOC-VECTOR-DONE",
168 "INTR-SET-DONE", "IO-QUEUES-INIT-DONE", "CONSOLE-INIT-DONE",
169 "HOST-READY", "CORE-READY", "RUNNING", "IN-RESET",
188 if (conf_type < 0 || conf_type > (LIO_NUM_CFGS - 1)) in oct_set_config_info()
[all …]
H A Dlio_device.h58 /* Endian-swap modes supported by Octeon. */
74 /*--------------- PCI BAR1 index registers -------------*/
120 /*---------------------------DISPATCH LIST-------------------------------*/
131 /* Singly-linked tail queue node for this entry */
134 /* Singly-linked tail queue head for this entry */
162 /*----------------------- THE OCTEON DEVICE ---------------------------*/
202 uint32_t num, char *pre, char *suf);
268 uint32_t num_gmx_ports; /* num gmx ports */
273 * See octeon-drv-opcodes.h for values.
345 /* Actual rings left for PF device */
[all …]
/freebsd/lib/libnetmap/
H A Dlibnetmap.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 /* if thread-safety is not needed, define LIBNETMAP_NOTHREADSAFE before including
78 * -NN bind individual NIC ring pair
94 * option:key1=value1,key2=value2,... (multi-key option)
96 * For multi-key options, the keys can be assigned in any order, but they
98 * option keys: unmentioned keys will receive default values. Some multi-key
99 * options define a default key and also accept the single-key syntax, by
108 * share (single-key)
113 * conf (multi-key)
[all …]
H A Dnmreq.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
73 o->nro_next = h->nr_options; in nmreq_push_option()
74 h->nr_options = (uintptr_t)o; in nmreq_push_option()
86 #define declprefix(prefix, flags) { (prefix), (sizeof(prefix) - 1), (flags) }
98 h->nr_version = NETMAP_API; in nmreq_header_init()
99 h->nr_reqtype = reqtype; in nmreq_header_init()
100 h->nr_body = (uintptr_t)body; in nmreq_header_init()
114 for (p = nmreq_prefixes; p->prefix != NULL; p++) { in nmreq_header_decode()
115 if (!strncmp(scan, p->prefix, p->len)) in nmreq_header_decode()
[all …]
/freebsd/sys/dev/netmap/
H A Dnetmap_mem2.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2012-2014 Matteo Landi
5 * Copyright (C) 2012-2016 Luigi Rizzo
6 * Copyright (C) 2012-2016 Giuseppe Lettieri
89 u_int num; member
98 /* ---------------------------------------------------*/
113 /* ---------------------------------------------------*/
134 #define NMA_LOCK_INIT(n) NM_MTX_INIT((n)->nm_mtx)
135 #define NMA_LOCK_DESTROY(n) NM_MTX_DESTROY((n)->nm_mtx)
[all …]
/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
60 /* *INDENT-OFF* */
64 /* *INDENT-ON* */
78 /* Statistics - TBD */
132 /* TX/RX descriptor Target-ID field (in the buffer address 64 bit field) */
167 uint32_t num; /**< Number of buffers of the block */ member
170 * Target-ID to be assigned to the block descriptors
171 * Requires Target-ID in descriptor to be enabled for the specific UDMA
197 * completion rings must have same size
[all …]
/freebsd/sys/net/
H A Dnetmap_user.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2011-2016 Universita` di Pisa
45 * we can access ring->cur, ring->head, ring->tail, etc.
47 * ring->slot[i] gives us the i-th slot (we can access
60 * an ioctl()/select()/poll() being issued to refill rings or push
112 nifp, (nifp)->ring_ofs[index] )
115 nifp, (nifp)->ring_ofs[index + (nifp)->ni_tx_rings + \
116 (nifp)->ni_host_tx_rings] )
119 ((char *)(ring) + (ring)->buf_ofs + ((size_t)(index)*(ring)->nr_buf_size))
[all …]
/freebsd/sys/dev/qat/qat_common/
H A Dadf_freebsd_transport_debug.c1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2025 Intel Corporation */
22 struct adf_etr_bank_data *bank = ring->bank; in adf_ring_show()
23 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); in adf_ring_show()
24 struct resource *csr = ring->bank->csr_addr; in adf_ring_show()
36 head = csr_ops->read_csr_ring_head(csr, in adf_ring_show()
37 bank->bank_number, in adf_ring_show()
38 ring->ring_number); in adf_ring_show()
39 tail = csr_ops->read_csr_ring_tail(csr, in adf_ring_show()
40 bank->bank_number, in adf_ring_show()
[all …]
/freebsd/usr.sbin/bhyve/
H A Dvirtio.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 * https://github.com/rustyrussell/virtio-spec
43 * http://people.redhat.com/pbonzini/virtio-spec.pdf
48 * Each virtqueue uses at least two 4096-byte pages, laid out thus:
50 * +--
[all...]
/freebsd/sys/contrib/xen/io/
H A Dblkif.h4 * Unified block-device I/O interface for Xen guest OSes.
24 * Copyright (c) 2003-2004, Keir Fraser
35 * Front->back notifications: When enqueuing a new request, sending a
37 * hold-off mechanism provided by the ring macros). Backends must set
40 * Back->front notifications: When enqueuing a new response, sending a
42 * hold-off mechanism provided by the ring macros). Frontends must set
80 *------------------ Backend Device Identification (PRIVATE) ------------------
95 * physical-device
102 * physical-device-path
115 * direct-io-safe
[all …]
/freebsd/sys/contrib/dev/athk/ath11k/
H A Dhal.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
9 #include <linux/dma-mapping.h>
27 * similar to other REO2SW rings though it is named as REO2TCL.
28 * Any of theREO2SW rings can be used as exception ring.
198 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_alloc_cont_rdp()
202 hal->rdp.vaddr = dma_alloc_coherent(ab->dev, size, &hal->rdp.paddr, in ath11k_hal_alloc_cont_rdp()
204 if (!hal->rdp.vaddr) in ath11k_hal_alloc_cont_rdp()
205 return -ENOMEM; in ath11k_hal_alloc_cont_rdp()
212 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_free_cont_rdp()
[all …]
H A Dcore.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
51 /* SMBIOS type structure length (excluding strings-set) */
201 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
505 /* the following are protected by ar->data_lock */
534 /* Protected with ar->data_lock */
561 #define ATH11K_DEFAULT_NOISE_FLOOR -95
563 #define ATH11K_INVALID_RSSI_FULL -1
565 #define ATH11K_INVALID_RSSI_EMPTY -128
[all …]
/freebsd/sys/dev/xen/blkback/
H A Dblkback.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2009-2012 Spectra Logic Corporation
76 #include <xen/xen-os.h>
86 /*--------------------------- Compile-time Tunables --------------------------*/
89 * negotiated block-front/back communication channel. Allow enough
96 * additional segment blocks) we will allow in a negotiated block-front/back
107 /*---------------------------------- Macros ----------------------------------*/
122 * block-front/back communication channel.
130 * segment blocks) per request we will allow in a negotiated block-front/back
[all …]
/freebsd/tests/sys/netmap/
H A Dctrl-api-test.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * # kyua test -k /usr/tests/sys/netmap/Kyuafile
35 * # ./ctrl-api-test
66 return -1; in eventfd()
83 for (i = 0; i < argc - 1; i++) { in exec_command()
86 return -1; in exec_command()
106 for (i--; i >= 0; i--) { in exec_command()
109 return -1; in exec_command()
118 for (i = 0; i < argc - 1; i++) { in exec_command()
[all …]
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dhtt.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
31 /* bits 5-23 currently reserved */
36 enum htt_h2t_msg_type { /* host-to-target */
59 u8 pad[sizeof(u32) - sizeof(struct htt_cmd_hdr)];
76 * but the host shall use the bit-mast + bit-shift defs, to be endian-
178 * htt_data_tx_desc - used for data tx path
181 * ext_tid: for qos-data frames (0-15), see %HTT_DATA_TX_EXT_TID_
243 #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
[all …]
H A Dce.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
15 /* Descriptor rings must be aligned to this boundary */
20 * Copy Engine support: low-level Target-side Copy Engine API.
38 #define CE_DESC_FLAGS_META_DATA_MASK ar->hw_values->ce_desc_meta_data_mask
39 #define CE_DESC_FLAGS_META_DATA_LSB ar->hw_values->ce_desc_meta_data_lsb
92 /* Start of DMA-coherent area reserved for descriptors */
100 * Aligned to descriptor-size boundary.
101 * Points into reserved DMA-coherent area, above.
[all …]
/freebsd/sys/dev/ixl/
H A Dixl_pf_iov.c3 Copyright (c) 2013-2018, Intel Corporation
91 device_t dev = pf->dev; in ixl_initialize_sriov()
92 struct i40e_hw *hw = &pf->hw; in ixl_initialize_sriov()
98 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); in ixl_initialize_sriov()
99 pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", in ixl_initialize_sriov()
101 pci_iov_schema_add_bool(vf_schema, "allow-set-mac", in ixl_initialize_sriov()
103 pci_iov_schema_add_bool(vf_schema, "allow-promisc", in ixl_initialize_sriov()
105 pci_iov_schema_add_uint16(vf_schema, "num-queues", in ixl_initialize_sriov()
107 max(1, min(hw->func_caps.num_msix_vectors_vf - 1, IAVF_MAX_QUEUES))); in ixl_initialize_sriov()
112 "Failed to initialize SR-IOV (error=%d)\n", in ixl_initialize_sriov()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
[all …]
H A Dk3-am65-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "simple-bus";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 cpsw_mac_syscon: ethernet-mac-syscon@200 {
16 compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
21 compatible = "ti,am654-phy-gmii-sel";
23 #phy-cells = <1>;
29 compatible = "pinctrl-single";
[all …]
H A Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sram";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 atf-sram@0 {
28 scm_conf: scm-conf@100000 {
[all …]
/freebsd/sys/dev/ena/
H A Dena.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
210 device_t pdev = adapter->pdev; in ena_dma_alloc()
215 maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE; in ena_dma_alloc()
217 dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width); in ena_dma_alloc()
232 &dma->tag); in ena_dma_alloc()
238 error = bus_dma_tag_set_domain(dma->tag, domain); in ena_dma_alloc()
245 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, in ena_dma_alloc()
246 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map); in ena_dma_alloc()
[all …]
/freebsd/sys/contrib/dev/athk/ath12k/
H A Dhal.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
6 #include <linux/dma-mapping.h>
25 * Any of theREO2SW rings can be used as exception ring.
247 return HAL_REO1_RING_ID(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_id_offset()
252 return HAL_REO1_RING_MSI1_BASE_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_msi1_base_lsb_offset()
257 return HAL_REO1_RING_MSI1_BASE_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_msi1_base_msb_offset()
262 return HAL_REO1_RING_MSI1_DATA(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_msi1_data_offset()
267 return HAL_REO1_RING_BASE_MSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_reo1_ring_base_msb_offset()
[all …]

1234