Lines Matching +full:num +full:- +full:rings
1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
9 #include <linux/dma-mapping.h>
27 * similar to other REO2SW rings though it is named as REO2TCL.
28 * Any of theREO2SW rings can be used as exception ring.
198 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_alloc_cont_rdp()
202 hal->rdp.vaddr = dma_alloc_coherent(ab->dev, size, &hal->rdp.paddr, in ath11k_hal_alloc_cont_rdp()
204 if (!hal->rdp.vaddr) in ath11k_hal_alloc_cont_rdp()
205 return -ENOMEM; in ath11k_hal_alloc_cont_rdp()
212 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_free_cont_rdp()
215 if (!hal->rdp.vaddr) in ath11k_hal_free_cont_rdp()
219 dma_free_coherent(ab->dev, size, in ath11k_hal_free_cont_rdp()
220 hal->rdp.vaddr, hal->rdp.paddr); in ath11k_hal_free_cont_rdp()
221 hal->rdp.vaddr = NULL; in ath11k_hal_free_cont_rdp()
226 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_alloc_cont_wrp()
230 hal->wrp.vaddr = dma_alloc_coherent(ab->dev, size, &hal->wrp.paddr, in ath11k_hal_alloc_cont_wrp()
232 if (!hal->wrp.vaddr) in ath11k_hal_alloc_cont_wrp()
233 return -ENOMEM; in ath11k_hal_alloc_cont_wrp()
240 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_free_cont_wrp()
243 if (!hal->wrp.vaddr) in ath11k_hal_free_cont_wrp()
247 dma_free_coherent(ab->dev, size, in ath11k_hal_free_cont_wrp()
248 hal->wrp.vaddr, hal->wrp.paddr); in ath11k_hal_free_cont_wrp()
249 hal->wrp.vaddr = NULL; in ath11k_hal_free_cont_wrp()
255 struct hal_srng_config *srng_config = &ab->hal.srng_config[HAL_CE_DST]; in ath11k_hal_ce_dst_setup()
260 srng_config->reg_start[HAL_SRNG_REG_GRP_R0] + in ath11k_hal_ce_dst_setup()
261 ring_num * srng_config->reg_size[HAL_SRNG_REG_GRP_R0]; in ath11k_hal_ce_dst_setup()
266 srng->u.dst_ring.max_buffer_length); in ath11k_hal_ce_dst_setup()
273 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_dst_hw_init()
278 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0]; in ath11k_hal_srng_dst_hw_init()
280 if (srng->flags & HAL_SRNG_FLAGS_MSI_INTR) { in ath11k_hal_srng_dst_hw_init()
283 srng->msi_addr); in ath11k_hal_srng_dst_hw_init()
286 ((u64)srng->msi_addr >> in ath11k_hal_srng_dst_hw_init()
294 srng->msi_data); in ath11k_hal_srng_dst_hw_init()
297 ath11k_hif_write32(ab, reg_base, srng->ring_base_paddr); in ath11k_hal_srng_dst_hw_init()
300 ((u64)srng->ring_base_paddr >> in ath11k_hal_srng_dst_hw_init()
303 (srng->entry_size * srng->num_entries)); in ath11k_hal_srng_dst_hw_init()
306 val = FIELD_PREP(HAL_REO1_RING_ID_RING_ID, srng->ring_id) | in ath11k_hal_srng_dst_hw_init()
307 FIELD_PREP(HAL_REO1_RING_ID_ENTRY_SIZE, srng->entry_size); in ath11k_hal_srng_dst_hw_init()
312 (srng->intr_timer_thres_us >> 3)); in ath11k_hal_srng_dst_hw_init()
315 (srng->intr_batch_cntr_thres_entries * in ath11k_hal_srng_dst_hw_init()
316 srng->entry_size)); in ath11k_hal_srng_dst_hw_init()
322 hp_addr = hal->rdp.paddr + in ath11k_hal_srng_dst_hw_init()
323 ((unsigned long)srng->u.dst_ring.hp_addr - in ath11k_hal_srng_dst_hw_init()
324 (unsigned long)hal->rdp.vaddr); in ath11k_hal_srng_dst_hw_init()
331 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2]; in ath11k_hal_srng_dst_hw_init()
334 *srng->u.dst_ring.hp_addr = 0; in ath11k_hal_srng_dst_hw_init()
336 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0]; in ath11k_hal_srng_dst_hw_init()
338 if (srng->flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP) in ath11k_hal_srng_dst_hw_init()
340 if (srng->flags & HAL_SRNG_FLAGS_RING_PTR_SWAP) in ath11k_hal_srng_dst_hw_init()
342 if (srng->flags & HAL_SRNG_FLAGS_MSI_SWAP) in ath11k_hal_srng_dst_hw_init()
352 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_src_hw_init()
357 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0]; in ath11k_hal_srng_src_hw_init()
359 if (srng->flags & HAL_SRNG_FLAGS_MSI_INTR) { in ath11k_hal_srng_src_hw_init()
362 srng->msi_addr); in ath11k_hal_srng_src_hw_init()
365 ((u64)srng->msi_addr >> in ath11k_hal_srng_src_hw_init()
374 srng->msi_data); in ath11k_hal_srng_src_hw_init()
377 ath11k_hif_write32(ab, reg_base, srng->ring_base_paddr); in ath11k_hal_srng_src_hw_init()
380 ((u64)srng->ring_base_paddr >> in ath11k_hal_srng_src_hw_init()
383 (srng->entry_size * srng->num_entries)); in ath11k_hal_srng_src_hw_init()
386 val = FIELD_PREP(HAL_REO1_RING_ID_ENTRY_SIZE, srng->entry_size); in ath11k_hal_srng_src_hw_init()
389 if (srng->ring_id == HAL_SRNG_RING_ID_WBM_IDLE_LINK) { in ath11k_hal_srng_src_hw_init()
390 ath11k_hif_write32(ab, reg_base, (u32)srng->ring_base_paddr); in ath11k_hal_srng_src_hw_init()
392 ((u64)srng->ring_base_paddr >> in ath11k_hal_srng_src_hw_init()
395 (srng->entry_size * srng->num_entries)); in ath11k_hal_srng_src_hw_init()
404 srng->intr_timer_thres_us); in ath11k_hal_srng_src_hw_init()
407 (srng->intr_batch_cntr_thres_entries * in ath11k_hal_srng_src_hw_init()
408 srng->entry_size)); in ath11k_hal_srng_src_hw_init()
415 if (srng->flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) { in ath11k_hal_srng_src_hw_init()
417 srng->u.src_ring.low_threshold); in ath11k_hal_srng_src_hw_init()
423 if (srng->ring_id != HAL_SRNG_RING_ID_WBM_IDLE_LINK) { in ath11k_hal_srng_src_hw_init()
424 tp_addr = hal->rdp.paddr + in ath11k_hal_srng_src_hw_init()
425 ((unsigned long)srng->u.src_ring.tp_addr - in ath11k_hal_srng_src_hw_init()
426 (unsigned long)hal->rdp.vaddr); in ath11k_hal_srng_src_hw_init()
436 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2]; in ath11k_hal_srng_src_hw_init()
439 *srng->u.src_ring.tp_addr = 0; in ath11k_hal_srng_src_hw_init()
441 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R0]; in ath11k_hal_srng_src_hw_init()
443 if (srng->flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP) in ath11k_hal_srng_src_hw_init()
445 if (srng->flags & HAL_SRNG_FLAGS_RING_PTR_SWAP) in ath11k_hal_srng_src_hw_init()
447 if (srng->flags & HAL_SRNG_FLAGS_MSI_SWAP) in ath11k_hal_srng_src_hw_init()
450 /* Loop count is not used for SRC rings */ in ath11k_hal_srng_src_hw_init()
461 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath11k_hal_srng_hw_init()
471 struct hal_srng_config *srng_config = &ab->hal.srng_config[type]; in ath11k_hal_srng_get_ring_id()
474 if (ring_num >= srng_config->max_rings) { in ath11k_hal_srng_get_ring_id()
476 return -EINVAL; in ath11k_hal_srng_get_ring_id()
479 ring_id = srng_config->start_ring_id + ring_num; in ath11k_hal_srng_get_ring_id()
480 if (srng_config->lmac_ring) in ath11k_hal_srng_get_ring_id()
484 return -EINVAL; in ath11k_hal_srng_get_ring_id()
494 return -EINVAL; in ath11k_hal_srng_get_entrysize()
496 srng_config = &ab->hal.srng_config[ring_type]; in ath11k_hal_srng_get_entrysize()
498 return (srng_config->entry_size << 2); in ath11k_hal_srng_get_entrysize()
506 return -EINVAL; in ath11k_hal_srng_get_max_entries()
508 srng_config = &ab->hal.srng_config[ring_type]; in ath11k_hal_srng_get_max_entries()
510 return (srng_config->max_size / srng_config->entry_size); in ath11k_hal_srng_get_max_entries()
516 params->ring_base_paddr = srng->ring_base_paddr; in ath11k_hal_srng_get_params()
517 params->ring_base_vaddr = srng->ring_base_vaddr; in ath11k_hal_srng_get_params()
518 params->num_entries = srng->num_entries; in ath11k_hal_srng_get_params()
519 params->intr_timer_thres_us = srng->intr_timer_thres_us; in ath11k_hal_srng_get_params()
520 params->intr_batch_cntr_thres_entries = in ath11k_hal_srng_get_params()
521 srng->intr_batch_cntr_thres_entries; in ath11k_hal_srng_get_params()
522 params->low_threshold = srng->u.src_ring.low_threshold; in ath11k_hal_srng_get_params()
523 params->msi_addr = srng->msi_addr; in ath11k_hal_srng_get_params()
524 params->msi_data = srng->msi_data; in ath11k_hal_srng_get_params()
525 params->flags = srng->flags; in ath11k_hal_srng_get_params()
531 if (!(srng->flags & HAL_SRNG_FLAGS_LMAC_RING)) in ath11k_hal_srng_get_hp_addr()
534 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath11k_hal_srng_get_hp_addr()
535 return ab->hal.wrp.paddr + in ath11k_hal_srng_get_hp_addr()
536 ((unsigned long)srng->u.src_ring.hp_addr - in ath11k_hal_srng_get_hp_addr()
537 (unsigned long)ab->hal.wrp.vaddr); in ath11k_hal_srng_get_hp_addr()
539 return ab->hal.rdp.paddr + in ath11k_hal_srng_get_hp_addr()
540 ((unsigned long)srng->u.dst_ring.hp_addr - in ath11k_hal_srng_get_hp_addr()
541 (unsigned long)ab->hal.rdp.vaddr); in ath11k_hal_srng_get_hp_addr()
547 if (!(srng->flags & HAL_SRNG_FLAGS_LMAC_RING)) in ath11k_hal_srng_get_tp_addr()
550 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath11k_hal_srng_get_tp_addr()
551 return ab->hal.rdp.paddr + in ath11k_hal_srng_get_tp_addr()
552 ((unsigned long)srng->u.src_ring.tp_addr - in ath11k_hal_srng_get_tp_addr()
553 (unsigned long)ab->hal.rdp.vaddr); in ath11k_hal_srng_get_tp_addr()
555 return ab->hal.wrp.paddr + in ath11k_hal_srng_get_tp_addr()
556 ((unsigned long)srng->u.dst_ring.tp_addr - in ath11k_hal_srng_get_tp_addr()
557 (unsigned long)ab->hal.wrp.vaddr); in ath11k_hal_srng_get_tp_addr()
579 desc->buffer_addr_low = paddr & HAL_ADDR_LSB_REG_MASK; in ath11k_hal_ce_src_set_desc()
580 desc->buffer_addr_info = in ath11k_hal_ce_src_set_desc()
587 desc->meta_info = FIELD_PREP(HAL_CE_SRC_DESC_META_INFO_DATA, id); in ath11k_hal_ce_src_set_desc()
595 desc->buffer_addr_low = paddr & HAL_ADDR_LSB_REG_MASK; in ath11k_hal_ce_dst_set_desc()
596 desc->buffer_addr_info = in ath11k_hal_ce_dst_set_desc()
607 len = FIELD_GET(HAL_CE_DST_STATUS_DESC_FLAGS_LEN, desc->flags); in ath11k_hal_ce_dst_status_get_length()
608 desc->flags &= ~HAL_CE_DST_STATUS_DESC_FLAGS_LEN; in ath11k_hal_ce_dst_status_get_length()
616 desc->buf_addr_info.info0 = FIELD_PREP(BUFFER_ADDR_INFO0_ADDR, in ath11k_hal_set_link_desc_addr()
618 desc->buf_addr_info.info1 = FIELD_PREP(BUFFER_ADDR_INFO1_ADDR, in ath11k_hal_set_link_desc_addr()
626 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_dst_peek()
628 if (srng->u.dst_ring.tp != srng->u.dst_ring.cached_hp) in ath11k_hal_srng_dst_peek()
629 return (srng->ring_base_vaddr + srng->u.dst_ring.tp); in ath11k_hal_srng_dst_peek()
642 dma_sync_single_for_cpu(ab->dev, virt_to_phys(desc), in ath11k_hal_srng_prefetch_desc()
643 (srng->entry_size * sizeof(u32)), in ath11k_hal_srng_prefetch_desc()
654 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_dst_get_next_entry()
656 if (srng->u.dst_ring.tp == srng->u.dst_ring.cached_hp) in ath11k_hal_srng_dst_get_next_entry()
659 desc = srng->ring_base_vaddr + srng->u.dst_ring.tp; in ath11k_hal_srng_dst_get_next_entry()
661 srng->u.dst_ring.tp += srng->entry_size; in ath11k_hal_srng_dst_get_next_entry()
664 if (srng->u.dst_ring.tp == srng->ring_size) in ath11k_hal_srng_dst_get_next_entry()
665 srng->u.dst_ring.tp = 0; in ath11k_hal_srng_dst_get_next_entry()
668 if (srng->flags & HAL_SRNG_FLAGS_CACHED) in ath11k_hal_srng_dst_get_next_entry()
679 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_dst_num_free()
681 tp = srng->u.dst_ring.tp; in ath11k_hal_srng_dst_num_free()
684 hp = *srng->u.dst_ring.hp_addr; in ath11k_hal_srng_dst_num_free()
685 srng->u.dst_ring.cached_hp = hp; in ath11k_hal_srng_dst_num_free()
687 hp = srng->u.dst_ring.cached_hp; in ath11k_hal_srng_dst_num_free()
691 return (hp - tp) / srng->entry_size; in ath11k_hal_srng_dst_num_free()
693 return (srng->ring_size - tp + hp) / srng->entry_size; in ath11k_hal_srng_dst_num_free()
702 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_src_num_free()
704 hp = srng->u.src_ring.hp; in ath11k_hal_srng_src_num_free()
707 tp = *srng->u.src_ring.tp_addr; in ath11k_hal_srng_src_num_free()
708 srng->u.src_ring.cached_tp = tp; in ath11k_hal_srng_src_num_free()
710 tp = srng->u.src_ring.cached_tp; in ath11k_hal_srng_src_num_free()
714 return ((tp - hp) / srng->entry_size) - 1; in ath11k_hal_srng_src_num_free()
716 return ((srng->ring_size - hp + tp) / srng->entry_size) - 1; in ath11k_hal_srng_src_num_free()
725 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_src_get_next_entry()
728 * SRNG rings is not power of 2 (due to descriptor sizes). Need to see in ath11k_hal_srng_src_get_next_entry()
729 * if separate function is defined for rings having power of 2 ring size in ath11k_hal_srng_src_get_next_entry()
730 * (TCL2SW, REO2SW, SW2RXDMA and CE rings) so that we can avoid the in ath11k_hal_srng_src_get_next_entry()
733 next_hp = (srng->u.src_ring.hp + srng->entry_size) % srng->ring_size; in ath11k_hal_srng_src_get_next_entry()
735 if (next_hp == srng->u.src_ring.cached_tp) in ath11k_hal_srng_src_get_next_entry()
738 desc = srng->ring_base_vaddr + srng->u.src_ring.hp; in ath11k_hal_srng_src_get_next_entry()
739 srng->u.src_ring.hp = next_hp; in ath11k_hal_srng_src_get_next_entry()
741 /* TODO: Reap functionality is not used by all rings. If particular in ath11k_hal_srng_src_get_next_entry()
747 srng->u.src_ring.reap_hp = next_hp; in ath11k_hal_srng_src_get_next_entry()
758 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_src_reap_next()
760 next_reap_hp = (srng->u.src_ring.reap_hp + srng->entry_size) % in ath11k_hal_srng_src_reap_next()
761 srng->ring_size; in ath11k_hal_srng_src_reap_next()
763 if (next_reap_hp == srng->u.src_ring.cached_tp) in ath11k_hal_srng_src_reap_next()
766 desc = srng->ring_base_vaddr + next_reap_hp; in ath11k_hal_srng_src_reap_next()
767 srng->u.src_ring.reap_hp = next_reap_hp; in ath11k_hal_srng_src_reap_next()
777 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_src_get_next_reaped()
779 if (srng->u.src_ring.hp == srng->u.src_ring.reap_hp) in ath11k_hal_srng_src_get_next_reaped()
782 desc = srng->ring_base_vaddr + srng->u.src_ring.hp; in ath11k_hal_srng_src_get_next_reaped()
783 srng->u.src_ring.hp = (srng->u.src_ring.hp + srng->entry_size) % in ath11k_hal_srng_src_get_next_reaped()
784 srng->ring_size; in ath11k_hal_srng_src_get_next_reaped()
791 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_src_peek()
793 if (((srng->u.src_ring.hp + srng->entry_size) % srng->ring_size) == in ath11k_hal_srng_src_peek()
794 srng->u.src_ring.cached_tp) in ath11k_hal_srng_src_peek()
797 return srng->ring_base_vaddr + srng->u.src_ring.hp; in ath11k_hal_srng_src_peek()
802 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_access_begin()
804 if (srng->ring_dir == HAL_SRNG_DIR_SRC) { in ath11k_hal_srng_access_begin()
805 srng->u.src_ring.cached_tp = in ath11k_hal_srng_access_begin()
806 *(volatile u32 *)srng->u.src_ring.tp_addr; in ath11k_hal_srng_access_begin()
808 srng->u.dst_ring.cached_hp = *srng->u.dst_ring.hp_addr; in ath11k_hal_srng_access_begin()
811 if (srng->flags & HAL_SRNG_FLAGS_CACHED) in ath11k_hal_srng_access_begin()
821 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_access_end()
824 if (srng->flags & HAL_SRNG_FLAGS_LMAC_RING) { in ath11k_hal_srng_access_end()
825 /* For LMAC rings, ring pointer updates are done through FW and in ath11k_hal_srng_access_end()
828 if (srng->ring_dir == HAL_SRNG_DIR_SRC) { in ath11k_hal_srng_access_end()
829 srng->u.src_ring.last_tp = in ath11k_hal_srng_access_end()
830 *(volatile u32 *)srng->u.src_ring.tp_addr; in ath11k_hal_srng_access_end()
831 *srng->u.src_ring.hp_addr = srng->u.src_ring.hp; in ath11k_hal_srng_access_end()
833 srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr; in ath11k_hal_srng_access_end()
834 *srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp; in ath11k_hal_srng_access_end()
837 if (srng->ring_dir == HAL_SRNG_DIR_SRC) { in ath11k_hal_srng_access_end()
838 srng->u.src_ring.last_tp = in ath11k_hal_srng_access_end()
839 *(volatile u32 *)srng->u.src_ring.tp_addr; in ath11k_hal_srng_access_end()
841 (unsigned long)srng->u.src_ring.hp_addr - in ath11k_hal_srng_access_end()
842 (unsigned long)ab->mem, in ath11k_hal_srng_access_end()
843 srng->u.src_ring.hp); in ath11k_hal_srng_access_end()
845 srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr; in ath11k_hal_srng_access_end()
847 (unsigned long)srng->u.dst_ring.tp_addr - in ath11k_hal_srng_access_end()
848 (unsigned long)ab->mem, in ath11k_hal_srng_access_end()
849 srng->u.dst_ring.tp); in ath11k_hal_srng_access_end()
853 srng->timestamp = jiffies; in ath11k_hal_srng_access_end()
872 link_addr->info0 = sbuf[i].paddr & HAL_ADDR_LSB_REG_MASK; in ath11k_hal_setup_link_idle_list()
873 link_addr->info1 = FIELD_PREP( in ath11k_hal_setup_link_idle_list()
917 sbuf[nsbufs - 1].paddr)); in ath11k_hal_setup_link_idle_list()
923 ((u64)sbuf[nsbufs - 1].paddr >> in ath11k_hal_setup_link_idle_list()
961 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_setup()
962 struct hal_srng_config *srng_config = &ab->hal.srng_config[type]; in ath11k_hal_srng_setup()
973 srng = &hal->srng_list[ring_id]; in ath11k_hal_srng_setup()
975 srng->ring_id = ring_id; in ath11k_hal_srng_setup()
976 srng->ring_dir = srng_config->ring_dir; in ath11k_hal_srng_setup()
977 srng->ring_base_paddr = params->ring_base_paddr; in ath11k_hal_srng_setup()
978 srng->ring_base_vaddr = params->ring_base_vaddr; in ath11k_hal_srng_setup()
979 srng->entry_size = srng_config->entry_size; in ath11k_hal_srng_setup()
980 srng->num_entries = params->num_entries; in ath11k_hal_srng_setup()
981 srng->ring_size = srng->entry_size * srng->num_entries; in ath11k_hal_srng_setup()
982 srng->intr_batch_cntr_thres_entries = in ath11k_hal_srng_setup()
983 params->intr_batch_cntr_thres_entries; in ath11k_hal_srng_setup()
984 srng->intr_timer_thres_us = params->intr_timer_thres_us; in ath11k_hal_srng_setup()
985 srng->flags = params->flags; in ath11k_hal_srng_setup()
986 srng->msi_addr = params->msi_addr; in ath11k_hal_srng_setup()
987 srng->msi_data = params->msi_data; in ath11k_hal_srng_setup()
988 srng->initialized = 1; in ath11k_hal_srng_setup()
989 spin_lock_init(&srng->lock); in ath11k_hal_srng_setup()
990 lockdep_set_class(&srng->lock, hal->srng_key + ring_id); in ath11k_hal_srng_setup()
993 srng->hwreg_base[i] = srng_config->reg_start[i] + in ath11k_hal_srng_setup()
994 (ring_num * srng_config->reg_size[i]); in ath11k_hal_srng_setup()
997 memset(srng->ring_base_vaddr, 0, in ath11k_hal_srng_setup()
998 (srng->entry_size * srng->num_entries) << 2); in ath11k_hal_srng_setup()
1002 srng->flags |= HAL_SRNG_FLAGS_MSI_SWAP | HAL_SRNG_FLAGS_DATA_TLV_SWAP | in ath11k_hal_srng_setup()
1005 reg_base = srng->hwreg_base[HAL_SRNG_REG_GRP_R2]; in ath11k_hal_srng_setup()
1007 if (srng->ring_dir == HAL_SRNG_DIR_SRC) { in ath11k_hal_srng_setup()
1008 srng->u.src_ring.hp = 0; in ath11k_hal_srng_setup()
1009 srng->u.src_ring.cached_tp = 0; in ath11k_hal_srng_setup()
1010 srng->u.src_ring.reap_hp = srng->ring_size - srng->entry_size; in ath11k_hal_srng_setup()
1011 srng->u.src_ring.tp_addr = (void *)(hal->rdp.vaddr + ring_id); in ath11k_hal_srng_setup()
1012 srng->u.src_ring.low_threshold = params->low_threshold * in ath11k_hal_srng_setup()
1013 srng->entry_size; in ath11k_hal_srng_setup()
1014 if (srng_config->lmac_ring) { in ath11k_hal_srng_setup()
1015 lmac_idx = ring_id - HAL_SRNG_RING_ID_LMAC1_ID_START; in ath11k_hal_srng_setup()
1016 srng->u.src_ring.hp_addr = (void *)(hal->wrp.vaddr + in ath11k_hal_srng_setup()
1018 srng->flags |= HAL_SRNG_FLAGS_LMAC_RING; in ath11k_hal_srng_setup()
1020 if (!ab->hw_params.supports_shadow_regs) in ath11k_hal_srng_setup()
1021 srng->u.src_ring.hp_addr = in ath11k_hal_srng_setup()
1022 (u32 *)((unsigned long)ab->mem + reg_base); in ath11k_hal_srng_setup()
1028 (unsigned long)srng->u.src_ring.hp_addr - in ath11k_hal_srng_setup()
1029 (unsigned long)ab->mem); in ath11k_hal_srng_setup()
1040 srng->u.dst_ring.loop_cnt = 1; in ath11k_hal_srng_setup()
1041 srng->u.dst_ring.tp = 0; in ath11k_hal_srng_setup()
1042 srng->u.dst_ring.cached_hp = 0; in ath11k_hal_srng_setup()
1043 srng->u.dst_ring.hp_addr = (void *)(hal->rdp.vaddr + ring_id); in ath11k_hal_srng_setup()
1044 if (srng_config->lmac_ring) { in ath11k_hal_srng_setup()
1045 /* For LMAC rings, tail pointer updates will be done in ath11k_hal_srng_setup()
1048 lmac_idx = ring_id - HAL_SRNG_RING_ID_LMAC1_ID_START; in ath11k_hal_srng_setup()
1049 srng->u.dst_ring.tp_addr = (void *)(hal->wrp.vaddr + in ath11k_hal_srng_setup()
1051 srng->flags |= HAL_SRNG_FLAGS_LMAC_RING; in ath11k_hal_srng_setup()
1053 if (!ab->hw_params.supports_shadow_regs) in ath11k_hal_srng_setup()
1054 srng->u.dst_ring.tp_addr = in ath11k_hal_srng_setup()
1055 (u32 *)((unsigned long)ab->mem + reg_base + in ath11k_hal_srng_setup()
1056 (HAL_REO1_RING_TP(ab) - HAL_REO1_RING_HP(ab))); in ath11k_hal_srng_setup()
1061 reg_base + (HAL_REO1_RING_TP(ab) - in ath11k_hal_srng_setup()
1063 (unsigned long)srng->u.dst_ring.tp_addr - in ath11k_hal_srng_setup()
1064 (unsigned long)ab->mem); in ath11k_hal_srng_setup()
1068 if (srng_config->lmac_ring) in ath11k_hal_srng_setup()
1074 srng->u.dst_ring.max_buffer_length = params->max_buffer_len; in ath11k_hal_srng_setup()
1087 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_update_hp_tp_addr()
1089 struct hal_srng_config *srng_config = &hal->srng_config[ring_type]; in ath11k_hal_srng_update_hp_tp_addr()
1095 srng = &hal->srng_list[ring_id]; in ath11k_hal_srng_update_hp_tp_addr()
1097 if (srng_config->ring_dir == HAL_SRNG_DIR_DST) in ath11k_hal_srng_update_hp_tp_addr()
1098 srng->u.dst_ring.tp_addr = (u32 *)(HAL_SHADOW_REG(ab, shadow_cfg_idx) + in ath11k_hal_srng_update_hp_tp_addr()
1099 (unsigned long)ab->mem); in ath11k_hal_srng_update_hp_tp_addr()
1101 srng->u.src_ring.hp_addr = (u32 *)(HAL_SHADOW_REG(ab, shadow_cfg_idx) + in ath11k_hal_srng_update_hp_tp_addr()
1102 (unsigned long)ab->mem); in ath11k_hal_srng_update_hp_tp_addr()
1109 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_update_shadow_config()
1110 struct hal_srng_config *srng_config = &hal->srng_config[ring_type]; in ath11k_hal_srng_update_shadow_config()
1111 int shadow_cfg_idx = hal->num_shadow_reg_configured; in ath11k_hal_srng_update_shadow_config()
1115 return -EINVAL; in ath11k_hal_srng_update_shadow_config()
1117 hal->num_shadow_reg_configured++; in ath11k_hal_srng_update_shadow_config()
1119 target_reg = srng_config->reg_start[HAL_HP_OFFSET_IN_REG_START]; in ath11k_hal_srng_update_shadow_config()
1120 target_reg += srng_config->reg_size[HAL_HP_OFFSET_IN_REG_START] * in ath11k_hal_srng_update_shadow_config()
1124 if (srng_config->ring_dir == HAL_SRNG_DIR_DST) in ath11k_hal_srng_update_shadow_config()
1127 hal->shadow_reg_addr[shadow_cfg_idx] = target_reg; in ath11k_hal_srng_update_shadow_config()
1134 "update shadow config target_reg %x shadow reg 0x%x shadow_idx 0x%x ring_type %d ring num %d", in ath11k_hal_srng_update_shadow_config()
1145 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_shadow_config()
1148 /* update all the non-CE srngs. */ in ath11k_hal_srng_shadow_config()
1150 struct hal_srng_config *srng_config = &hal->srng_config[ring_type]; in ath11k_hal_srng_shadow_config()
1157 if (srng_config->lmac_ring) in ath11k_hal_srng_shadow_config()
1160 for (ring_num = 0; ring_num < srng_config->max_rings; ring_num++) in ath11k_hal_srng_shadow_config()
1168 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_get_shadow_config()
1170 *len = hal->num_shadow_reg_configured; in ath11k_hal_srng_get_shadow_config()
1171 *cfg = hal->shadow_reg_addr; in ath11k_hal_srng_get_shadow_config()
1177 lockdep_assert_held(&srng->lock); in ath11k_hal_srng_shadow_update_hp_tp()
1182 if (srng->ring_dir == HAL_SRNG_DIR_SRC && in ath11k_hal_srng_shadow_update_hp_tp()
1183 *srng->u.src_ring.tp_addr != srng->u.src_ring.hp) in ath11k_hal_srng_shadow_update_hp_tp()
1189 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_create_config()
1192 hal->srng_config = kmemdup(hw_srng_config_template, in ath11k_hal_srng_create_config()
1195 if (!hal->srng_config) in ath11k_hal_srng_create_config()
1196 return -ENOMEM; in ath11k_hal_srng_create_config()
1198 s = &hal->srng_config[HAL_REO_DST]; in ath11k_hal_srng_create_config()
1199 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1200 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_HP(ab); in ath11k_hal_srng_create_config()
1201 s->reg_size[0] = HAL_REO2_RING_BASE_LSB(ab) - HAL_REO1_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1202 s->reg_size[1] = HAL_REO2_RING_HP(ab) - HAL_REO1_RING_HP(ab); in ath11k_hal_srng_create_config()
1204 s = &hal->srng_config[HAL_REO_EXCEPTION]; in ath11k_hal_srng_create_config()
1205 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_TCL_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1206 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_TCL_RING_HP(ab); in ath11k_hal_srng_create_config()
1208 s = &hal->srng_config[HAL_REO_REINJECT]; in ath11k_hal_srng_create_config()
1209 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1210 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP(ab); in ath11k_hal_srng_create_config()
1212 s = &hal->srng_config[HAL_REO_CMD]; in ath11k_hal_srng_create_config()
1213 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1214 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP(ab); in ath11k_hal_srng_create_config()
1216 s = &hal->srng_config[HAL_REO_STATUS]; in ath11k_hal_srng_create_config()
1217 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1218 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP(ab); in ath11k_hal_srng_create_config()
1220 s = &hal->srng_config[HAL_TCL_DATA]; in ath11k_hal_srng_create_config()
1221 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1222 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL1_RING_HP; in ath11k_hal_srng_create_config()
1223 s->reg_size[0] = HAL_TCL2_RING_BASE_LSB(ab) - HAL_TCL1_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1224 s->reg_size[1] = HAL_TCL2_RING_HP - HAL_TCL1_RING_HP; in ath11k_hal_srng_create_config()
1226 s = &hal->srng_config[HAL_TCL_CMD]; in ath11k_hal_srng_create_config()
1227 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1228 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_RING_HP; in ath11k_hal_srng_create_config()
1230 s = &hal->srng_config[HAL_TCL_STATUS]; in ath11k_hal_srng_create_config()
1231 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1232 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_TCL_REG + HAL_TCL_STATUS_RING_HP; in ath11k_hal_srng_create_config()
1234 s = &hal->srng_config[HAL_CE_SRC]; in ath11k_hal_srng_create_config()
1235 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_BASE_LSB + in ath11k_hal_srng_create_config()
1237 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) + HAL_CE_DST_RING_HP + in ath11k_hal_srng_create_config()
1239 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) - in ath11k_hal_srng_create_config()
1241 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) - in ath11k_hal_srng_create_config()
1244 s = &hal->srng_config[HAL_CE_DST]; in ath11k_hal_srng_create_config()
1245 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB + in ath11k_hal_srng_create_config()
1247 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP + in ath11k_hal_srng_create_config()
1249 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - in ath11k_hal_srng_create_config()
1251 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - in ath11k_hal_srng_create_config()
1254 s = &hal->srng_config[HAL_CE_DST_STATUS]; in ath11k_hal_srng_create_config()
1255 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + in ath11k_hal_srng_create_config()
1257 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP + in ath11k_hal_srng_create_config()
1259 s->reg_size[0] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - in ath11k_hal_srng_create_config()
1261 s->reg_size[1] = HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) - in ath11k_hal_srng_create_config()
1264 s = &hal->srng_config[HAL_WBM_IDLE_LINK]; in ath11k_hal_srng_create_config()
1265 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1266 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_IDLE_LINK_RING_HP; in ath11k_hal_srng_create_config()
1268 s = &hal->srng_config[HAL_SW2WBM_RELEASE]; in ath11k_hal_srng_create_config()
1269 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_RELEASE_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1270 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM_RELEASE_RING_HP; in ath11k_hal_srng_create_config()
1272 s = &hal->srng_config[HAL_WBM2SW_RELEASE]; in ath11k_hal_srng_create_config()
1273 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1274 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_WBM_REG + HAL_WBM0_RELEASE_RING_HP; in ath11k_hal_srng_create_config()
1275 s->reg_size[0] = HAL_WBM1_RELEASE_RING_BASE_LSB(ab) - in ath11k_hal_srng_create_config()
1277 s->reg_size[1] = HAL_WBM1_RELEASE_RING_HP - HAL_WBM0_RELEASE_RING_HP; in ath11k_hal_srng_create_config()
1285 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_register_srng_key()
1289 lockdep_register_key(hal->srng_key + ring_id); in ath11k_hal_register_srng_key()
1296 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_unregister_srng_key()
1300 lockdep_unregister_key(hal->srng_key + ring_id); in ath11k_hal_unregister_srng_key()
1306 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_init()
1337 struct ath11k_hal *hal = &ab->hal; in ath11k_hal_srng_deinit()
1342 kfree(hal->srng_config); in ath11k_hal_srng_deinit()
1354 for (i = 0; i < ab->hw_params.ce_count; i++) { in ath11k_hal_dump_srng_stats()
1355 ce_pipe = &ab->ce.ce_pipe[i]; in ath11k_hal_dump_srng_stats()
1362 i, ce_pipe->pipe_num, in ath11k_hal_dump_srng_stats()
1363 jiffies_to_msecs(jiffies - ce_pipe->timestamp)); in ath11k_hal_dump_srng_stats()
1366 i, ce_pipe->pipe_num, in ath11k_hal_dump_srng_stats()
1367 (uintmax_t)jiffies_to_msecs(jiffies - ce_pipe->timestamp)); in ath11k_hal_dump_srng_stats()
1373 irq_grp = &ab->ext_irq_grp[i]; in ath11k_hal_dump_srng_stats()
1376 irq_grp->grp_id, in ath11k_hal_dump_srng_stats()
1377 jiffies_to_msecs(jiffies - irq_grp->timestamp)); in ath11k_hal_dump_srng_stats()
1380 irq_grp->grp_id, in ath11k_hal_dump_srng_stats()
1381 (uintmax_t)jiffies_to_msecs(jiffies - irq_grp->timestamp)); in ath11k_hal_dump_srng_stats()
1386 srng = &ab->hal.srng_list[i]; in ath11k_hal_dump_srng_stats()
1388 if (!srng->initialized) in ath11k_hal_dump_srng_stats()
1391 if (srng->ring_dir == HAL_SRNG_DIR_SRC) in ath11k_hal_dump_srng_stats()
1398 srng->ring_id, srng->u.src_ring.hp, in ath11k_hal_dump_srng_stats()
1399 srng->u.src_ring.reap_hp, in ath11k_hal_dump_srng_stats()
1400 *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp, in ath11k_hal_dump_srng_stats()
1401 srng->u.src_ring.last_tp, in ath11k_hal_dump_srng_stats()
1403 jiffies_to_msecs(jiffies - srng->timestamp)); in ath11k_hal_dump_srng_stats()
1405 (uintmax_t)jiffies_to_msecs(jiffies - srng->timestamp)); in ath11k_hal_dump_srng_stats()
1407 else if (srng->ring_dir == HAL_SRNG_DIR_DST) in ath11k_hal_dump_srng_stats()
1414 srng->ring_id, srng->u.dst_ring.tp, in ath11k_hal_dump_srng_stats()
1415 *srng->u.dst_ring.hp_addr, in ath11k_hal_dump_srng_stats()
1416 srng->u.dst_ring.cached_hp, in ath11k_hal_dump_srng_stats()
1417 srng->u.dst_ring.last_hp, in ath11k_hal_dump_srng_stats()
1419 jiffies_to_msecs(jiffies - srng->timestamp)); in ath11k_hal_dump_srng_stats()
1421 (uintmax_t)jiffies_to_msecs(jiffies - srng->timestamp)); in ath11k_hal_dump_srng_stats()